CN110400775A - 柔性阵列基板的制作方法及柔性阵列基板和柔性显示装置 - Google Patents
柔性阵列基板的制作方法及柔性阵列基板和柔性显示装置 Download PDFInfo
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Abstract
本发明提供一种柔性阵列基板的制作方法及柔性阵列基板和柔性显示装置。所述柔性阵列基板的制作方法采用银纳米线材料在柔性衬底上形成导电图形,利用银纳米线取代常规的金属及氧化铟锡形成导电图形,能够降低走线电阻,提高面板的穿透率,改善柔性阵列基板的抗弯折性,避免产品断线,提高产品生产良率,降低产品生产成本。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种柔性阵列基板的制作方法及柔性阵列基板和柔性显示装置。
背景技术
随着显示技术的发展,平板显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
目前,日常生活中应用的比较多的是刚性液晶显示器件及刚性OLED显示器件,其中,刚性液晶显示器件主要应用在固定式场合及移动类产品上,刚性OLED显示器件主要应用在移动类产品上。
尽管刚性液晶显示器件及刚性OLED显示器件已经可以满足人们的基本需要,但随着生活水平的提高和显示技术的发展,人们对显示器件的性能提出了更高的要求。柔性显示器件是目前新一代显示技术追求的方向,柔性显示器件采用柔性衬底替代传统的玻璃基板以实现面板的可弯曲性,给消费者带来了颠覆性的概念,能够提升用户体验,增强产品竞争力。柔性显示器件因兼具轻薄、可柔、抗摔、可折叠等优点,受到面板生产企业和消费者的热捧。然而,柔性显示器件有它的优点同时也有它的缺点,目前柔性显示器件最大的缺点主要有:良率低、成本高、工艺复杂等。
其中,柔性显示器件良率低主要是由于柔性显示器件的内部的走线出现断线而导致的不良体现,断线的原因,则是由于柔性显示器件为了实现柔性,而采用了超薄柔性衬底,在生产过程中柔性衬底会热胀冷缩而出现形变及生产制程需要经过剥离、封装等工艺,这些都会造成柔性显示器件的内部的走线出现断线。
目前用作柔性显示器件的走线的材料一般为金属,例如铝、铜及钼等,像素电极的材料一般为氧化铟锡,无论是金属材料还是氧化铟锡的其延展性、抗弯折能力都很低,在柔性显示器件上应用时,容易出现断线。
发明内容
本发明的目的在于提供一种柔性阵列基板的制作方法,能够减少柔性阵列基板的断线,提升柔性阵列基板的生产良率。
本发明的目的还在于提供一种柔性阵列基板,能够减少柔性阵列基板的断线,提升柔性阵列基板的生产良率。
本发明的目的还在于提供一种柔性显示装置,能够减少柔性显示装置的断线,提升柔性显示装置的生产良率。
为实现上述目的,本发明提供一种柔性阵列基板的制作方法,包括采用银纳米线材料在柔性衬底上形成导电图形的步骤。
所述导电图形包括栅极、源极及漏极;
采用银纳米线材料在柔性衬底上形成导电图形的步骤具体包括:
步骤S1、在柔性衬底上形成第一银纳米线层;
步骤S2、图案化所述第一银纳米线层,形成栅极;
步骤S3、在柔性衬底及栅极上形成栅极绝缘层;
步骤S4、在栅极绝缘层上形成对应所述栅极设置的半导体层;
步骤S5、在所述栅极绝缘层上形成第二银纳米线层;
步骤S6、图案化所述的第二银纳米线层,形成间隔分布的源极及漏极,所述源极及漏极分别与半导体层的两端接触。
所述导电图形还包括像素电极;
采用银纳米线材料在柔性衬底上形成导电图形的步骤还包括:
步骤S7、在所述栅极绝缘层、半导体层、源极及漏极上形成钝化层及贯穿所述钝化层暴露出所述漏极的一部分的过孔;
步骤S8、在所述钝化层上形成第三银纳米线层;
步骤S9、图案化所述第三银纳米线层,得到像素电极,所述像素电极通过所述过孔与所述漏极接触。
所述步骤S1具体包括:在柔性衬底上涂布第一银纳米线薄膜,并对所述第一银纳米线薄膜进行脉冲光烧结,得到第一银纳米线层;
所述步骤S5具体包括:在柔性衬底上涂布第二银纳米线薄膜,并对所述第一银纳米线薄膜进行脉冲光烧结,得到第二银纳米线层;
所述步骤S8具体包括:在所述钝化层上涂布第三银纳米线薄膜,并对所述第三银纳米线薄膜进行脉冲光烧结,得到第三银纳米线层。
所述步骤S1之前还包括提供一刚性衬底,并在所述刚性衬底上形成柔性衬底的步骤。
所述步骤S9之后还包括将所述柔性衬底从所述刚性衬底上剥离的步骤。
本发明还提供一种柔性阵列基板,包括柔性衬底及位于所述柔性衬底上的导电图形,所述导电图形的材料为银纳米线。
所述导电图形包括栅极、源极、漏极及像素电极;
所述柔性阵列基板的具体结构为:柔性衬底、设于所述柔性衬底上的栅极、设于所述栅极上的栅极绝缘层、设于所述栅极上的栅极绝缘层上的半导体层、设于所述栅极绝缘层上的间隔分布的源极及漏极、设于所述栅极绝缘层、半导体层、源极及漏极上的钝化层及设于所述钝化层上的像素电极,所述源极及漏极分别与半导体层的两端接触,所述像素电极通过贯穿所述钝化层暴露出所述漏极的一部分的过孔与漏极接触。
本发明还提供一种柔性显示装置,包括上述的柔性阵列基板。
本发明的有益效果:本发明提供一种柔性阵列基板的制作方法及柔性阵列基板和柔性显示装置。所述柔性阵列基板的制作方法采用银纳米线材料在柔性衬底上形成导电图形,利用银纳米线取代常规的金属及氧化铟锡形成导电图形,能够降低走线电阻,提高面板的穿透率,改善柔性阵列基板的抗弯折性,避免产品断线,提高产品生产良率,降低产品生产成本。
附图说明
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为本发明的柔性阵列基板的制作方法的步骤S1的示意图;
图2为本发明的柔性阵列基板的制作方法的步骤S2的示意图;
图3为本发明的柔性阵列基板的制作方法的步骤S3~步骤S5的示意图;
图4为本发明的柔性阵列基板的制作方法的步骤S6的示意图;
图5为本发明的柔性阵列基板的制作方法的步骤S7~S8的示意图;
图6为本发明的柔性阵列基板的制作方法的步骤S9的示意图;
图7为本发明的柔性阵列基板的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1至图7,本发明提供一种柔性阵列基板的制作方法,包括采用银纳米线材料在柔性衬底10上形成导电图形的步骤。
具体地,在本发明的优选实施例中,如图1至图4所示,所述导电图形包括栅极21、源极22及漏极23;
相应的,所述采用银纳米线材料在柔性衬底10上形成导电图形的步骤具体包括:
步骤S1、在柔性衬底10上形成第一银纳米线层20。
具体地,如图1所示,所述步骤S1之前还包括提供一刚性衬底1,并在所述刚性衬底1上形成柔性衬底10的步骤。
优选地,所述柔性衬底10的材料为聚酰亚胺,所述刚性衬底1为玻璃衬底。
进一步地,所述形成第一银纳米线层20的具体工艺包括:
首先,在柔性衬底10上涂布第一银纳米线薄膜,在第一银纳米线薄膜中含有多个相互搭接的银纳米线段;接着,对所述第一银纳米线薄膜进行脉冲光烧结,得到第一银纳米线层20,通过对第一银纳米线薄膜进行脉冲光烧结使得搭接在一起的银纳米线段烧结在一起,以提高银纳米线导电性及机械性能,最终形成网状的第一银纳米线层20。
步骤S2、如图2所示,图案化所述第一银纳米线层20,形成栅极21。
具体地,所述步骤S2具体包括在第一银纳米线层20形成光刻胶层,接着进行曝光、显影及蚀刻,得到栅极21。
步骤S3、如图3所示,在柔性衬底10及栅极21上形成栅极绝缘层30。
具体地,所述栅极绝缘层30的材料为氮化硅及氧化硅中的一种或二者的组合。
步骤S4、如图3所示,在栅极绝缘层30上形成对应所述栅极21设置的半导体层31;
步骤S5、如图3所示,在所述栅极绝缘层30上形成第二银纳米线层40。
具体地,形成第二银纳米线层40的具体工艺包括:首先,在栅极绝缘层30上涂布第二银纳米线薄膜,在第二银纳米线薄膜中含有多个相互搭接的银纳米线段;接着,对所述第二银纳米线薄膜进行脉冲光烧结,得到第二银纳米线层40,通过对第二银纳米线薄膜进行脉冲光烧结使得搭接在一起的银纳米线段烧结在一起,以提高银纳米线导电性及机械性能,最终形成网状的第二银纳米线层40。
步骤S6、如图4所示,图案化所述的第二银纳米线层40,形成间隔分布的源极22及漏极23,所述源极22及漏极23分别与半导体层31的两端接触。
具体地,所述步骤S6具体包括在第二银纳米线层40形成光刻胶层,接着进行曝光、显影及蚀刻,得到源极22及漏极23。
进一步地,如图5至图6所示,在本发明的优选实施例中,所述导电图形还包括像素电极61;
采用银纳米线材料在柔性衬底10上形成导电图形的步骤还包括:
步骤S7、在所述栅极绝缘层30、半导体层31、源极22及漏极23上形成钝化层50及贯穿所述钝化层50暴露出所述漏极23的一部分的过孔51。
具体地,所述钝化层50的材料为氧化硅及氮化硅中的一种或二者的组合。
步骤S8、在所述钝化层50上形成第三银纳米线层60。
具体地,形成第三银纳米线层60的具体工艺包括:首先,在钝化层50上涂布第三银纳米线薄膜,在第三银纳米线薄膜中含有多个相互搭接的银纳米线段;接着,对所述第三银纳米线薄膜进行脉冲光烧结,得到第三银纳米线层60,通过对第三银纳米线薄膜进行脉冲光烧结使得搭接在一起的银纳米线段烧结在一起,以提高银纳米线导电性及机械性能,最终形成网状的第三银纳米线层60。
步骤S9、图案化所述第三银纳米线层60,得到像素电极61,所述像素电极61通过所述过孔51与所述漏极23接触。
具体地,所述步骤S9具体包括在第三银纳米线层60形成光刻胶层,接着进行曝光、显影及蚀刻,得到像素电极61。
进一步地,如图7所示,所述步骤S9之后还包括将所述柔性衬底10从所述刚性衬底1上剥离,得到最终的柔性阵列基板。
值得一提的是,本发明基于银纳米线成膜工艺简单、低电阻、低成本、耐弯折、延展性好、高穿透率、低雾度、可光刻图案化的特点,利用银纳米线取代现有的金属或氧化铟锡,形成柔性阵列基板中的导电图案,能够降低走线电阻,提高面板的穿透率,改善柔性阵列基板的抗弯折性,避免产品断线,提高产品生产良率,降低产品生产成本。
请参阅图7,本发明还提供一种柔性阵列基板,包括柔性衬底10及位于所述柔性衬底10上的导电图形,所述导电图形的材料为银纳米线。
具体地,所述导电图形包括栅极21、源极22、漏极23及像素电极61;
所述柔性阵列基板的具体结构为:柔性衬底10、设于所述柔性衬底10上的栅极21、设于所述栅极21上的栅极绝缘层30、设于所述栅极21上的栅极绝缘层30上的半导体层31、设于所述栅极绝缘层30上的间隔分布的源极22及漏极23、设于所述栅极绝缘层30、半导体层31、源极22及漏极23上的钝化层50及设于所述钝化层50上的像素电极61,所述源极22及漏极23分别与半导体层31的两端接触,所述像素电极61通过贯穿所述钝化层50暴露出所述漏极23的一部分的过孔51与漏极23接触。
其中,优选地,所述柔性衬底10的材料为聚酰亚胺,所述刚性衬底1为玻璃衬底,所述栅极绝缘层30的材料为氮化硅及氧化硅中的一种或二者的组合,所述钝化层50的材料为氧化硅及氮化硅中的一种或二者的组合。
需要说明的是,基于银纳米线成膜工艺简单、低电阻、低成本、耐弯折、延展性好、高穿透率、低雾度、可光刻图案化的特点,本发明利用银纳米线取代现有的金属或氧化铟锡,形成柔性阵列基板中的导电图案,能够降低走线电阻,提高面板的穿透率,改善柔性阵列基板的抗弯折性,避免产品断线,提高产品生产良率,降低产品生产成本。
基于上述的柔性阵列基板,本发明还提供一种柔性显示装置,包括上述的柔性阵列基板。
综上所述,本发明提供一种柔性阵列基板的制作方法及柔性阵列基板和柔性显示装置。所述柔性阵列基板的制作方法采用银纳米线材料在柔性衬底上形成导电图形,利用银纳米线取代常规的金属及氧化铟锡形成导电图形,能够降低走线电阻,提高面板的穿透率,改善柔性阵列基板的抗弯折性,避免产品断线,提高产品生产良率,降低产品生产成本。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
1.一种柔性阵列基板的制作方法,其特征在于,包括采用银纳米线材料在柔性衬底(10)上形成导电图形的步骤。
2.如权利要求1的柔性阵列基板的制作方法,其特征在于,所述导电图形包括栅极(21)、源极(22)及漏极(23);
采用银纳米线材料在柔性衬底(10)上形成导电图形的步骤具体包括:
步骤S1、在柔性衬底(10)上形成第一银纳米线层(20);
步骤S2、图案化所述第一银纳米线层(20),形成栅极(21);
步骤S3、在柔性衬底(10)及栅极(21)上形成栅极绝缘层(30);
步骤S4、在栅极绝缘层(30)上形成对应所述栅极(21)设置的半导体层(31);
步骤S5、在所述栅极绝缘层(30)上形成第二银纳米线层(40);
步骤S6、图案化所述的第二银纳米线层(40),形成间隔分布的源极(22)及漏极(23),所述源极(22)及漏极(23)分别与半导体层(31)的两端接触。
3.如权利要求2的柔性阵列基板的制作方法,其特征在于,所述导电图形还包括像素电极(61);
采用银纳米线材料在柔性衬底(10)上形成导电图形的步骤还包括:
步骤S7、在所述栅极绝缘层(30)、半导体层(31)、源极(22)及漏极(23)上形成钝化层(50)及贯穿所述钝化层(50)暴露出所述漏极(23)的一部分的过孔(51)
步骤S8、在所述钝化层(50)上形成第三银纳米线层(60);
步骤S9、图案化所述第三银纳米线层(60),得到像素电极(61),所述像素电极(61)通过所述过孔(51)与所述漏极(23)接触。
4.如权利要求2所述的柔性阵列基板的制作方法,其特征在于,所述步骤S1具体包括:在柔性衬底(10)上涂布第一银纳米线薄膜,并对所述第一银纳米线薄膜进行脉冲光烧结,得到第一银纳米线层(20);
所述步骤S5具体包括:在柔性衬底(10)上涂布第二银纳米线薄膜,并对所述第一银纳米线薄膜进行脉冲光烧结,得到第二银纳米线层(40)。
5.如权利要求3所述的柔性阵列基板的制作方法,其特征在于,所述步骤S8具体包括:在所述钝化层(50)上涂布第三银纳米线薄膜,并对所述第三银纳米线薄膜进行脉冲光烧结,得到第三银纳米线层(60)。
6.如权利要求3的柔性阵列基板的制作方法,其特征在于,所述步骤S1之前还包括提供一刚性衬底(1),并在所述刚性衬底(1)上形成柔性衬底(10)的步骤。
7.如权利要求6的柔性阵列基板的制作方法,其特征在于,所述步骤S9之后还包括将所述柔性衬底(10)从所述刚性衬底(1)上剥离的步骤。
8.一种柔性阵列基板,其特征在于,包括柔性衬底(10)及位于所述柔性衬底(10)上的导电图形,所述导电图形的材料为银纳米线。
9.如权利要求8所述的柔性阵列基板,其特征在于,所述导电图形包括栅极(21)、源极(22)、漏极(23)及像素电极(61);
所述柔性阵列基板的具体结构为:柔性衬底(10)、设于所述柔性衬底(10)上的栅极(21)、设于所述栅极(21)上的栅极绝缘层(30)、设于所述栅极(21)上的栅极绝缘层(30)上的半导体层(31)、设于所述栅极绝缘层(30)上的间隔分布的源极(22)及漏极(23)、设于所述栅极绝缘层(30)、半导体层(31)、源极(22)及漏极(23)上的钝化层(50)及设于所述钝化层(50)上的像素电极(61),所述源极(22)及漏极(23)分别与半导体层(31)的两端接触,所述像素电极(61)通过贯穿所述钝化层(50)暴露出所述漏极(23)的一部分的过孔(51)与漏极(23)接触。
10.一种柔性显示装置,其特征在于,包括如权利要求8至9中任一项所述的柔性阵列基板。
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