CN109065637A - A kind of trench schottky barrier diode and its manufacturing method - Google Patents
A kind of trench schottky barrier diode and its manufacturing method Download PDFInfo
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- 230000004888 barrier function Effects 0.000 title claims abstract description 39
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 53
- 229910052751 metal Inorganic materials 0.000 claims abstract description 53
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 25
- 238000000407 epitaxy Methods 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 13
- 230000003647 oxidation Effects 0.000 claims abstract description 8
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000005380 borophosphosilicate glass Substances 0.000 claims abstract description 7
- 239000011574 phosphorus Substances 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 18
- 238000001312 dry etching Methods 0.000 claims description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 238000005260 corrosion Methods 0.000 claims description 6
- 230000007797 corrosion Effects 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- 238000004026 adhesive bonding Methods 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 229910017435 S2 In Inorganic materials 0.000 claims 1
- 230000000903 blocking effect Effects 0.000 abstract description 8
- 230000015556 catabolic process Effects 0.000 description 11
- 238000005036 potential barrier Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000001965 increasing effect Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000002708 enhancing effect Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000011031 large-scale manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
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Abstract
A kind of trench schottky barrier diode, the active area including middle part and the cut-off region around active area, the active area are provided, in sequence from bottom to top, with N-type substrate layer, N-type epitaxy layer, gate oxide, schottky metal layer, anode metal layer, cathode metal layer；The N-type epitaxy layer is equipped with several grooves and boss, the groove and boss are horizontally arranged at interval, BPSG buffer layer is deposited between the gate oxide and anode metal layer of boss, it is filled with phosphorus doping conductive polycrystalline silicon floor in the trench, 1.3 μm of the trench depth, 0.5 μm of groove width, the thickness 1000 of 1.5 μm of trench spacing and trench oxides.The present invention has obtained that a kind of reverse leakage is low, and voltage reversal blocking ability is good by the thickness of the width of active area, groove internal oxidation layer between the control shape of groove, trench depth, groove, the trench schottky barrier diode of good reliability.The invention also discloses a kind of manufacturing methods of trench schottky barrier diode, and step is few, and manufacturing cost is low.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of trench schottky barrier diode and its manufacturers
Method.
Background technique
Switching device of the rectifying device as AC-to DC, it is desirable that electricity is opened when one-way conduction characteristic, i.e. forward conduction
It forces down, conducting resistance is small, and blocking voltage is high when reverse bias, and reverse leakage is small.Schottky barrier diode is as rectifier
Part has used many decades in power supply application field, due to having the advantages that positive cut-in voltage is low and switching speed is fast, this
It is set to be highly suitable to be applied for Switching Power Supply and high frequency occasion.
Schottky barrier diode is that the metal-semiconductor junction principle formed using metal and semiconductor contact is made.
Traditional planar type Schottky barrier diode device is usually by the metal layer of the N- epitaxial layer of low doping concentration and top surface deposition
It forms Schottky Barrier Contact face and constitutes.The work function difference of metal and n type single crystal silicon forms potential barrier, and the height of the potential barrier determines
The characteristic of Schottky barrier diode.Lower potential barrier can reduce forward conduction cut-in voltage, but can make reverse leakage
Increase, reverse BV reduces；Conversely, higher potential barrier will increase forward conduction cut-in voltage, while subtract reverse leakage
It is small, reverse blocking capability enhancing.
However, traditional planar type Schottky barrier diode is under reverse bias, the effect that image force reduces potential barrier,
It results in planer schottky diode and haves the shortcomings that blocking ability is poor.Groove-shaped Schottky diode is in planar diode
On the basis of, metal-semiconductor-silicon MOS effect (see Figure of description 1) is utilized and groove type MOS Xiao for inventing
Special base barrier diode.It is mainly characterized by increasing with backward voltage, by MOS effect, shifts to an earlier date pinch off, electric field between groove
Intensity is reduced to zero before reaching silicon face, avoids improving blocking ability in surface breakdown.In addition, it is relative to plane two
Pole pipe also has other incomparable advantages, is mainly manifested in ESD and the enhancing of Antisurge current ability, smaller chip face
Long-pending, under the conditions of identical substrate and metal, reverse leakage current is lower, and VF is more low.
Summary of the invention
In order to which the trench schottky barrier diode performance and reliability for solving the prior art is low, reverse leakage is big, reversely
Blocking ability is poor that problem, the present invention pass through the width of active area between the shape for controlling groove, trench depth, groove, in groove
The thickness of oxide layer, provides that a kind of reverse leakage is low, and voltage reversal blocking ability is good, the trench schottky barrier of good reliability
Diode.
To achieve the above object, the technical solution adopted in the present invention is as follows:
A kind of trench schottky barrier diode, the active area including middle part and the cut-off region around active area, the active area
It is provided, in sequence from bottom to top, with N-type substrate layer, N-type epitaxy layer, gate oxide, schottky metal layer, anode metal layer, cathodic metal
Layer；The N-type epitaxy layer is equipped with several grooves and boss, and the groove and boss are horizontally arranged at interval, in the grid oxygen of boss
Change the BPSG buffer layer for being deposited with 3%B and 4%P between layer and anode metal layer, is filled with phosphorus doping conductive polycrystalline silicon in the trench
Layer, the trench depth of the groove are 1.3 μm, and groove width is 0.5 μm, and trench spacing is 1.5 μm and trench oxides
With a thickness of 1000.Having obtained breakdown voltage by the thickness of the groove dimensions and trench oxides that control diode is
53V, the electric leakage ideal component electrical parameter that density is 6 μ A and forward conduction voltage is 0.44V, parameter stability, reliable performance,
Suitable for large-scale production.
The present invention also provides a kind of manufacturing methods of trench schottky barrier diode, comprising the following steps:
S1. one layer of N-type epitaxy layer being lightly doped is grown on N-type substrate layer；
S2. just oxygen is carried out in above-mentioned N-type epitaxy layer, forms just oxide layer;
S3. photoresist is coated in above-mentioned just oxide layer, alignment exposure defines groove figure；
S4. it is not photo-etched the first oxide layer of glue protection using dry etching method selective removal, controls just oxidated layer thickness and be less than
20, to expose the corresponding N-type epitaxy layer of groove figure, remove photoresist afterwards；
S5. using the corresponding N-type epitaxy layer of groove figure of dry etching method etching exposure, groove is formed, between the groove
Boss is formed by the N-type epitaxy layer that first oxide layer is protected；
S6. pre-gate is carried out in total, forms pre-grid oxide layer, then carry out pre-grid oxide corrosion；
S7. gate oxidation is carried out in total, forms gate oxide；
S8. polycrystalline silicon deposit is carried out in total form polysilicon layer；
S9. polycrystalline phosphorus doping is carried out in total, forms conductive polycrystalline silicon floor after thermal annealing, then lead to boss position
Electric polysilicon layer carve, and the gate oxide on oxide layer top and polysilicon layer are all got rid of, while making in groove
The top surface of conductive polycrystalline silicon floor is flushed with the top surface of boss；
S10. the BPSG that 3%B and 4%P is deposited on boss forms buffer layer；
S11. photoresist is coated on the surface of total, using method of the dry etching in conjunction with wet etching, alignment exposure
The surrounding that contact hole photoetching retains groove outermost is carried out, the oxide layer of active area between groove is all etched；
S12. it sputters to form schottky barrier metal layer using the method for sputtering in trench area, the schottky barrier metal layer
For titanium coating；
S13. in the surface deposition anode metal layer of total, the anode metal layer is Al/Si/Cu metal layer, with a thickness of
4μm；Gluing is carried out, metal lithographic corrosion controls anode metal layer with a thickness of 2.8 μm；
S14. substrate thinning processing is carried out using the method for grinding monocrystalline substrate bottom surface, and heavy in the bottom surface of monocrystalline substrate
Product cathode metal layer, obtains trench schottky barrier diode, and the cathode metal layer is Ti/Ni/Ag metal layer.
Preferably, in step s 2, the just oxide layer with a thickness of 6000.
Preferably, in step s 5, the trench depth is 1.3 μm, and groove width is between 0.5 μm and groove
The width of active area is 1.5 μm；Controlling trench depth is 1.3 μm, is the breakdown voltage characteristics curve due to device with ditch groove depth
The increase of degree changes in " s " type, and when trench depth is smaller, the breakdown voltage of device increases slow, then can quickly increase
Add, but when trench depth is deep, the amplification of the breakdown voltage of device is gradually reduced again, and schottky junction surface is close to ditch
Electric field intensity value at the position of slot reduces with the increase of trench depth, so, leakage current can be with the increasing of trench depth
The amplitude for adding and reducing, but reduce when trench depth reaches certain value will become smaller, this is mainly surface field intensity
The amplitude that value reduces also reduces.Then, for forward conduction voltage because of the increase of trench depth, the dead resistance meeting of device
Increase, so the forward conduction voltage of device can increased.In conclusion we will fully consider simultaneously when designing device
The variation of these three key parameters, control trench depth are 1.3 μm；Width is 1.5 μm between controlling groove, is because between groove
Then the increase of spacing is held essentially constant, finally spacing is bigger between groove after the breakdown voltage of device can first increase
When, it will reduce with the increase of spacing.But equally, as Schottky, we not only need to be concerned about its breakdown voltage,
Reverse leakage current and forward conduction voltage can not be ignored simultaneously, electric leakage be the increase of the spacing between the groove with device and
Increase, for forward conduction voltage, maximum influence factor is exactly effective schottky junction area of device, and with the ditch of device
The increase of spacing between slot, the ratio that effective schottky junction area of device accounts for the device gross area is also increased, so with ditch
The increase of separation, the forward conduction voltage of device are to reduce.In conclusion width is to the breakdown voltage of device between groove
It influences not being dull, to fully consider breakdown voltage, leakage current density and the forward conduction voltage of device, select and be best suitable for
The selection of application demand；Trench oxide layer is controlled with a thickness of 1000, is because of the increase with oxidated layer thickness in groove, device
The breakdown voltage of part can first increase and reduce afterwards, and the present invention studies through a large number of experiments, it is final control trench oxide layer with a thickness of
1000Å；The width of groove is 0.5 μm, this maintains the leading position in existing trench etch process.
Preferably, in step S7, the oxide layer with a thickness of 1000.
Preferably, in step S8, the conductive polycrystalline silicon floor with a thickness of 8000.
Compared with prior art, the invention has the following advantages: the present invention controls groove Xiao Te by many experiments
1.3 μm of the trench depth of base barrier diode, 0.5 μm of groove width, the thickness of 1.5 μm of trench spacing and trench oxides
1000, ideal breakdown voltage 53V has been obtained, leak electricity the devices electrical parameters such as density 6 μ A and forward conduction voltage 0.44V,
Parameter stability, reliable performance, reverse leakage is low, and voltage reversal blocking ability is good, two pole of trench schottky barrier of good reliability
Pipe is suitable for large-scale production.The preparation method of trench schottky barrier diode of the present invention, it is advanced before carrying out gate oxidation
Row pre-grid oxide and pre-grid oxide is corroded, the groove shape obtained in this way is regular, and bottom surface is round and smooth, is that trench schottky is excellent
Electric property is laid a solid foundation.This layer of thin layer will be insulator between grid and channel, referred to as oxidation grid so as to original
The thicker oxidation field different from first grown.The characteristic size of integrated circuit reduces, and the thickness of gate oxide also will be in proportion
It is thinned, this is primarily to prevent short channel effect.If channel length constantly reduces, and thickness is not drawn to be thinned, will necessarily
Cause threshold voltage unstable.
Detailed description of the invention
Fig. 1 is trench schottky barrier diode structural representation section；
Wherein, 1, substrate layer；2, epitaxial layer；3, gate oxide；4, schottky barrier metal layer；5, anode metal layer；6, cathode
Metal layer；7, buffer layer；8, conductive polycrystalline silicon floor.
Specific embodiment
To facilitate the understanding of the present invention, a more comprehensive description of the invention is given in the following sections with reference to the relevant attached drawings.In attached drawing
Give better embodiment of the invention.But the invention can be realized in many different forms, however it is not limited to herein
Described embodiment.On the contrary, the purpose of providing these embodiments is that making to understand more the disclosure
Add thorough and comprehensive.
It should be noted that it can directly on the other element when element is referred to as " being fixed on " another element
Or there may also be elements placed in the middle.When an element is considered as " connection " another element, it, which can be, is directly connected to
To another element or it may be simultaneously present centering elements.Term as used herein " vertical ", " horizontal ", " left side ",
" right side " and similar statement for illustrative purposes only, are not meant to be the only embodiment.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Term as used herein in the specification of the present invention is intended merely to description tool
The purpose of the embodiment of body, it is not intended that in the limitation present invention.Term " and or " used herein includes one or more
Any and all combinations of relevant listed item.
For convenient for those skilled in the art understand that technical solution of the present invention, makees the present invention program now in conjunction with Figure of description
It is described in further detail.
As shown in Figure 1, a kind of trench schottky barrier diode, the active area including middle part and the cut-off around active area
Area, the active area are provided, in sequence from bottom to top, with N-type substrate layer 1, N-type epitaxy layer 2, gate oxide 3, schottky metal layer 4, sun
Pole metal layer 5, cathode metal layer 6；The N-type epitaxy layer 2 is equipped with several grooves and boss, between the groove and boss transverse direction
Every setting, the BPSG buffer layer 7 of 3%B and 4%P is deposited between the gate oxide 3 and anode metal layer 5 of boss, in the trench
Filled with phosphorus doping conductive polycrystalline silicon floor 8, trench depth is 1.3 μm, and groove width is 0.5 μm, trench spacing be 1.5 μm and
Trench oxides with a thickness of 1000.
A kind of manufacturing method of trench schottky barrier diode, comprising the following steps:
Step S1, on N-type substrate layer 1 grow one layer of N-type epitaxy layer 2 being lightly doped, the N-type epitaxy layer with a thickness of 4.3 μm；
Step S2, carries out preliminary oxidation in above-mentioned N-type epitaxy layer, forms just oxide layer, control oxide layer with a thickness of 6000
, it is therefore an objective to it is convenient for post-exposure groove figure；
Step S3, coats photoresist in above-mentioned just oxide layer, and the just oxide layer exposure of alignment gluing defines groove figure；
Step S4 is not photo-etched the first oxide layer of glue protection using dry etching method selective removal, controls just oxidated layer thickness
Less than 20 to expose the corresponding N-type epitaxy layer of groove figure, photoresist is removed afterwards；
Step 5, using the corresponding N-type epitaxy layer of groove figure of dry etching method etching exposure, the groove of aligned transfer is formed,
Boss is formed by the N-type epitaxy layer that oxide layer is protected between the groove；
Step S6, carries out pre-gate in total, forms pre-grid oxide layer, control pre-grid oxide layer with a thickness of 1000, then
Pre-grid oxide corrosion is carried out, controls the thickness of pre-grid oxide layer less than 20.The groove shape obtained in this way is regular, bottom surface circle
It is sliding, it lays a solid foundation for the excellent electric property of trench schottky；
Step S7, carries out gate oxidation in total, forms gate oxide, control oxide layer with a thickness of 1000；
Step S8 carries out polycrystalline silicon deposit in total and forms polysilicon layer, and control polysilicon layer thicknesses are 8000；
Step S9 carries out polycrystalline phosphorus doping in total, forms conductive polycrystalline silicon floor after thermal annealing, then carry out conductive polycrystalline
Silicon layer, which returns, to be carved, and flushes the top surface of the conductive polycrystalline silicon floor in groove with the top surface of boss；
Step S10, the BPSG that 3%B and 4%P is deposited on boss form buffer layer；
Step S11 coats photoresist on the surface of total, using method of the dry etching in conjunction with wet etching, alignment
Exposure carries out the surrounding that contact hole photoetching retains groove outermost, the oxide layer of active area between groove is all etched, control
The thickness of oxide layer is less than 20；
Step S12 sputters to form schottky barrier metal layer, the Schottky barrier metal in trench area using the method for sputtering
Layer is titanium coating, controls it with a thickness of 1100, and the 30s that anneals at 750 DEG C；
Step S13, in the surface deposition anode metal layer of total, the anode metal layer is Al/Si/Cu metal layer, thick
Degree is 4 μm；Gluing is carried out, to anode metal layer photoetching corrosion, controls anode metal layer with a thickness of 2.8 μm；
Step S14 carries out substrate thinning processing using the method for grinding monocrystalline substrate bottom surface, and in the bottom surface of monocrystalline substrate
Cathode metal layer is deposited, trench schottky barrier diode is obtained, the cathode metal layer is Ti/Ni/Ag metal layer.
In step S2, the oxide layer with a thickness of 6000.
In step S5, the trench depth is 1.3 μm, the width of groove width active area between 0.5 μm and groove
It is 1.5 μm.
In step S9, the oxide layer with a thickness of 1000.
In step S8, the conductive polycrystalline silicon floor with a thickness of 8000.
In step S10, the buffer layer with a thickness of 6000.
The above description is only the preferred embodiments of the present invention, is not intended to limit the present invention in any other form,
Any person skilled in the art is changed or is modified as equivalent variations possibly also with the technology contents of the disclosure above
Equivalent embodiment.But without departing from the technical solutions of the present invention, according to the technical essence of the invention to above embodiments
Any simple modification, equivalent variations and the remodeling made, still falls within the protection scope of technical solution of the present invention.
Claims (6)
1. a kind of trench schottky barrier diode, the active area including middle part and the cut-off region around active area, described active
Area is provided, in sequence from bottom to top, with N-type substrate floor (1), N-type epitaxy layer (2), gate oxide (3), schottky metal layer (4), anode
Metal layer (5), cathode metal layer (6)；The N-type epitaxy layer (2) is equipped with several grooves and boss, and the groove and boss are horizontal
It is arranged to interval, the BPSG buffer layer of 3%B and 4%P is deposited between the gate oxide (3) and anode metal layer (5) of boss
(7), phosphorus doping conductive polycrystalline silicon floor (8) are filled in the trench, it is characterised in that: trench depth is 1.3 μm, and groove width is
0.5 μm, trench spacing is 1.5 μm and trench oxides with a thickness of 1000.
2. a kind of manufacturing method of trench schottky barrier diode according to claim 1, it is characterised in that including with
Lower step:
S1. one layer of N-type epitaxy layer being lightly doped is grown on N-type substrate layer；
S2. just oxygen is carried out in above-mentioned N-type epitaxy layer, forms oxide layer;
S3. photoresist is coated in above-mentioned oxide layer, alignment exposure defines groove figure；
S4. it is not photo-etched the oxide layer of glue protection using dry etching method selective removal, controls oxidated layer thickness less than 20
To expose the corresponding N-type epitaxy layer of groove figure, photoresist is removed afterwards；
S5. using the corresponding N-type epitaxy layer of groove figure of dry etching method etching exposure, groove is formed, between the groove
Boss is formed by the N-type epitaxy layer that oxide layer is protected；
S6. pre-gate is carried out in total, forms pre-grid oxide layer, then carry out pre-grid oxide corrosion；
S7. gate oxidation is carried out in total, forms gate oxide；
S8. polycrystalline silicon deposit is carried out in total form polysilicon layer；
S9. polycrystalline phosphorus doping is carried out in total, forms conductive polycrystalline silicon floor after thermal annealing, then lead to boss position
Electric polysilicon layer carve, and flushes the top surface of the conductive polycrystalline silicon floor in groove with the top surface of boss；
S10. the BPSG that 3%B and 4%P is deposited on boss forms buffer layer；
S11. photoresist is coated on the surface of total, using method of the dry etching in conjunction with wet etching, alignment exposure
The surrounding that contact hole photoetching retains groove outermost is carried out, the oxide layer of active area between groove is all etched；
S12. it sputters to form schottky barrier metal layer using the method for sputtering in trench area, the schottky barrier metal layer
For titanium coating；
S13. in the surface deposition anode metal layer of total, the anode metal layer is Al/Si/Cu metal layer, with a thickness of
4μm；Gluing is carried out, metal lithographic corrosion controls anode metal layer with a thickness of 2.8 μm；
S14. substrate thinning processing is carried out using the method for grinding monocrystalline substrate bottom surface, and heavy in the bottom surface of monocrystalline substrate
Product cathode metal layer, obtains trench schottky barrier diode, and the cathode metal layer is Ti/Ni/Ag metal layer.
3. the manufacturing method of trench schottky barrier diode according to claim 2, it is characterised in that: in step S2
In, the oxide layer with a thickness of 6000.
4. the manufacturing method of trench schottky barrier diode according to claim 2, it is characterised in that: in step S5
In, the trench depth is 1.3 μm, and the width of groove width active area between 0.5 μm and groove is 1.5 μm.
5. the manufacturing method of trench schottky barrier diode according to claim 2, it is characterised in that: in step S7
In, the oxide layer with a thickness of 1000.
6. the manufacturing method of trench schottky barrier diode according to claim 2, it is characterised in that: in step S8
In, the conductive polycrystalline silicon floor with a thickness of 8000.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110571282A (en) * | 2019-08-01 | 2019-12-13 | 山东天岳电子科技有限公司 | schottky diode and manufacturing method thereof |
| CN113643997A (en) * | 2021-07-30 | 2021-11-12 | 天津环鑫科技发展有限公司 | Groove shape monitoring method and structural device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1178539A2 (en) * | 2000-06-29 | 2002-02-06 | SILICONIX Incorporated | Schottky field-effect transistor |
| CN103094358A (en) * | 2011-11-01 | 2013-05-08 | 比亚迪股份有限公司 | Schottky diode and manufacturing method thereof |
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| EP1178539A2 (en) * | 2000-06-29 | 2002-02-06 | SILICONIX Incorporated | Schottky field-effect transistor |
| CN103094358A (en) * | 2011-11-01 | 2013-05-08 | 比亚迪股份有限公司 | Schottky diode and manufacturing method thereof |
| CN103681316A (en) * | 2012-09-14 | 2014-03-26 | 北大方正集团有限公司 | Deep-trench Schottky barrier diode and process method thereof |
| JP2017028150A (en) * | 2015-07-24 | 2017-02-02 | サンケン電気株式会社 | Semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110571282A (en) * | 2019-08-01 | 2019-12-13 | 山东天岳电子科技有限公司 | schottky diode and manufacturing method thereof |
| CN113643997A (en) * | 2021-07-30 | 2021-11-12 | 天津环鑫科技发展有限公司 | Groove shape monitoring method and structural device |
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