CN103094358A - Schottky diode and manufacturing method thereof - Google Patents

Schottky diode and manufacturing method thereof Download PDF

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Publication number
CN103094358A
CN103094358A CN2011102540231A CN201110254023A CN103094358A CN 103094358 A CN103094358 A CN 103094358A CN 2011102540231 A CN2011102540231 A CN 2011102540231A CN 201110254023 A CN201110254023 A CN 201110254023A CN 103094358 A CN103094358 A CN 103094358A
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China
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layer
semiconductor layer
groove
schottky diode
barrier
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CN2011102540231A
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张兴来
李春霞
陈朝伟
曾爱平
陈宇
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BYD Co Ltd
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BYD Co Ltd
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Priority to CN2011102540231A priority Critical patent/CN103094358A/en
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Abstract

The invention relates to a semi-conductor device, in particular to a novel channel schottky rectifier tube. The rectifier tube comprises a first semi-conductor layer, a first metal electrode arranged below the first semi-conductor layer, a first channel, a second channel, isolation layers, a barrier metal layer, an oxide layer, and a second metal electrode, wherein the first channel and the second channel are arranged in the first semi-conductor layer and are mutually separated, the isolation layers are located in the channels, the barrier metal layer is arranged above the first semi-conductor layer and between the first channel and the second channel, the oxide layer is arranged above the first semi-conductor layer outside the barrier metal layer, and the second metal electrode is arranged above the first semi-conductor layer. The depths of the channels are 2um-7um. By means of arrangement of the channels, reverse breakdown voltage of a schottky diode is improved.

Description

A kind of Schottky diode and manufacture method thereof
Technical field
The present invention relates to semiconductor applications, relate in particular to a kind of Schottky diode.
Background technology
Schottky diode is to utilize a kind of majority carrier device that between metal and semiconductor, contact berrier is carried out work, compares with common PN junction diode, and it is low that it has forward conduction voltage, the good characteristics such as fast response time.Schottky diode in high-frequency rectification, switching circuit and protective circuit as rectification and continued flow component, can the decrease power consumption, improve circuit efficiency and frequency of utilization, reduce circuit noise.Flourish along with power electronic technology, the premium properties such as the high frequency of Schottky diode, low-power consumption will win vast potential for future development for it.
Schottky diode is the silicon epitaxial wafer that is made of heavily doped silicon substrate and lightly doped silicon epitaxy layer, the Schottky contacts of epitaxial surface, and the metal electrode above the Ohm contact electrode of substrate back and Schottky contacts forms.Yet; schottky junctions synapsis at limited area; reverse breakdown voltage can be limited in below 100V usually; this is concentrated the causing of the crooked caused electric field in space charge region by Schottky barrier area edge place; therefore usually adopt P+ guard ring structure to improve its reverse breakdown voltage around Schottky contacts, make reverse breakdown voltage near the reverse breakdown voltage of cylinder knot.
Fig. 1 is the structural representation of conventional schottky, as can be seen from the figure this Schottky diode comprises semiconductor the first semiconductor layer 2, be located at the metal electrode 1 at the back side under semiconductor the first semiconductor layer 2, be located at the epitaxial loayer 3 on semiconductor the first semiconductor layer 2, P type the second guard ring 15 of being located at P type the first guard ring 14 in epitaxial loayer and separating with it, be located at the barrier metal layer 6 between the first guard ring and the second guard ring on epitaxial loayer, be located at the extra-regional oxide layer 8 of barrier metal on epitaxial loayer, be located at the second metal electrode 7 on epitaxial loayer.In figure, the first guard ring 14 and the second guard ring 15 are in order to reduce the electric field strength at Schottky barrier area edge place; improve the reverse breakdown voltage of device with this; but owing to will guaranteeing under the less prerequisite of forward conduction voltage that (make epitaxial thickness and electrical resistivity of epitaxy as far as possible little) is difficult to do very highly to the reverse breakdown voltage of guard ring; can make like this guard ring breakdown prior to schottky junction, cause the reverse breakdown voltage of device to be difficult to the value that reaches larger.And due to the impact of the p-n junction that consists of between guard ring and epitaxial loayer, cause that this structure recovery time is long, parasitic capacitance is large, reduced its high frequency characteristics.
Summary of the invention
In prior art, Schottky diode easily punctures in order to solve, the problems such as conducting voltage height.
The present invention proposes a kind of Schottky diode, comprise: the first semiconductor layer, be located at the first metal electrode under the first semiconductor layer, be located at the first groove spaced apart from each other and the second groove in the first semiconductor layer, be arranged in the insulating barrier of groove and the packed layer on insulating barrier, be located on the first semiconductor layer barrier metal layer between the first groove and the second groove, be located at the oxide layer outside barrier metal layer on the first semiconductor layer, and be located at the second metal electrode on the first semiconductor layer, described gash depth is 2um to 7um.
Further, the present invention also comprises the second semiconductor layer of being located between the first semiconductor layer and the first metal electrode.
Further, groove width of the present invention is 5um to 30um.
Further, the insulating barrier in groove of the present invention is silicon dioxide layer or silicon nitride layer; Packed layer in groove is polysilicon layer.
The silicon dioxide layer of filling in groove of the present invention further, or the thickness of silicon nitride layer are 1um to 2um.
Further, the corner of groove of the present invention is arc.
The invention also discloses a kind of manufacture method of Schottky diode, comprise the following steps:
(a) form oxide layer on the first semiconductor layer;
(b) form photoresist layer on oxide layer;
(c) define trench openings, forming the degree of depth in the first semiconductor layer is 2um to 7um the first groove spaced apart from each other and the second groove;
(d) remove photoresist, form insulating barrier in groove;
(e) form polysilicon layer at the first semiconductor layer upper surface, remove the outer polysilicon layer of trench region;
(f) define the barrier region on the first semiconductor layer, form barrier metal layer on the barrier region;
(g) at the first semiconductor layer back side and the positive metal electrode that forms.
Further, the manufacture method of Schottky diode of the present invention also comprises step:
(a) form the first semiconductor layer on the second semiconductor layer,
(b) form oxide layer on the first semiconductor layer;
(c) form photoresist layer on oxide layer;
(d) define trench openings, form 2um to 7um the first groove spaced apart from each other and the second groove in the first semiconductor layer;
(e) remove photoresist, form insulating barrier in groove;
(f) form polysilicon layer at the first semiconductor layer upper surface, remove the outer polysilicon layer of trench region;
(g) define the barrier region on the first semiconductor layer, form barrier metal layer on the barrier region;
(h) form metal electrode at the back side of the second semiconductor layer and the front of the first semiconductor layer.
Further, in the manufacture method of Schottky diode of the present invention, groove width is 5um to 30um.
Further, in the manufacture method of Schottky diode of the present invention, the thickness of insulating layer in groove is 1um to 2um.
Further, in the manufacture method of Schottky diode of the present invention, the corner of groove is arc.
Beneficial effect, Schottky diode of the present invention, comprise, the first semiconductor layer, be located at the first metal electrode under the first semiconductor layer, be located at the first groove spaced apart from each other and the second groove in the first semiconductor layer, be arranged in the insulating barrier of groove and the packed layer on insulating barrier, be located on the first semiconductor layer barrier metal layer between the first groove and the second groove, be located at the oxide layer outside barrier metal layer on the first semiconductor layer, and be located at the second metal electrode on the first semiconductor layer, described gash depth is 2um to 7um; This Schottky junction structure improves the reverse breakdown voltage of schottky device, reduces simultaneously forward conduction voltage, can reduce again recovery time and the parasitic capacitance of device, improves its high frequency characteristics.
Description of drawings
Fig. 1 prior art Schottky diode structure schematic diagram.
Fig. 2 first embodiment of the invention Schottky diode structure schematic diagram.
Fig. 3 second embodiment of the invention Schottky diode structure schematic diagram.
Fig. 4-10 first embodiment of the invention Schottky diode manufacturing flow chart.
The reverse I-V characteristic of Figure 11 groove guard ring of the present invention structure and conventional P+guard ring structure and ideal plane schottky junction.
Figure 12 gash depth affects the Schottky diode reverse breakdown voltage.
Figure 13 groove width affects the Schottky diode reverse breakdown voltage.
In Figure 14 groove, thickness of insulating layer affects the Schottky diode reverse breakdown voltage.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is elaborated.Should be understood that, embodiment described herein only is used for description and interpretation the present invention, is not limited to the present invention.
Embodiment one
Fig. 2 is embodiment of the present invention Schottky diode structure schematic diagram, the present embodiment Schottky diode comprises as can be seen from Fig., N-the first semiconductor layer 3, be formed at first metal electrode 1 at first semiconductor layer 3 back sides, metal electrode is preferably the Ti/Ni/Ag multiple layer metal, and electrode 1 is formed at the first groove 4 spaced apart from each other and the second groove 5 in the first semiconductor layer 3 as the negative pole of Schottky diode, the degree of depth of groove is preferably 2um to 7um, and the present embodiment gash depth is 3um; The width of groove is preferably 5um to 30um, the groove width of this enforcement is 30um, the corner of groove is arranged to arc, be beneficial to the raising reverse breakdown voltage, grown in groove packed layer 9 on insulating barrier 10 and insulating barrier, insulating barrier 10 is silicon dioxide layer or silicon nitride layer, packed layer 9 is polysilicon, the thickness of insulating barrier silicon dioxide is preferably 1um to 2um, and the silicon dioxide thickness that the present embodiment is selected is 1um, and polysilicon has stronger filling capacity, can avoid trench fill to stay the cavity, affect device reliability; Be located at the barrier metal layer 6 between the first groove 4 and the second groove 5 on the first semiconductor layer 3, barrier metal layer 6 and the first semiconductor layer 3 form Schottky contacts; Be located at the extra-regional oxide layer 8 of barrier metal layer on the first semiconductor layer 3, oxide layer 8 is used for the isolation introduced contaminants and enters diode and prevent that external substance from damaging diode, and the oxide layer that the present embodiment adopts is silicon dioxide; Be arranged at the second metal electrode 7 that is used for the anodal extraction electrode of Schottky diode on the first semiconductor layer, this metal electrode is preferably Ti/Ni/Ag.
Embodiment two
Fig. 3 is embodiment of the present invention Schottky diode structure schematic diagram, the present embodiment Schottky diode comprises as can be seen from Fig., N+ the second semiconductor layer 2, be formed at first metal electrode 1 at second semiconductor layer 2 back sides, metal electrode is preferably Ti/Ni/Ag, electrode 1 is as the negative pole of Schottky diode, be formed at the first semiconductor layer 3 on the second semiconductor layer, be formed at the first groove 4 spaced apart from each other and the second groove 5 in the first semiconductor layer 3, the degree of depth of groove is preferably 2um to 7um, and the present embodiment is 3um; The width of groove is preferably 5um to 30um, the groove width of this enforcement is 30um, the corner of groove is arranged to arc, be beneficial to the raising reverse breakdown voltage, grown in groove packed layer 9 on insulating barrier 10 and insulating barrier, insulating barrier 10 is silicon dioxide layer or silicon nitride layer, packed layer 9 is polysilicon, and the present embodiment insulating barrier is selected silicon dioxide, and its thickness is preferably 1um to 2um, the silicon dioxide thickness that the present embodiment is selected is 1um, polysilicon has stronger filling capacity, can avoid trench fill to stay the cavity, affects device reliability; Be located at the barrier metal layer 6 between the first groove 4 and the second groove 5 on the first semiconductor layer 3, barrier metal layer 6 and the first semiconductor layer 3 form Schottky contacts; Be located at the extra-regional oxide layer 8 of barrier metal layer on the first semiconductor layer 3, oxide layer 8 is used for the isolation introduced contaminants and enters diode and prevent that external substance from damaging diode, and the oxide layer that the present embodiment adopts is silicon dioxide; Be arranged at the second metal electrode 7 that is used for the anodal extraction electrode of Schottky diode on the first semiconductor layer 3, this metal electrode is preferably Ti/Ni/Ag.
Embodiment three
The manufacture method of the embodiment of the present invention one Schottky diode comprises the following steps:
Step 1 as shown in Figure 4, is selected N-semiconductor the first semiconductor layer 3, forms oxide layer 8 on the first semiconductor layer 3, and oxide layer 8 is silicon dioxide, and its thickness is preferably 200nm to 500nm, and the present embodiment is selected 300nm.
Step 2 as shown in Figure 5, forms photoresist layer 11 on oxide layer 8.
Step 3, as shown in Figure 6, define trench openings, form the first groove 4 spaced apart from each other and the second groove 5 in the first semiconductor layer 3, the present embodiment utilizes plasma etching or reactive ion etching to form groove in the window etching that defines, the degree of depth of groove is preferably 2um to 7um, and the present embodiment is 3um; The width of groove is preferably 5um to 30um, and the groove width of this enforcement is 30um, and the corner of groove is arranged to arc,, be beneficial to the raising reverse breakdown voltage.
Step 4, as shown in Figure 7, after groove forms, remove photoresist layer 11, growth insulating barrier 10 in the groove, wherein insulating barrier is preferably silicon dioxide or silicon nitride, and the present embodiment is selected silicon dioxide, the thickness of silicon dioxide is preferably 1um to 2um, and the silicon dioxide thickness that the present embodiment is selected is 1um.
Step 5 as shown in Figure 8, at the upper surface formation polysilicon layer 9 of the first semiconductor layer 2, is removed the outer polysilicon layer of trench region on the first semiconductor layer, and the polysilicon layer here is for filling groove.
Step 6, as shown in Figure 9, define the barrier region on the first semiconductor layer, form barrier metal layer 6 by sputter on the barrier region, barrier metal can knownly can form with silicon material and the compound of schottky junction for titanium, platinum, molybdenum or other, the barrier metal that the present embodiment is selected is the Ni/Pt alloy, and barrier metal layer 6 and the first semiconductor layer 3 form Schottky contacts.
Step 7 as shown in figure 10, forms the second metal electrode 7 in the front of the first semiconductor layer, forms the first metal electrode 1 at the back side of the first semiconductor layer, and as the extraction electrode of Schottky diode, this metal electrode is preferably Ti/Ni/Ag.
For the manufacture method of the embodiment of the present invention two described Schottky diodes, those skilled in the art can draw according to the manufacture method of embodiment one described Schottky diode, and are no longer burdensome here.
The below compares the described Schottky diode of Schottky diode, the embodiment of the present invention of described P type guard ring in background and the reverse breakdown voltage of desirable Schottky diode, as shown in figure 11, the ordinate representative is added in the electric current on Schottky diode, abscissa represents the reverse breakdown voltage of Schottky diode, wherein, the A line represents the reverse I-V characteristic of Schottky diode described in background; The B line represents the reverse I-V characteristic of the present embodiment trench schottky diode; The C line represents the reverse I-V characteristic curve of ideal plane schottky junction; The as can be seen from the figure reverse breakdown voltage of the reverse breakdown voltage of trench schottky diode described Schottky diode in the background; and the puncture voltage of only tying less than the ideal plane; almost reached desirable reverse characteristic; as can be seen from the figure can significantly improve the reverse breakdown voltage of device by the designed structure of the embodiment of the present invention; puncture voltage than P+ guard ring structure improves 32V, and almost reaches the puncture voltage of ideal plane schottky junction.
The below is gash depth, the impact of silicide on the Schottky diode reverse breakdown voltage in width and groove, as shown in figure 12, be the impact of gash depth on the Schottky diode reverse breakdown voltage, in figure, abscissa represents gash depth, ordinate represents reverse breakdown voltage, considers groove with the manufacture difficulty of change in depth as can be seen from Fig. when the assurance reverse breakdown voltage is good, and it is that 2um is to 7um that the embodiment of the present invention is selected gash depth.
As shown in figure 13, be the impact of this groove width on the Schottky diode reverse breakdown voltage, in figure, abscissa represents groove width, ordinate represents reverse breakdown voltage, consider the chip cost problem that groove brings with width when the assurance reverse breakdown voltage is good, it is that 5um is to 30um that the embodiment of the present invention is selected groove width.
As shown in figure 14, be the impact of insulating barrier silicon dioxide thickness on the Schottky diode reverse breakdown voltage in groove, in figure, abscissa represents the thickness of silicon dioxide, ordinate represents reverse breakdown voltage, consider Cost Problems when the assurance reverse breakdown voltage is good, it is that 1um is to 2um that the embodiment of the present invention is selected the thickness of ditch silicon dioxide.
Figure 12, Figure 13, the insulating layer thickness of growing in described gash depth, width and the groove of Figure 14 is applicable to all embodiment in the present invention.
Comprehensive above explanation can draw, and the width of embodiment of the present invention groove only needs 5um can reach desirable puncture voltage, and conventional P+guard ring structure, the width of P+ ring needs 30um that obvious effect is just arranged at least.Utilize like this groove guard ring structure, both can keep the constant area that increases the barrier region of chip area to reach the purpose that reduces forward conduction voltage, can keep again the constant chip area that reduces of area in Schottky barrier district to save cost.And, owing to utilizing groove structure to replace the P+ guard ring, make device there is no the impact of PN junction Minority carrier injection, reduced recovery time and the parasitic capacitance of device, improved its high frequency characteristics.
Below describe by reference to the accompanying drawings the preferred embodiment of the present invention in detail; but; the present invention is not limited to the detail in above-mentioned execution mode; in technical conceive scope of the present invention; can carry out multiple simple variant to technical scheme of the present invention, these simple variant all belong to protection scope of the present invention.

Claims (11)

1. Schottky diode, it is characterized in that, comprise, the first semiconductor layer, be located at the first metal electrode under the first semiconductor layer, be located at the first groove spaced apart from each other and the second groove in the first semiconductor layer, be arranged in the insulating barrier of groove and the packed layer on insulating barrier, be located on the first semiconductor layer barrier metal layer between the first groove and the second groove, be located at the oxide layer outside barrier metal layer on the first semiconductor layer, and be located at the second metal electrode on the first semiconductor layer, described gash depth is 2um to 7um.
2. Schottky diode according to claim 1, is characterized in that, also comprises the second semiconductor layer of being located between the first semiconductor layer and the first metal electrode.
3. Schottky diode according to claim 1 and 2, is characterized in that, described groove width is 5um to 30um.
4. Schottky diode according to claim 1 and 2, is characterized in that, the insulating barrier in described groove is silicon dioxide layer or silicon nitride layer; Packed layer in groove is polysilicon layer.
5. Schottky diode according to claim 4, is characterized in that, the silicon dioxide layer of filling in described groove or the thickness of silicon nitride layer are 1um to 2um.
6. Schottky diode according to claim 1 and 2, is characterized in that, the corner of described groove is arc.
7. the manufacture method of a Schottky diode, is characterized in that, comprises the following steps:
(a) form oxide layer on the first semiconductor layer;
(b) form photoresist layer on oxide layer;
(c) define trench openings, forming the degree of depth in the first semiconductor layer is 2um to 7um the first groove spaced apart from each other and the second groove;
(d) remove photoresist, form insulating barrier in groove;
(e) form polysilicon layer at the first semiconductor layer upper surface, remove the outer polysilicon layer of trench region;
(f) define the barrier region on the first semiconductor layer, form barrier metal layer on the barrier region;
(g) at the first semiconductor layer back side and the positive metal electrode that forms.
8. the manufacture method of Schottky diode according to claim 7, is characterized in that, also comprises step:
(a) form the first semiconductor layer on the second semiconductor layer,
(b) form oxide layer on the first semiconductor layer;
(c) form photoresist layer on oxide layer;
(d) define trench openings, form 2um to 7um the first groove spaced apart from each other and the second groove in the first semiconductor layer;
(e) remove photoresist, form insulating barrier in groove;
(f) form polysilicon layer at the first semiconductor layer upper surface, remove the outer polysilicon layer of trench region;
(g) define the barrier region on the first semiconductor layer, form barrier metal layer on the barrier region;
(h) form metal electrode at the back side of the second semiconductor layer and the front of the first semiconductor layer.
9. the manufacture method of according to claim 7 or 8 described Schottky diodes, is characterized in that, described groove width is 5um to 30um.
10. the manufacture method of according to claim 7 or 8 described Schottky diodes, is characterized in that, the thickness of insulating layer in described groove is 1um to 2um.
11. the manufacture method of according to claim 7 or 8 described Schottky diodes is characterized in that, the corner of described groove is arc.
CN2011102540231A 2011-11-01 2011-11-01 Schottky diode and manufacturing method thereof Pending CN103094358A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103681885A (en) * 2013-12-18 2014-03-26 济南市半导体元件实验所 Schottky diode chip, Schottky diode device and manufacturing method for Schottky diode chip-composite barrier
CN106356402A (en) * 2016-08-31 2017-01-25 吉林麦吉柯半导体有限公司 There is al si3n4the fast recovery diode of ti/ni/ag structure
CN107346733A (en) * 2016-05-04 2017-11-14 北大方正集团有限公司 The preparation method of groove-shaped Schottky diode
CN109065637A (en) * 2018-07-13 2018-12-21 张家港意发功率半导体有限公司 A kind of trench schottky barrier diode and its manufacturing method
US10916626B2 (en) 2018-12-28 2021-02-09 Hong Kong Applied Science And Technology Research Institute Co., Ltd. High voltage power device with hybrid Schottky trenches and method of fabricating the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3513366A (en) * 1968-08-21 1970-05-19 Motorola Inc High voltage schottky barrier diode
US4607270A (en) * 1983-06-16 1986-08-19 Kabushiki Kaisha Toshiba Schottky barrier diode with guard ring
JP3691736B2 (en) * 2000-07-31 2005-09-07 新電元工業株式会社 Semiconductor device
CN101452967A (en) * 2007-11-30 2009-06-10 上海华虹Nec电子有限公司 Schottky barrier diode device and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3513366A (en) * 1968-08-21 1970-05-19 Motorola Inc High voltage schottky barrier diode
US4607270A (en) * 1983-06-16 1986-08-19 Kabushiki Kaisha Toshiba Schottky barrier diode with guard ring
JP3691736B2 (en) * 2000-07-31 2005-09-07 新電元工業株式会社 Semiconductor device
CN101452967A (en) * 2007-11-30 2009-06-10 上海华虹Nec电子有限公司 Schottky barrier diode device and manufacturing method thereof
CN101452967B (en) * 2007-11-30 2010-11-03 上海华虹Nec电子有限公司 Schottky barrier diode device and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103681885A (en) * 2013-12-18 2014-03-26 济南市半导体元件实验所 Schottky diode chip, Schottky diode device and manufacturing method for Schottky diode chip-composite barrier
CN103681885B (en) * 2013-12-18 2017-03-29 济南市半导体元件实验所 The preparation method of Schottky diode chip, device and chip composite potential barrier
CN107346733A (en) * 2016-05-04 2017-11-14 北大方正集团有限公司 The preparation method of groove-shaped Schottky diode
CN106356402A (en) * 2016-08-31 2017-01-25 吉林麦吉柯半导体有限公司 There is al si3n4the fast recovery diode of ti/ni/ag structure
CN109065637A (en) * 2018-07-13 2018-12-21 张家港意发功率半导体有限公司 A kind of trench schottky barrier diode and its manufacturing method
CN109065637B (en) * 2018-07-13 2021-07-16 张家港意发功率半导体有限公司 Groove Schottky barrier diode and manufacturing method thereof
US10916626B2 (en) 2018-12-28 2021-02-09 Hong Kong Applied Science And Technology Research Institute Co., Ltd. High voltage power device with hybrid Schottky trenches and method of fabricating the same

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Application publication date: 20130508