CN103681885B - The preparation method of Schottky diode chip, device and chip composite potential barrier - Google Patents
The preparation method of Schottky diode chip, device and chip composite potential barrier Download PDFInfo
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- 238000005036 potential barrier Methods 0.000 title claims abstract description 30
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000002131 composite material Substances 0.000 title claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 98
- 239000002184 metal Substances 0.000 claims abstract description 98
- 230000004888 barrier function Effects 0.000 claims abstract description 76
- 239000004065 semiconductor Substances 0.000 claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 33
- 239000010703 silicon Substances 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 32
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 30
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 33
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 22
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 21
- 229910052759 nickel Inorganic materials 0.000 claims description 18
- 238000009792 diffusion process Methods 0.000 claims description 17
- 238000000576 coating method Methods 0.000 claims description 15
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 15
- 238000004544 sputter deposition Methods 0.000 claims description 15
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 claims description 15
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 14
- 239000011248 coating agent Substances 0.000 claims description 14
- HBVFXTAPOLSOPB-UHFFFAOYSA-N nickel vanadium Chemical compound [V].[Ni] HBVFXTAPOLSOPB-UHFFFAOYSA-N 0.000 claims description 14
- 238000001259 photo etching Methods 0.000 claims description 14
- 229910052719 titanium Inorganic materials 0.000 claims description 14
- 239000010936 titanium Substances 0.000 claims description 14
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 13
- 238000000137 annealing Methods 0.000 claims description 12
- 229910052786 argon Inorganic materials 0.000 claims description 11
- 239000007788 liquid Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 9
- 238000005275 alloying Methods 0.000 claims description 8
- PCLURTMBFDTLSK-UHFFFAOYSA-N nickel platinum Chemical compound [Ni].[Pt] PCLURTMBFDTLSK-UHFFFAOYSA-N 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 7
- 229910052796 boron Inorganic materials 0.000 claims description 7
- 229910001260 Pt alloy Inorganic materials 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 5
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- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
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- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- VCJMYUPGQJHHFU-UHFFFAOYSA-N iron(III) nitrate Inorganic materials [Fe+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O VCJMYUPGQJHHFU-UHFFFAOYSA-N 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 229910052738 indium Inorganic materials 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 15
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- 239000000203 mixture Substances 0.000 abstract description 4
- 229910021332 silicide Inorganic materials 0.000 description 10
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- 230000008901 benefit Effects 0.000 description 5
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- 238000005516 engineering process Methods 0.000 description 4
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- 230000005611 electricity Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000003870 refractory metal Substances 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
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- 229910000765 intermetallic Inorganic materials 0.000 description 1
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- 238000005086 pumping Methods 0.000 description 1
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- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
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- 229910052682 stishovite Inorganic materials 0.000 description 1
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- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
- H01L29/66204—Diodes
- H01L29/66212—Schottky diodes
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention discloses the preparation method of a kind of Schottky diode chip, device and chip composite potential barrier, chip includes N-type silicon semiconductor substrate, the front of Semiconductor substrate is provided with NiPtSi barrier layers, the barrier layer and Semiconductor substrate directly contact, forms NiPtSi Si potential barriers.The inventive method is simple, low cost, practicability and effectiveness, using NiPt alloy as Schottky barrier metal, forms composition metal silicide-silicon contact berrier（NiPtSi‑Si）, gained chip and device overcome the contradiction of single metal barrier forward voltage drop and reverse leakage, and reverse leakage and positive pressure are very low, and resistance to elevated temperatures, antistatic property, backward energy impact property etc. are obtained for raising well.
Description
Technical field
The present invention be more particularly directed to a kind of composition metal Silicide/Si contacts the preparation technology of composite potential barrier and is combined containing this
The Schottky diode chip of potential barrier and device, are the key core technologies of schottky barrier device manufacture.
Background technology
Power SBD is that the metal-semiconductor junction principle formed using metal and semiconductor contact is made.
The electrical parameter of power schottky device mainly has：Forward voltage drop, backward voltage, reverse leakage etc..It belongs to a kind of low-power consumption, surpasses
High-speed semiconductor device, it is more as high frequency, low pressure, high current commutation diode, fly-wheel diode, protection diode, also useful
Make commutation diode, small-signal detector diode in the circuits such as microwave communication to use, in communication power supply, frequency converter, intelligent hand
It is relatively common in machine etc..In order to balance the contradiction between Direct/Reverse characteristic so as to both with low forward voltage drop, have again less
Reverse leakage current, selects suitable barrier metal to be very crucial.
Applicant have studied a kind of power schottky device barrier method, Application No. in 2007
200710014421.X, the single metal molybdenum of the process selection are selected single Titanium as diffusion barrier, are adopted as barrier metal
Use H2The process meanses such as protection annealing, magnetron sputtering, the reversely forward characteristic of obtained device, pressure, reverse leakage current and anti-burning
Ruin ability preferable.But the technique and obtained device are also suffered from the drawback that：1st, barrier metal selects single metal molybdenum, it is impossible to
Barrier height is effectively adjusted, the contradiction between Direct/Reverse characteristic is balanced, it is the forward characteristic of device, reverse characteristic, reversely pressure
With it is anti-burn, antistatic effect need to be improved, in high temperature environments using being easy to burn；2nd, from titanium as diffusion barrier,
Although titanium adhesiveness is strong, activity is higher, stops that diffusion is weaker, reduces the anti-fatigue performance of device；3rd, exist
Under high current density, deelectric transferred performance is poor.
The fields such as current space flight and aviation, solar electrical energy generation, LED illumination, intelligent power, as the factors dictates such as environment are made
Schottky diode has high junction temperature, Low dark curient, high ESD, anti-reflective to the performance such as energy impact is strong.Therefore study new property
Preferably schottky device and technique are particularly significant for energy.
The content of the invention
The present invention is in order to make up the deficiency in background technology, there is provided a kind of Schottky diode chip and contain the core
The power schottky device of piece, the chip and device properties it is all fine, especially with good high temperature resistant, antistatic behaviour
Can, and reverse surge is big, reverse leakage current is little, and forward voltage drop is little, overcomes schottky device forward characteristic and reverse characteristic
Contradiction.
Present invention also offers the preparation method of Schottky diode chip composite potential barrier, the method low cost, practicality
Height, can adjust barrier height, reduce reverse leakage current, improve the forward characteristic of chip, reverse voltage endurance capability and it is anti-burn,
Anti-fatigue ability, can meet the requirement of high-temperature behavior and can meet the requirement of positive performance.
The present invention is achieved through the following technical solutions：
A kind of Schottky diode chip, is characterized in that：Including N-type silicon semiconductor substrate, the front of Semiconductor substrate sets
There are NiPtSi barrier layers, the barrier layer and Semiconductor substrate directly contact, form NiPtSi-Si potential barriers.
In above-mentioned Schottky diode chip, also including following structure：Oxide layer is provided with the front of Semiconductor substrate, institute
The middle part for stating oxide layer has windowing, and barrier layer, the barrier layer and Semiconductor substrate directly contact are provided with windowing
And extend in portion of oxide layer, front multilayer metallic electrode is provided with barrier layer, the back of the body is provided with the back side of Semiconductor substrate
Face multilayer metallic electrode.
In above-mentioned Schottky diode chip, the thickness of the NiPtSi barrier layers is 800.
In above-mentioned Schottky diode chip, the windowing longitudinal section is T-shaped.
In above-mentioned Schottky diode chip, protection ring is additionally provided with the semiconductor substrate, the protection ring is located at windowing
Edge, around windowing.The protection ring is formed by boron diffusion way.
In above-mentioned Schottky diode chip, the barrier layer covers table top and extends on the highest face temperature of oxide layer.
In above-mentioned Schottky diode chip, the front multilayer metallic electrode be followed successively by from the bottom to top tungsten titanium coating,
Nickel vanadium metal layer and silver metal layer；The back side multilayer metallic electrode is from top to bottom followed successively by titanium coating, nickel metal layer and silver
Metal level.
In above-mentioned Schottky diode chip, in the multilayer metallic electrode of front, tungsten titanium coating thickness is 1000, nickel vanadium
Metal layer thickness is 800, and silver metal layer thickness is 3 m；In the multilayer metallic electrode of the back side, titanium coating thickness is 3000, nickel
Metal layer thickness is 4000, and silver metal layer thickness is 2 m.
Schottky diode chip of the present invention can be used to make multiple power schottky device, including Schottky of the present invention two
The power schottky device of pole pipe chip is also within the scope of the present invention.
The power schottky device composite potential barrier of the present invention can be prepared using following steps：→ photoetching → boron of oxidation
Diffusion → main diffusion → secondary photoetching → sputtering barrier metal → vacuum annealing → stripping cleaning → magnetron sputtering front multilayer gold
Category → third photo etching → thinning back side → back side evaporation multiple layer metal → alloying → centre is tested and is drawn, burst.
The preparation method of above-mentioned Schottky diode chip composite potential barrier specifically includes following steps：
（1）Oxidation is carried out to N-type silicon semiconductor substrate and forms oxide layer；
（2）Carry out first time light and be engraved in formation windowing in oxide layer；
（3）Carry out the edge formation protection ring that boron is diffused in windowing；
（4）High temperature is main to expand propulsion junction depth；High temperature main diffusion, carries out protection ring junction depth propulsion；
（5）Second photoetching is carried out, barrier region window is formed；
（6）The magnetron sputtering barrier metal layer in the Semiconductor substrate in windowing, the barrier metal layer extend to part oxygen
Change on layer, the barrier metal layer material is nickel platinum alloy；
（7）Vacuum annealing, forms NiPtSi-Si potential barriers；
（8）Peel off the undesired barrier metal that cleaning does not form potential barrier；
（9）Front multilayer metallic electrode is prepared in barrier metal layer using magnetron sputtering mode；
（10）Carry out third time photoetching to perform etching front metal electrode；
（11）Thinning back side is carried out to Semiconductor substrate；
（12）Back side multilayer metallic electrode is prepared at the Semiconductor substrate back side using electron-beam evaporation mode；
（13）Carry out H2Alloying Treatment deepens the adhesion between each metal level, removes the natural oxygen on electrode metal surface
Change layer.
In above-mentioned preparation method, in the nickel platinum alloy, nickel content is 95-90wt%, and platinum content is 5-10wt%；Ni, Pt's
Purity more than 99.999%.
In above-mentioned preparation method, the condition of magnetron sputtering is：Argon pressure is 1.07Pa, silicon chip heating-up temperature is 150 DEG C-
200 DEG C, sputtering power is 3KW.
In above-mentioned preparation method, the condition of annealing is：460 DEG C -480 DEG C of temperature, time are 20-40 point, and optimal conditions is
470 DEG C continue 30 points.
In above-mentioned preparation method, during third time photoetching, the corrosive liquid of silver metal layer is consisted of:Fe(NO3)3∶H2O=500g∶
The corrosive liquid of 2000ml, tungsten titanium coating and nickel vanadium metal layer is consisted of：HNO3: HF volume ratio is 10: 1.
The present invention is used as barrier metal by NiPt alloy, through PROCESS FOR TREATMENT, forms NiPt alloy silicide ---
NiPtSi, defines NiPtSi-Si potential barriers, instead of traditional metal-semiconductor contact mode.The present invention is by barrier metal
NiPt alloy is changed to by Mo, one is that alloying metal is more higher than single metal controllability, the change of alloying component proportioning can be passed through
The adjustment of potential barrier height is realized, more flexibilities is provided to balance the contradiction between Direct/Reverse characteristic.Two is to select
During barrier metal, it is necessary to consider the stability and reliability of contact, consider from the stability of potential barrier, for N-type silicon, NiPt alloy
Barrier height is low, and it and Si are stable on metallurgy, so NiPt has good high-temperature stability.The present invention is selected
NiPt alloy overcomes the contradiction between forward characteristic and reverse characteristic as barrier metal, the forward voltage drop of device and reversely
The equal very little of leakage current, and there is good high temperature resistant, antistatic property, also with very high reverse surge, high temperature can be met
The requirement of performance can meet the requirement of positive performance again.
NiPtSi silicides can not only provide a suitable Schottky barrier, and can also prevent electrode metal and silicon it
Between reaction, but as metal electrode also easily reacts with silicide, form metallic compound, affect the electricity of device special
Property, it is therefore desirable to there is one layer of diffusion barrier.The most important parameters for selecting diffusion barrier material are recrystallization temperature, resistivity and original
Sub- diffusion coefficient, the present invention select alloy WTi as diffusion barrier, and compared with the higher titanium of activity, tungsten-titanium alloy is combined
The advantage of tungsten and titanium, the barrier layer for being formed are more fine and close, and stability is higher, and while have very good adhesion, can be effective
Ground stops the mutual expansion between each metal and silicide etc., from NiV alloys as the barrier layer between electrode layer Ag and WTi, enters
One step substantially increases the anti-fatigue performance of device and deelectric transferred.
The present invention has the beneficial effect that：
The inventive method is simple, low cost, practicability and effectiveness, using NiPt alloy as Schottky barrier metal, forms multiple
Close metal silicide-silicon contact berrier（NiPtSi-Si）, barrier height is low, and reversing the current is little, by adjusting alloy compositions also
Barrier height can be adjusted.Select alloying metal WTi, NiV as diffusion barrier, effectively block each metal and silicide etc.
Between mutual expansion, substantially increase the anti-fatigue performance of device.Simultaneously by the adjustment of each technological parameter, produced Schottky is made
The unfailing performance of device is greatly improved, and overcomes the contradiction of single potential barrier MO technique forward voltage drop and reverse leakage, gram
The low defect of the unfailing performance such as high temperature, antistatic, backward energy is taken.Composite potential barrier Schottky chip of the present invention and device are accomplished
Reverse leakage and positive pressure are low, while make resistance to elevated temperatures, antistatic property, backward energy impact property be obtained for very
Good raising.Due to performance boost, composite potential barrier Schottky diode of the present invention can be used for Aero-Space, solar electrical energy generation,
LED illumination, intelligent power lamp etc. require higher new energy field.
Description of the drawings
The present invention is further illustrated below in conjunction with the accompanying drawings.
Fig. 1 is the structural representation in vertical section of the present invention.
In figure, 1 protection ring, 2 oxide layers, 3 barrier layers, 4 tungsten titanium coatings, 5 nickel vanadium metal layers, 6 silver metal layers, 7 titaniums
Category layer, 8 nickel metal layers, 9 silver metal layers, 10 Semiconductor substrates.
Specific embodiment
Below the principle and advantage of the present invention is conducted further description and explained, so that those skilled in the art can
It is better understood from the present invention, it should be appreciated that, the description below only plays a part of to explain, illustrates, not to essence of the invention
Property content is defined, and all improvement within thinking of the present invention all should be within the scope of the present invention.
Embodiment 1
Power schottky device of the present invention is as shown in figure 1, have Semiconductor substrate 10, substrate is N-type silicon chip, in semiconductor
The front of substrate is provided with silica oxide layer 2, and the middle part of the oxide layer has windowing, and the longitudinal section of windowing is T-shaped,
So that the side of oxide layer windowing is step, barrier layer 3 is provided with windowing, barrier layer covers the table top of oxide layer and prolongs
Reach on the highest face temperature of oxide layer, barrier layer material is NiPtSi, barrier layer and Semiconductor substrate directly contact, is formed
NiPtSi-Si potential barriers, are provided with front multilayer metallic electrode on barrier layer, are provided with back side multilayer gold at the back side of Semiconductor substrate
Category electrode.Protection ring 1 is additionally provided with the semiconductor substrate, and the protection ring surrounds windowing, positioned at the edge of windowing.
The thickness of the NiPtSi barrier layers is preferably 800.
The front multilayer metallic electrode is followed successively by tungsten titanium coating 4, nickel vanadium metal layer 5 and silver metal layer 6 from the bottom to top,
Tungsten titanium coating thickness is 1000, and nickel vanadium metal thickness degree is 800, and silver metal layer thickness is 3 m.The back side multiple layer metal
Electrode is from top to bottom followed successively by titanium coating 7, nickel metal layer 8 and silver metal layer 9, and titanium coating thickness is 3000, nickel metal layer
Thickness is 4000, and silver metal layer thickness is 2 m.
The present invention selects composition metal silicide-silicon contact berrier（NiPtSi-Si）, it is to avoid surface defect with stain,
And reduce the impact of surface state, improve device forward characteristic, reversely the impact of pressure, backward energy, high temperature resistant, resist it is quiet
Electricity, burn-out resistance；Chip reverse leakage current can also be made little, the requirement of high-temperature behavior can be met and positive performance can be met
Require.Barrier height can also be adjusted by adjusting Ni, Pt component.
The present invention increases a protection ring at potential barrier edge, by protection ring to improve reverse pressure and reverse characteristic
Increase the radius of curvature of metal level edge depletion layer.
The present invention selects refractory metals tungsten titanium and nickel vanadium as diffusion barrier, mutual expansion that can effectively between barrier metal, greatly
The big anti-fatigue performance for improving device.
Embodiment 2
The preparation method of the power schottky device composite potential barrier of the present invention, comprises the following steps：
（1）Oxidation：Silicon chip is aoxidized, in its Surface Creation oxide layer SiO2；
（2）A photoetching is carried out to silicon chip, in oxide layer formed ring-shaped groove window, window longitudinal section be T-shaped, photoetching
Oxidation layer surface afterwards is plane, and in ring-shaped groove window side with a table top, the height of the table top is less than oxygen to oxide layer
Change the height of layer surface, thus oxide layer ring-shaped groove window side has the edge of step；
（3）Boron spreads：Protection ring is made on silicon chip using the boron diffusion way of solid-state sheet BN；
（4）Main diffusion：Using 1100 DEG C of high temperature, protection ring junction depth propulsion is carried out, the time is 1h or so；
（5）Secondary photoetching is carried out, barrier region window is formed；
（6）Sputtering barrier metal:Barrier metal, barrier metal are prepared on silicon chip and oxide layer using magnetron sputtering mode
For nickel platinum alloy（NiPt）；
（7）Vacuum annealing:Make between barrier metal and silicon chip, to generate metal silicide NiPtSi, so as to form NiPtSi-
Si potential barriers；
（8）Peel off cleaning：The excess metal for not forming potential barrier is peeled off and is washed；
（9）Magnetron sputtering front multiple layer metal:Front multiple layer metal is prepared on barrier metal using magnetron sputtering mode
Electrode（Also referred to as multilayer metallic electrode）, ground floor from the bottom to top is tungsten titanium coating, is made using refractory metals tungsten titanium
It is the diffusion barrier with barrier metal contact, thickness is 1000, the second layer is nickel vanadium metal layer, and material is nickel-vanadium alloy, thickness
For 800, third layer is silver metal layer, and material is silver, and thickness is 3 m；
（10）Third photo etching：Front multilayer metallic electrode is performed etching, the optimal corrosive liquid that etching needs is：Silver metal
Layer corrosive liquid is Fe (NO3)3The aqueous solution, tungsten titanium, nickel vanadium, titanium, nickel metal layer corrosive liquid be HNO3With the mixed liquor of HF；
（11）Thinning back side：Using high accuracy（±5μm）It is thinning that silicon chip spinning grinding method carries out silicon chip back side；
（12）Evaporate multiple layer metal in the back side；Back side multiple layer metal electricity is prepared in silicon chip back side using electron-beam evaporation mode
Pole, ground floor from top to bottom is titanium coating, and material is titanium, and thickness is 3000, and the second layer is nickel metal layer, and material is nickel,
Thickness is 4000, and third layer is silver metal layer, and material is silver-colored, and thickness is 2 m；
（13）Alloying：In H2Alloying furnace internal heater part, makes to deepen to combine between metal and between metal and silicide
Power, while the natural oxidizing layer of reducing electrode metal surface makes which increase welded encapsulation pulling force；
（14）Test and cutting burst.
The present invention prepares barrier metal using magnetron sputtering technique, and barrier metal is NiPt alloy, the nickel platinum alloy
In, nickel content is 95-90wt%, and platinum content is 5-10wt%, and the purity of Ni, Pt is more than 99.999%.Magnetron sputtering is and gas
A kind of film deposition technique that electric discharge phenomena are associated, advantage are to sputter various alloys and refractory metal, and are had
There are preferable uniformity, repeated and good Step Coverage, metallic film is also preferable with the mechanical adhesion of substrate.Impact is splashed
The technological factor for penetrating metallic film is argon pressure, silicon chip heating-up temperature, sputtering power.Sputtering barrier metal when condition be：
Argon pressure is 1.07Pa, and silicon chip heating-up temperature is 150 DEG C -200 DEG C, and sputtering power is 3KW.Argon pressure is too high, in collision
Middle lost kinetic energy is more, affects the compactness of deposited film；Pressure is too low, does not have the effect of glow discharge, also just up to not
To the ability of bombardment target, it is impossible to sputtered metal film.Silicon chip heating-up temperature is too low, the active gases of silicon chip absorption, micro oil
The active gases of molecule and steam and vacuum chamber cavity remaining cannot just discharge；Heating-up temperature is too high, will be dry to cleaning
Net silicon chip causes new oxide layer, so as to affect contact of the metal with silicon chip.Sputtering power is too low, and speed is slow, film layer attachment
Power is poor, and short texture, Step Coverage are bad.
By taking varian3190 sputtering units as an example, the present invention can carry out magnetron sputtering, this area using following sputtering methods
Technical staff can also select other magnetically controlled sputter methods of the prior art：
1）Automated operator is selected, 180 DEG C ± 10 DEG C of substrate heating temperature, argon pressure 1.07Pa is set（8×10- 3
Torr）, sputtering power 25%（3.0kW）, sputtering time 60s.
2）Open mechanical pump valve to start to take out low vacuum, when vacuum is extracted into≤10.67Pa (8 × 10- 2Torr) when, close machine
Tool pump valve, opens condenser pump and starts pumping high vacuum, when the vacuum of vacuum chamber is extracted into≤2.67 × 10- 4Pa（2×10- 6Torr）When,
Heater switch, argon gas valve and argon pressure switch is opened, high voltage power supply is opened.
3）When the pressure of argon gas is shown as 1.07Pa（8×10- 3Torr）, " Regulate " indicator lamp of power supply is shown as yellow
During color, press " LOAD " key and perform automated operator.
4）Always wear your gloves, washed silicon chip is reversed in the sputtering gaily decorated basket, when operator is towards the gaily decorated basket by the gaily decorated basket is cleaned
During locating slot, it is desirable to which, towards the right side, the back side is towards a left side for front side of silicon wafer；When the musical sound of configuration processor is heard, open into film gate, according to fixed
The position that position groove is required puts the sputtering gaily decorated basket well, pushes to into film gate, starts to perform automated operator, carries out splashing for barrier metal
Penetrate.
5）Sputtering is finished, and closes high voltage power supply, heater switch, argon gas valve and argon pressure switch.
6）Film gate is opened out, the silicon chip extracting for having sputtered is reversed in the transmission gaily decorated basket, be placed in transmission box.Visual inspection piecewise is splashed
Penetrate rear silicon chip surface.Require surface-brightening, cleaning, densification, without water mark and spot, without peeling, metal film solid colour, thickness are equal
It is even.
The present invention adopts multilayer metallic electrode, and multi-layer metal structure is mutually to take long benefit using the respective advantage of several metals
It is short, make that the contact between multiple layer metal is stable, tight, adhesiveness is good, make between metal and metal and silicide etc. between contact
Well, contact loss is reduced, and is improved the reliability of device, is increased the service life.Using magnetron sputtering mode on barrier metal
Prepare front multilayer metallic electrode（Also referred to as multilayer metallic electrode）, multilayer gold in the back side is prepared using electron beam evaporation process
Category electrode, electron beam evaporation be the electron beam for being accelerated using Jing high pressure and being focused on come heating evaporation source, be allowed to evaporate and be deposited on
Silicon chip surface forms metallic film.
During third time photoetching of the present invention, the optimal corrosive liquid of each layer metal is：The formula of silver metal corrosive liquid is:Fe
(NO3) 3: H2O=500g: 2000ml, tungsten titanium, the corrosive liquid of nickel vanadium metal are HNO3: HF=10: 1.（Volume ratio, rises）
The present invention forms metal silicide using the technique of vacuum annealing, and vacuum is 2 × 10- 3Torr（1 Torr=
133.3224Pa）.The technological condition for affecting metal silication physical performance is annealing temperature, and during annealing, temperature is 460 DEG C -480
DEG C, the time is 20-40 point, and optimal conditions continues 30 points for 470 DEG C.
Schottky diode performance with composite potential barrier chip of the present invention is significantly larger than traditional single metal barrier
Diode, below with nickel, platinum content as 92:As a example by 8 composite potential barrier Schottky diode, to product of the present invention and traditional product
The difference of performance is contrasted, as a example by product type is SR3A0, as a result such as following table：
Claims (8)
1. a kind of Schottky diode chip, is characterized in that：Including N-type silicon semiconductor substrate, in N-type silicon semiconductor substrate just
Face is provided with oxide layer, and the middle part of the oxide layer has the windowing that longitudinal section is T-shaped, in windowing is provided with NiPtSi potential barriers
Layer, the thickness of barrier layer are 800, the barrier layer and Semiconductor substrate directly contact, form NiPtSi-Si potential barriers；In gesture
Barrier layer is provided with front multilayer metallic electrode, is provided with back side multilayer metallic electrode at the back side of Semiconductor substrate, and the front is more
Layer metal electrode is followed successively by tungsten titanium coating, nickel vanadium metal layer and silver metal layer from the bottom to top；It is additionally provided with the semiconductor substrate
Protection ring, the protection ring are located at the edge of windowing, and the protection ring is formed by boron diffusion way；
In NiPtSi barrier layers, nickel accounts for the 95-90wt% of nickel platinum total amount, and platinum accounts for the 5-10wt% of nickel platinum total amount.
2. Schottky diode chip according to claim 1, is characterized in that：The back side multilayer metallic electrode is by up to
Under be followed successively by titanium coating, nickel metal layer and silver metal layer.
3. Schottky diode chip according to claim 1, is characterized in that：In the multilayer metallic electrode of front, tungsten titanium
Category thickness degree is 1000, and nickel vanadium metal thickness degree is 800, and silver metal layer thickness is 3 m.
4. Schottky diode chip according to claim 2, is characterized in that：In the multilayer metallic electrode of the back side, titanium
Thickness degree is 3000, and nickel metal layer thickness is 4000, and silver metal layer thickness is 2 m.
5. a kind of power schottky device, is characterized in that：Including the Schottky diode core any one of claim 1-4
Piece.
6. the preparation method of the Schottky diode chip composite potential barrier described in a kind of claim 1, is characterized in that including following
Step：
（1）Oxidation is carried out to N-type silicon semiconductor substrate and forms oxide layer；
（2）Carry out first time light and be engraved in formation windowing in oxide layer；
（3）Carry out the edge formation protection ring that boron is diffused in windowing；
（4）1100 DEG C of main expansions of high temperature advance junction depth；
（5）Second photoetching is carried out, barrier region window is formed；
（6）The magnetron sputtering barrier metal layer in the Semiconductor substrate in windowing, the barrier metal layer extend to portion of oxide layer
On, the barrier metal layer material is nickel platinum alloy；
（7）Vacuum annealing, forms NiPtSi-Si potential barriers；
（8）Peel off the undesired barrier metal that cleaning does not form potential barrier；
（9）Front multilayer metallic electrode is prepared in barrier metal layer using magnetron sputtering mode；
（10）Carry out third time photoetching to perform etching front metal electrode；
（11）Thinning back side is carried out to Semiconductor substrate；
（12）Back side multilayer metallic electrode is prepared at the Semiconductor substrate back side using electron-beam evaporation mode；
（13）Carry out H2Alloying Treatment deepens the adhesion between each metal level, removes the natural oxidizing layer on electrode metal surface；
The vacuum of vacuum annealing is 2 × 10- 3Torr, the condition of annealing is：460 DEG C -480 DEG C of temperature, time are 20-40 point；
Step（6）In, in the nickel platinum alloy, nickel content is 95-90wt%, and platinum content is 5-10wt%.
7. preparation method according to claim 6, is characterized in that：The condition of magnetron sputtering is：Argon pressure is 1.07Pa,
Silicon chip heating-up temperature is 150 DEG C -200 DEG C, and sputtering power is 3KW；
During third time photoetching, the corrosive liquid of silver metal layer is consisted of:Fe(NO3)3∶H2O=500g: 2000ml, tungsten titanium coating and
The corrosive liquid of nickel vanadium metal layer is consisted of：HNO3: HF volume ratio is 10: 1.
8. preparation method according to claim 6, is characterized in that：The condition of annealing is：470 DEG C continue 30 points.
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| EP2942805B1 (en) * | 2014-05-08 | 2017-11-01 | Nexperia B.V. | Semiconductor device and manufacturing method |
| CN104505345A (en) * | 2014-12-19 | 2015-04-08 | 扬州国宇电子有限公司 | Method for preparing Schottky diode P+ type diffusion protection ring by use of CSD process |
| CN106298482A (en) * | 2015-05-29 | 2017-01-04 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor structure |
| CN107546120B (en) * | 2016-06-24 | 2021-04-09 | 北大方正集团有限公司 | Metal electrode of diode, preparation method and diode |
| CN107564813A (en) * | 2017-08-30 | 2018-01-09 | 吉林麦吉柯半导体有限公司 | The twice annealing manufacture method of Schottky diode |
| CN108063090A (en) * | 2017-12-14 | 2018-05-22 | 北京世纪金光半导体有限公司 | A kind of low barrier Schottky diode and preparation method thereof |
| CN108321212A (en) * | 2017-12-21 | 2018-07-24 | 秦皇岛京河科学技术研究院有限公司 | The preparation method and its structure of SiC Schottky diode |
| CN108493256A (en) * | 2018-04-28 | 2018-09-04 | 江阴新顺微电子有限公司 | CVD Schottky diodes chip and manufacturing process under a kind of no aluminium |
| CN109585570A (en) * | 2018-12-19 | 2019-04-05 | 吉林麦吉柯半导体有限公司 | The manufacturing method of Schottky diode, NIPT95 alloy and Schottky diode |
| CN110729352A (en) * | 2019-10-09 | 2020-01-24 | 杭州电子科技大学 | Potential barrier adjusting method of silicon carbide Schottky diode |
| CN113140456A (en) * | 2020-01-19 | 2021-07-20 | 珠海格力电器股份有限公司 | Power semiconductor chip and preparation method thereof |
| CN113257893A (en) * | 2021-04-30 | 2021-08-13 | 北海惠科半导体科技有限公司 | Schottky diode and manufacturing method and chip thereof |
| CN113517356B (en) * | 2021-05-21 | 2023-08-04 | 浙江芯科半导体有限公司 | 4H-SiC diode based on step-shaped P-type CBN and SiC mixed structure and preparation method thereof |
| CN114122109A (en) * | 2021-11-24 | 2022-03-01 | 扬州国宇电子有限公司 | Preparation method of trench diode barrier layer |
| WO2024122085A1 (en) * | 2022-12-06 | 2024-06-13 | 新電元工業株式会社 | Schottky barrier diode |
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