CN108110098A - Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents
Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof Download PDFInfo
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- CN108110098A CN108110098A CN201711010645.3A CN201711010645A CN108110098A CN 108110098 A CN108110098 A CN 108110098A CN 201711010645 A CN201711010645 A CN 201711010645A CN 108110098 A CN108110098 A CN 108110098A
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- 229910002601 GaN Inorganic materials 0.000 title claims description 47
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims description 28
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 230000004888 barrier function Effects 0.000 claims description 17
- 230000000694 effects Effects 0.000 abstract description 11
- 239000013078 crystal Substances 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 4
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 3
- 230000010287 polarization Effects 0.000 abstract 1
- 230000007704 transition Effects 0.000 abstract 1
- 239000011777 magnesium Substances 0.000 description 15
- 229910021478 group 5 element Inorganic materials 0.000 description 10
- 238000000034 method Methods 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000002441 X-ray diffraction Methods 0.000 description 4
- 238000000137 annealing Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 229910052738 indium Inorganic materials 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The epitaxial wafer comprises a superlattice buffer layer, the superlattice buffer layer is of a superlattice structure comprising N periods, the superlattice structure of each period comprises a first sublayer, a second sublayer and a third sublayer, the first sublayer, the second sublayer and the third sublayer are arranged on a substrate In a stacking mode, lattice mismatch between the substrate and a GaN layer can be relieved by doping Al into the first sublayer, defect density is reduced, crystal quality of the whole epitaxial layer is improved, antistatic capacity of L ED is further improved, transition effect can be achieved between the first sublayer and the second sublayer by doping Mg into the second sublayer, and lattice constant of the third sublayer can be improved by doping In into the third sublayer, so that stress release speed of an N-type layer can be improved, stress polarization effect of a multi-quantum well layer is reduced, and luminous efficiency of L ED is improved.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of gallium nitride based LED epitaxial slice and its manufacture
Method.
Background technology
LED (Light Emitting Diode, light emitting diode) is a kind of semiconductor electronic component that can be luminous.As
A kind of efficient, environmental protection, green New Solid lighting source, are widely applied rapidly, such as traffic lights, automobile
Inside and outside lamp, landscape light in city, cell phone back light source etc., it is the target that LED is constantly pursued to improve chip light emitting efficiency.
LED epitaxial wafer is the important component in LED, and existing gallium nitride based LED includes substrate and is layered in substrate
On epitaxial layer, epitaxial layer includes stacking gradually low temperature buffer layer on substrate, high temperature buffer layer, N-type layer, multiple quantum wells
Layer, electronic barrier layer and P-type layer, the electronics generated in N-type layer and the hole generated in P-type layer, carry under the action of electric field force to
Multiple quantum well layer migrates, and radiation recombination occurs in multiple quantum well layer and shines.
In the implementation of the present invention, inventor has found that the prior art has at least the following problems：
With the increase of gallium nitride based LED operating current, current density increases therewith, under this high current density, note
Enter the electronics in multiple quantum well layer also therewith to increase, part electronics is caused to fail compound and migrate in multiple quantum well layer with hole
Into p-type GaN carrier layers, cause the degree of electronics spill and leakage to increase, the antistatic effect of LED is deteriorated, and luminous efficiency declines.
The content of the invention
In order to solve the problem of that LED luminous efficiencies under high current density are low in the prior art, the embodiment of the present invention provides
A kind of gallium nitride based LED epitaxial slice and its manufacturing method.The technical solution is as follows：
On the one hand, the present invention provides a kind of gallium nitride based LED epitaxial slice, two poles of gallium nitride base light emitting
Pipe epitaxial wafer includes substrate and stacks gradually super-lattice buffer layer over the substrate, high temperature buffer layer, N-type layer, shallow well
Layer, multiple quantum well layer, low temperature P-type layer, P-type electron barrier layer, high temperature P-type layer, p-type contact layer,
The super-lattice buffer layer is to include the superlattice structure in N number of cycle, and the superlattice structure in each cycle includes layer
Folded setting the first sublayer, the second sublayer and the 3rd sublayer over the substrate, N are the integer more than or equal to 2, described first
Sublayer is AlxGa1-xN layers, 0<x<1, second sublayer is MgyGa1-yN layers, 0.5<y<1, the 3rd sublayer is InzGa1-zN
Layer, 0<z<1.
Further, the periodicity of the super-lattice buffer layer is 1 ＜ N≤20.
Further, the thickness of the super-lattice buffer layer is 10-50nm.
Further, 0.6<x<0.8,0.7<y<0.9,0.6<z<0.9.
On the other hand, the present invention provides a kind of manufacturing method of gallium nitride based LED epitaxial slice, the manufactures
Method includes：
One substrate is provided；
Super-lattice buffer layer is grown over the substrate, and the super-lattice buffer layer is to include the superlattices knot in N number of cycle
Structure, the superlattice structure in each cycle include being stacked the first sublayer, the second sublayer and the 3rd sublayer over the substrate,
N is the integer more than or equal to 2, and first sublayer is AlxGa1-xN layers, 0<x<1, second sublayer is MgyGa1-yN layers,
0.5<y<1, the 3rd sublayer is InzGa1-zN layers, 0<z<1；
Grow high temperature buffer layer, N-type layer, shallow well layer, multiple quantum well layer, low temperature P successively in the super-lattice buffer layer
Type layer, P-type electron barrier layer, high temperature P-type layer and p-type contact layer.
Further, the periodicity of the superlattice structure is 1 ＜ N≤20.
Further, the growth thickness of the super-lattice buffer layer is 10-50nm.
Further, the growth pressure of the super-lattice buffer layer is 50-200torr.
Further, the growth temperature of the super-lattice buffer layer is 1000-1100 DEG C.
Further, the super-lattice buffer layer is 200-600r/min in growth rotating speed.
The advantageous effect that technical solution provided in an embodiment of the present invention is brought is：
By growing super-lattice buffer layer on substrate, super-lattice buffer layer is made of three sublayers, and three sublayers include
First sublayer, the second sublayer and the 3rd sublayer, the first sublayer are AlxGa1-xN layers, 0<x<1, the Al in the first sublayer can be alleviated
Lattice mismatch between substrate and GaN layer reduces defect concentration, improves the crystal quality of entire epitaxial layer, so as to improve the anti-of LED
Electrostatic capacity.Second sublayer is MgyGa1-yN layers, 0.5<y<1, the Mg mixed in the second sublayer can be in the first sublayer and second
Transitional function is played between sublayer, alleviates the lattice mismatch between the first sublayer and the 3rd sublayer.3rd sublayer is InzGa1-zN
Layer, 0<z<1, the In in the 3rd sublayer can improve the lattice constant in the 3rd sublayer, and the stress so as to improve N-type layer is released
The speed put reduces the stress polarity effect of multiple quantum well layer, and then improves the luminous efficiency of LED.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of structure diagram of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is a kind of flow of the preparation method of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention
Figure.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
An embodiment of the present invention provides a kind of gallium nitride based LED epitaxial slice, Fig. 1 is that the embodiment of the present invention provides
A kind of gallium nitride based LED epitaxial slice structure diagram, as shown in Figure 1, the gallium nitride based light emitting diode includes
Substrate 1 and stack gradually super-lattice buffer layer 2 on substrate 1, high temperature buffer layer 3, N-type layer 4, shallow well layer 5, Multiple-quantum
Well layer 6, low temperature P-type layer 7, P-type electron barrier layer 8, high temperature P-type layer 9, p-type contact layer 10.
Wherein, super-lattice buffer layer 2 is to include the superlattice structure in N number of cycle, and the superlattice structure in each cycle includes
The first sublayer 21, the second sublayer 22 and the 3rd sublayer 23 on substrate 1 is stacked, N is the integer more than or equal to 2, the
One sublayer 21 is AlxGa1-xN layers, 0<x<1, the second sublayer 22 is MgyGa1-yN layers of composition, 0.5<y<1, the 3rd sublayer 23 is
InzGa1-zN layers, 0<z<1.
The embodiment of the present invention is made of by growing super-lattice buffer layer, super-lattice buffer layer on substrate three sublayers,
Three sublayers include the first sublayer, the second sublayer and the 3rd sublayer, and the first sublayer is AlxGa1-xN layers, 0<x<1, in the first sublayer
Al can alleviate lattice mismatch between substrate and GaN layer, reduce defect concentration, improve the crystal quality of entire epitaxial layer, from
And improve the antistatic effect of LED.Second sublayer is MgyGa1-yN layers, 0.5<y<1, the Mg mixed in the second sublayer can be
Transitional function is played between one sublayer and the second sublayer, alleviates the lattice mismatch between the first sublayer and the 3rd sublayer.3rd son
Layer is InzGa1-zN layers, 0<z<1, the In in the 3rd sublayer can improve the lattice constant in the 3rd sublayer, so as to improve N
The speed of the stress release of type layer reduces the stress polarity effect of multiple quantum well layer, and then improves the luminous efficiency of LED.
Further, the periodicity of super-lattice buffer layer 2 is 1 ＜ N≤20.
If the periodicity of super-lattice buffer layer 2 is less than 1, the luminous efficiency of LED cannot be improved.If super-lattice buffer layer 2
Periodicity be more than 20, then can increase production cost.
Further, the thickness of super-lattice buffer layer 2 is 10-50nm.
Preferably, 0.6<x<0.8,0.7<y<0.9,0.6<z<0.9, the antistatic effect of LED is best at this time.
Optionally, substrate 1 can be Sapphire Substrate.
Optionally, high temperature buffer layer 3 can be the GaN layer to undope, thickness 1-2um.N-type layer 4 can be to mix Si's
GaN layer, thickness 1.5-3.5um.
Optionally, shallow well layer 5 is to include InxGa1-xN(0<x<0.1) superlattice structure of potential well layer and GaN barrier layers is shallow
The periodicity of well layer 5 is 5-20.Wherein every layer of InxGa1-xN(0<x<0.1) thickness of potential well layer be 1-4nm, every layer of GaN potential barrier
The thickness of layer is 10-30nm.
Optionally, multiple quantum well layer 6 is to include InyGa1-yN(0.2<x<0.5) superlattices of potential well layer and GaN barrier layers
Structure, the periodicity of multiple quantum well layer 6 is 6-15.Wherein, every layer of InyGa1-yN(0.2<x<0.5) thickness of potential well layer is 2-
5nm, the thickness of every layer of GaN barrier layer is 5-15nm.
Optionally, low temperature P-type layer 7 is the GaN layer that thickness is 30-120nm, and P-type electron barrier layer 8 is that thickness is 50-
The AlGaN layer of 150nm, high temperature P-type layer 9 are that thickness is 50-150nmGaN layers.
Optionally, the thickness of p-type contact layer 10 is 3-10nm.
Embodiment two
An embodiment of the present invention provides a kind of manufacturing method of gallium nitride based LED epitaxial slice, suitable for embodiment
A kind of one gallium nitride based LED epitaxial slice provided, Fig. 2 is a kind of gallium nitride base light emitting provided in an embodiment of the present invention
The flow chart of the preparation method of diode epitaxial slice, as shown in Fig. 2, the manufacturing method includes：
Step 201 pre-processes substrate.
Optionally, substrate is sapphire, thickness 630-650um.
In the present embodiment, using Veeco K465i or C4MOCVD (Metal Organic ChemicalVapor
Deposition, metallo-organic compound chemical gaseous phase deposition) equipment realize LED growing method.Using high-purity H2(hydrogen)
Or high-purity N2(nitrogen) or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As N sources, trimethyl gallium (TMGa)
And triethyl-gallium (TEGa), as gallium source, trimethyl indium (TMIn) is used as indium source, silane (SiH4) is used as N type dopant, front three
Base aluminium (TMAl) is used as silicon source, two luxuriant magnesium (CP2Mg) it is used as P-type dopant.Chamber pressure is 100-600torr.
Specifically, which includes：
In a hydrogen atmosphere, high-temperature process substrate 5-20min.Wherein, reaction chamber temperature is 1000-1200 DEG C, reative cell
Pressure is controlled in 200-500torr, and nitrogen treatment is carried out to substrate.
Step 202 grows super-lattice buffer layer on substrate.
Specifically, after the completion of Sapphire Substrate high-temperature process, reaction chamber temperature is dropped to 500-900 DEG C, growth thickness
For the super-lattice buffer layer of 10-50nm.Super-lattice buffer layer is to include the superlattice structure in N number of cycle, the super crystalline substance in each cycle
Lattice structure includes being stacked the first sublayer, the second sublayer and the 3rd sublayer on substrate, 1 ＜ N≤20.Wherein the first sublayer
For AlxGa1-xN layers, 0.2<x<0.4, the second sublayer is MgyGa1-yN layers of composition, 0.5<y<0.6, the 3rd sublayer is InzGa1-zN
Layer, 0.1<z<0.3.
When growing super-lattice buffer layer, growth temperature can be 1000-1100 DEG C, growth pressure 50-200torr, raw
In growth process, the molar flow ratio of group-v element and group iii elements is 50-300, and growth rotating speed is 200-600r/min.
Further, after having grown super-lattice buffer layer, reaction chamber temperature is increased to 1000-1100 DEG C, and superlattices are delayed
Rush layer annealing 3-10min.
Step 203 grows high temperature buffer layer in super-lattice buffer layer.
In the present embodiment, high temperature buffer layer is the GaN layer to undope, thickness 1-2um.When growing high temperature buffer layer,
Reaction chamber temperature is 1000-1200 DEG C, and chamber pressure is controlled in 100-500torr, growth course, group-v element and three races
The molar flow ratio of element is 200-3000.
Step 204 grows N-type layer on high temperature buffer layer.
In the present embodiment, N-type layer is to mix the GaN layer of Si, thickness 1.5-3.5um.When growing N-type layer, room temperature is reacted
It spends for 950-1150 DEG C, chamber pressure is controlled in 300-500torr, growth course, and group-v element and group iii elements are rubbed
Your flow-rate ratio is 400-3000.
Step 205 grows shallow well layer in N-type layer.
In the present embodiment, shallow well layer is to include InxGa1-xN(0<x<0.1) the superlattices knot of potential well layer and GaN barrier layers
Structure, the periodicity of shallow well layer is 5-20, wherein, InxGa1-xThe growth temperature of N potential well layers is 750-850 DEG C, and growth pressure is
100-500Torr, thickness 1-4nm, in growth course, the molar flow ratio of group-v element and group iii elements is 500-10000.
The growth temperature of GaN barrier layers is 850-950 DEG C, growth pressure 100-500Torr, thickness 10-30nm, growth course
In, the molar flow ratio of group-v element and group iii elements is 500-10000.
Step 206 grows multiple quantum well layer on shallow well layer.
Multiple quantum well layer is to include InyGa1-yN(0.2<x<0.5) superlattice structure of potential well layer and GaN barrier layers, volume
The periodicity of sub- well layer is 6-15.Wherein, InyGa1-yThe growth temperature of N potential well layers is 700-850 DEG C, growth pressure 100-
500Torr, thickness 2-5nm, in growth course, the molar flow ratio of group-v element and group iii elements is 2000-20000, GaN
The growth temperature of barrier layer is 850-950 DEG C, growth pressure 100-500Torr, thickness 5-15nm, in growth course, five
The molar flow of race's element and group iii elements ratio is 2000-20000.
Step 207, the growing low temperature P-type layer on multiple quantum well layer.
Optionally, low temperature P-type layer is GaN layer, and growth temperature is 700-800 DEG C, growth pressure 100-600Torr, raw
For a long time for 3-15min, growth thickness 30-120nm, in growth course, the molar flow ratio of group-v element and group iii elements
For 1000-4000.
Step 208, the growing P-type electronic barrier layer in low temperature P-type layer.
Optionally, P-type electron barrier layer is AlGaN layer, and growth temperature is 900-1000 DEG C, growth pressure 50-
300Torr, growth time 4-15min, thickness 50-150nm, in growth course, mole of group-v element and group iii elements
Flow-rate ratio is 1000-10000.
Step 209 grows high temperature P-type layer in P-type electron barrier layer.
Optionally, high temperature P-type layer is GaN layer, and growth temperature is 900-1050 DEG C, growth pressure 100-500Torr, raw
For a long time for 10-20min, thickness 50-150nm, in growth course, the molar flow ratio of group-v element and group iii elements is
500-4000。
Step 210, the growing P-type contact layer in high temperature P-type layer.
Optionally, the growth temperature of p-type contact layer is 700-850 DEG C, growth pressure 100-500Torr, growth time
For 0.5-5min, thickness 3-10nm, in growth course, the molar flow ratio of group-v element and group iii elements is 10000-
20000。
After the growth of gallium nitride based LED epitaxial slice is terminated, the temperature of reative cell is down to 600-900 DEG C,
In PN2Atmosphere carries out annealing 10-30min, is then gradually decreased to room temperature, then, through over cleaning, deposition, photoetching and etching
The chip of single 9*27mil is made in subsequent machining technology.
Embodiment three
An embodiment of the present invention provides a kind of manufacturing method of gallium nitride based LED epitaxial slice, in the present embodiment
In, super-lattice buffer layer is to include the superlattice structure in N number of cycle, and the superlattice structure in each cycle includes being stacked serving as a contrast
The first sublayer, the second sublayer and the 3rd sublayer on bottom, 1 ＜ N≤20.Wherein, the first sublayer is AlxGa1-xN layers, 0.4<x<
0.6, the second sublayer is MgyGa1-yN layers of composition, 0.6<y<0.7, the 3rd sublayer is InzGa1-zN layers, 0.3<z<0.6.
After the growth of gallium nitride based LED epitaxial slice is terminated, the temperature of reative cell is down to 600-900 DEG C,
In PN2Atmosphere carries out annealing 10-30min, is then gradually decreased to room temperature, then, through over cleaning, deposition, photoetching and etching
The chip of single 9*27mil is made in subsequent machining technology.
It is found after being tested by XRD (X-ray diffraction, X-ray diffraction method), it is provided in an embodiment of the present invention
LED chip is compared with the LED chip provided in embodiment two, and XRD-002 faces half-breadth, which reduces by 17,102 face half-breadths, reduces by 13, warp
Find that antistatic effect improves 1.6% after LED core built-in testing, luminous efficiency improves 1.1%.
Example IV
An embodiment of the present invention provides a kind of manufacturing method of gallium nitride based LED epitaxial slice, in the present embodiment
In, super-lattice buffer layer is to include the superlattice structure in N number of cycle, and the superlattice structure in each cycle includes being stacked serving as a contrast
The first sublayer, the second sublayer and the 3rd sublayer on bottom, 1 ＜ N≤20.Wherein, the first sublayer is AlxGa1-xN layers, 0.6<x<
0.8, the second sublayer is MgyGa1-yN layers of composition, 0.7<y<0.9, the 3rd sublayer is InzGa1-zN layers, 0.6<z<0.9.
After the growth of gallium nitride based LED epitaxial slice is terminated, the temperature of reative cell is down to 600-900 DEG C,
In PN2Atmosphere carries out annealing 10-30min, is then gradually decreased to room temperature, then, through over cleaning, deposition, photoetching and etching
The chip of single 9*27mil is made in subsequent machining technology.
It is found after XRD is tested, LED chip provided in an embodiment of the present invention and the LED chip provided in embodiment two
It compares, XRD-002 faces half-breadth, which reduces by 22,102 face half-breadths, reduces by 18, finds that antistatic effect improves after LED core built-in testing
2.2%, luminous efficiency improves 1.8%.
The present invention is made of by growing super-lattice buffer layer, super-lattice buffer layer on substrate three sublayers, three sons
Layer includes the first sublayer, the second sublayer and the 3rd sublayer, and the first sublayer is AlxGa1-xN layers, 0<x<1, the Al in the first sublayer can
To alleviate the lattice mismatch between substrate and GaN layer, reduce defect concentration, the crystal quality of entire epitaxial layer is improved, so as to improve
The antistatic effect of LED, while the first sublayer can also stop that hole is moved to substrate direction.Second sublayer is MgyGa1-yN
Layer, 0.5<y<1, the Mg mixed in the second sublayer can effectively promote the concentration in hole, so as to improve the compound of electronics and hole
Probability.3rd sublayer is InzGa1-zN layers, 0<z<1, the In in the 3rd sublayer can improve the activation efficiency of Mg as catalyst,
More holoe carriers are provided, so as to improve the luminous efficiency of LED.
The foregoing is merely a prefered embodiment of the invention, is not intended to limit the invention, all in the spirit and principles in the present invention
Within, any modifications, equivalent replacements and improvements are made should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of gallium nitride based LED epitaxial slice, the gallium nitride based LED epitaxial slice include substrate and
Stack gradually super-lattice buffer layer, high temperature buffer layer, N-type layer, shallow well layer, multiple quantum well layer, low temperature p-type over the substrate
Layer, P-type electron barrier layer, high temperature P-type layer, p-type contact layer, which is characterized in that
The super-lattice buffer layer is to include the superlattice structure in N number of cycle, and the superlattice structure in each cycle, which includes being stacked, to be set
Put the first sublayer, the second sublayer and the 3rd sublayer over the substrate, N is the integer more than or equal to 2, first sublayer
For AlxGa1-xN layers, 0<x<1, second sublayer is MgyGa1-yN layers, 0.5<y<1, the 3rd sublayer is InzGa1-zN layers, 0
<z<1。
2. gallium nitride based LED epitaxial slice according to claim 1, which is characterized in that the super-lattice buffer layer
Periodicity be 1 ＜ N≤20.
3. gallium nitride based LED epitaxial slice according to claim 1 or 2, which is characterized in that the superlattices delay
The thickness for rushing layer is 10-50nm.
4. gallium nitride based LED epitaxial slice according to claim 1 or 2, which is characterized in that 0.6<x<0.8,0.7
<y<0.9,0.6<z<0.9.
5. a kind of manufacturing method of gallium nitride based LED epitaxial slice, which is characterized in that the manufacturing method includes：
One substrate is provided；
Super-lattice buffer layer is grown over the substrate, and the super-lattice buffer layer is to include the superlattice structure in N number of cycle, often
The superlattice structure in a cycle includes being stacked the first sublayer, the second sublayer and the 3rd sublayer over the substrate, and N is big
In or equal to 2 integer, first sublayer be AlxGa1-xN layers, 0<x<1, second sublayer is MgyGa1-yN layers, 0.5<y<
1, the 3rd sublayer is InzGa1-zN layers, 0<z<1；
Grown successively in the super-lattice buffer layer high temperature buffer layer, N-type layer, shallow well layer, multiple quantum well layer, low temperature P-type layer,
P-type electron barrier layer, high temperature P-type layer and p-type contact layer.
6. manufacturing method according to claim 5, which is characterized in that the periodicity of the super-lattice buffer layer for 1 ＜ N≤
20。
7. manufacturing method according to claim 6, which is characterized in that the growth thickness of the super-lattice buffer layer is 10-
50nm。
8. according to claim 5-7 any one of them manufacturing methods, which is characterized in that the growth pressure of the super-lattice buffer layer
Power is 50-200torr.
9. according to claim 5-7 any one of them manufacturing methods, which is characterized in that the growth temperature of the super-lattice buffer layer
It spends for 1000-1100 DEG C.
10. according to claim 5-7 any one of them manufacturing methods, which is characterized in that the growth of the super-lattice buffer layer
Rotating speed is 200-600r/min.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109545925A (en) * | 2018-11-26 | 2019-03-29 | 华灿光电股份有限公司 | A kind of GaN base light emitting epitaxial wafer and preparation method thereof |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020008245A1 (en) * | 1999-11-17 | 2002-01-24 | Werner Goetz | Semiconductor devices with selectively doped iii-v nitride layers |
| CN102047454A (en) * | 2008-04-16 | 2011-05-04 | Lg伊诺特有限公司 | Light-emitting device and fabricating method thereof |
| CN105098008A (en) * | 2015-06-10 | 2015-11-25 | 广西盛和电子科技股份有限公司 | GaN-based light-emitting diode (LED) epitaxy structure containing ternary superlattice and preparation method of GaN-based LED epitaxy structure |
-
2017
- 2017-10-25 CN CN201711010645.3A patent/CN108110098B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020008245A1 (en) * | 1999-11-17 | 2002-01-24 | Werner Goetz | Semiconductor devices with selectively doped iii-v nitride layers |
| CN102047454A (en) * | 2008-04-16 | 2011-05-04 | Lg伊诺特有限公司 | Light-emitting device and fabricating method thereof |
| CN105098008A (en) * | 2015-06-10 | 2015-11-25 | 广西盛和电子科技股份有限公司 | GaN-based light-emitting diode (LED) epitaxy structure containing ternary superlattice and preparation method of GaN-based LED epitaxy structure |
Cited By (13)
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|---|---|---|---|---|
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| CN109545925B (en) * | 2018-11-26 | 2020-04-10 | 华灿光电股份有限公司 | GaN-based light emitting diode epitaxial wafer and preparation method thereof |
| CN109860359B (en) * | 2018-11-26 | 2021-10-08 | 华灿光电（浙江）有限公司 | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof |
| CN109545925A (en) * | 2018-11-26 | 2019-03-29 | 华灿光电股份有限公司 | A kind of GaN base light emitting epitaxial wafer and preparation method thereof |
| WO2021052498A1 (en) * | 2019-09-20 | 2021-03-25 | 深圳市晶相技术有限公司 | Semiconductor epitaxial structure, application thereof and preparation method therefor |
| US11581269B2 (en) | 2019-10-17 | 2023-02-14 | Samsung Electronics Co., Ltd. | Semiconductor thin film structures and electronic devices including the same |
| CN114725256A (en) * | 2022-06-09 | 2022-07-08 | 江西兆驰半导体有限公司 | III-nitride epitaxial structure and preparation method thereof |
| CN115020559A (en) * | 2022-06-27 | 2022-09-06 | 淮安澳洋顺昌光电技术有限公司 | Light emitting diode and epitaxial structure thereof |
| CN116130569A (en) * | 2023-04-17 | 2023-05-16 | 江西兆驰半导体有限公司 | High-efficiency light-emitting diode and preparation method thereof |
| CN116247506A (en) * | 2023-05-12 | 2023-06-09 | 武汉鑫威源电子科技有限公司 | High-performance gallium nitride-based laser and N-type GaN layer and growth method thereof |
| CN116247506B (en) * | 2023-05-12 | 2023-08-29 | 武汉鑫威源电子科技有限公司 | High-performance gallium nitride-based laser and N-type GaN layer and growth method thereof |
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