CN102623597A - Structure of barrier in multiple quantum well for improving combination efficiency of carriers - Google Patents
Structure of barrier in multiple quantum well for improving combination efficiency of carriers Download PDFInfo
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- CN102623597A CN102623597A CN2012101223934A CN201210122393A CN102623597A CN 102623597 A CN102623597 A CN 102623597A CN 2012101223934 A CN2012101223934 A CN 2012101223934A CN 201210122393 A CN201210122393 A CN 201210122393A CN 102623597 A CN102623597 A CN 102623597A
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Abstract
The invention discloses a structure of a barrier in a multiple quantum well for improving the combination efficiency of carriers. The structure is a structure of a barrier in the last quantum well close to a p region and comprises a u-InGaN layer and a u-AlInGaN layer. Due to the u-InGaN layer, the defect density of a quantum well region can be effectively reduced, and stress of the quantum well region, which is caused by the mass of a lattice, is reduced; and furthermore, due to the u-AlInGaN layer, an energy bandgap of the barrier can be increased, an electron overflow phenomenon can be avoided, the combination efficiency of electrons and holes in the last quantum well of a luminous quantum well region is improved, and the luminous brightness is improved.
Description
Technical field
The present invention relates to semiconductor, the structure at the base in especially a kind of light-emitting diode in the SQW of raising charge carrier combined efficiency.
Background technology
In recent years, though realized being the marketization of LED device on basis with GaN,, be the trend of continuous enhancing on the contrary about the but interruption never of research of the luminescent device of GaN.This mainly is still to be lower than its theoretical value because of the luminous efficiency about GaN LED; It is low to cause the low main cause of GaN luminescent device luminous efficiency to be considered to internal quantum efficiency; Yet cause the existence that major reason is a polarized electric field that internal quantum efficiency is low; Make the band curvature in quantum well radiation district, cause the wave function in electronics and hole to overlap and reduce, thereby reduced the compound probability of charge carrier.The polarized electric field of quantum well region is considered to the time at the base because lower temperature is grown, the stress that relatively poor crystalline quality causes usually.
Because electronics has higher carrier mobility than the hole; The effective mass of electronics is also littler than the hole; Therefore usually need behind the multiquantum well region of having grown, add electronic barrier layer; A large amount of experiment proof electronic barrier layers can effectively reduce electronics and cross that quantum well region arrives p district and the hole is directly compound, have reduced the electronics overflow, and the raising charge carrier is compound quantum well region.A large amount of documents prove that also maximum for the radiation recombination contribution near last that SQW in p district in the LED device that with InGaN is SQW, this is to be determined by the distribution of hole concentration in quantum well region.Therefore, last electronics blocking capability to the base of quantum well structure has crucial effects for the charge carrier combined efficiency that with InGaN is the LED device of quantum well structure.
Summary of the invention
The object of the present invention is to provide the structure at the base in a kind of MQW that improves the charge carrier combined efficiency, particularly a kind of structure near the base in last SQW in p district (last barrier).This structure comprises u-InGaN layer and u-AlInGaN double-decker simultaneously, and the u-InGaN layer can effectively reduce the defect concentration of quantum well region, reduces quantum well region because the stress that lattice quality causes; Adopt u-AlInGaN can increase the band gap at base simultaneously, reduce the overflow of electronics, improve electronics and hole at the luminescent quantum well region, particularly the combined efficiency in last SQW improves luminosity.
Technical scheme of the present invention is: the structure at the base in a kind of MQW that improves the charge carrier combined efficiency; The structure of this LED epitaxial slice is followed successively by from bottom to top: substrate layer, gallium nitride low temperature buffer layer, unadulterated gallium nitride layer, n type gallium nitride layer, multi-quantum pit structure (MQW), p type aluminum gallium nitride electronic barrier layer, p type gallium nitride layer, p type gallium nitride contact layer; Special construction near the base in last quantum well structure in p district; This bag contains u-InaGa1-aN (0＜a＜1) layer and u-AlxInyGa1-x-yN (0＜x＜1; 0≤y＜1,0＜x+y＜1) layer.
Multi-quantum pit structure comprises that the u-AlxInyGa1-x-yN in 1 above cycle builds and the u-InbGa1-bN trap is formed (SQW is called a quantum well structure together to next nearest base).Whole multi-quantum pit structure can be divided into two parts, promptly near last quantum well structure in p district and the multi-quantum pit structure before this quantum well structure.
Last quantum well structure comprises that u-InaGa1-aN/u-AlxInyGa1-x-yN builds and the InbGa1-bN trap, and wherein bag contains u-InaGa1-aN layer and u-AlxInyGa1-x-yN layer, and 0＜a＜1 is arranged; 0＜x＜1; 0≤y＜1,0＜x+y＜1,0＜b＜1 and 0＜a＜b.U-InaGa1-aN is near trap InbGa1-bN layer.The u-InaGa1-aN/u-AlxInyGa1-x-yN structure that this base structure can be an one-period also can be the superlattice structure greater than one-period, and thickness altogether is no more than 100 nm.
Multi-quantum pit structure before last quantum well structure comprises that AlcIndGa1-c-dN builds and IneGa1-eN (0＜e＜1) trap, and its Zhonglei AlcIndGa1-c-dN satisfies 0≤c＜1,0≤d＜1,0≤c+d＜1.AlcIndGa1-c-dN in the multi-quantum pit structure before last quantum well structure builds that alternately appearance and cycle period are greater than 1 with IneGa1-eN (0＜e＜1) trap, and wherein the thickness of trap is between 1nm to 5nm; The thickness of building between 10 to 25nm, what the thickness of trap can be the same, also thickening or attenuation or thickness replace gradually gradually.
The thickness of trap is not less than the thickness of the trap in the multi-quantum pit structure in last quantum well structure.
The invention has the advantages that: adopted the structure at the base in the compound quantum well structure, particularly near the structure of the base in last SQW in p district (last barrier).AlxInyGa1-x-yN in this structure (0＜x＜1,0≤y＜1,0＜x+y＜1) layer can effectively improve the band gap at base, prevents the overflow of electronics, makes electronics compound in last the highest SQW of hole concentration, improves luminous intensity; The insertion at InaGa1-aN base simultaneously can effectively reduce the defect concentration of the quantum well region that causes because of lattice mismatch, reduces quantum well region because the stress that lattice defect causes.
Description of drawings
Fig. 1 is common LED structural representation;
Fig. 2 improves the LED structural representation that comprises multi-quantum pit structure and last quantum well structure in the SQW of charge carrier combined efficiency for the present invention;
Fig. 3 improves the enlarged drawing of last quantum well structure in the SQW of charge carrier combined efficiency for the present invention.
Embodiment
Below in conjunction with accompanying drawing and concrete embodiment to the present invention: the structure at the base in a kind of SQW that improves the charge carrier combined efficiency is done further explanation.
As shown in Figure 2ly provided specific embodiment of the present invention:
At first on Sapphire Substrate, form low temperature buffer layer (buffer layer), plain GaN (u-GaN) layer of then growing forms the si doping content then 5 * 10 on u-GaN
18Cm
-3N type GaN layer, then growth is by ten In
0.15Ga
0.85N SQW and ten GaN build the multi-quantum pit structure that forms, and wherein the thickness of trap is 3nm, and the thickness at base is 13nm.An In that thickness is 3 nm then grows after MQW has been grown
0.15Ga
0.85The N SQW, the In of 8 nm that grow then
0.03Ga
0.97N, the Al of 6 nm that then grow
0.03In
0.03Ga
0.94The N layer is formed last barrier jointly.P-Al then grows
0.15Ga
0.85N and Mg doping content are 5 * 10
19Cm
-3P type GaN layer, behind the p type of the having grown gallium nitride contact layer, the temperature of reaction chamber is reduced between 650 ℃ to 850 ℃, annealing in process is 5 to 15 minutes in the pure nitrogen gas atmosphere, reduces to room temperature then, finishes epitaxial growth.
Semiconducter process such as the epitaxial wafer to growth cleans, deposition, photoetching and etching are processed the led chip that single size is 10 * 16 mil.Test through led chip; Measuring current 20mA, single little chip optical output power is 23 mW, and adopts common multi-quantum pit structure shown in Figure 1; Last SQW still is the epitaxial structure of GaN, and single little chip brightness of identical chips processing procedure has only 18mW.
At first on Sapphire Substrate, form low temperature buffer layer (buffer layer), plain GaN (u-GaN) layer of then growing forms the si doping content then 5 * 10 on u-GaN
18Cm
-3N type GaN layer, then growth is by ten In
0.15Ga
0.85N SQW and ten GaN build the multi-quantum pit structure that alternately forms, and wherein the thickness of trap is 3nm, and the thickness at base is 13nm.An In that thickness is 3.3 nm then grows after MQW has been grown
0.15Ga
0.85The N SQW, the base structure in two cycles of growing then, this builds the In by 4 nm
0.03Ga
0.97The Al of N and 3 nm
0.03In
0.03Ga
0.94Two cycles of N layer alternating growth are formed jointly.P-Al then grows
0.15Ga
0.85N and Mg doping content are 5 * 10
19Cm
-3P type GaN layer, behind the p type of the having grown gallium nitride contact layer, the temperature of reaction chamber is reduced between 650 ℃ to 850 ℃, annealing in process is 5 to 15 minutes in the pure nitrogen gas atmosphere, reduces to room temperature then, finishes epitaxial growth.
Semiconducter process such as the epitaxial wafer to growth cleans, deposition, photoetching and etching are processed the led chip that single size is 10 * 16 mil.Through the led chip test, measuring current 20mA, single little chip optical output power is 25 mW.
Although described specific embodiment of the present invention; But those skilled in the art should recognize; Under the prerequisite that does not deviate from principle that the present invention design limited and spirit; Can do change to the base in the above-mentioned composite quantum well structure and the periodicity of trap, the adjustment of thickness and position etc. can not influence the effect of being set forth in of the present invention.
Claims (5)
1. the structure at the base in the MQW that improves the charge carrier combined efficiency; The structure of this LED epitaxial slice is followed successively by from bottom to top: substrate layer, gallium nitride low temperature buffer layer, unadulterated gallium nitride layer, n type gallium nitride layer, multi-quantum pit structure, p type aluminum gallium nitride electronic barrier layer, p type gallium nitride layer, p type gallium nitride contact layer; It is characterized in that: near the special construction at the base in last quantum well structure in p district; This bag contains u-InaGa1-aN; 0＜a＜1 layer and u-AlxInyGa1-x-yN, 0＜x＜1,, 0≤y＜1,0＜x+y＜1 layer.
2. according to the structure at the base in the MQW of the said raising charge carrier of claim 1 combined efficiency; It is characterized in that: multi-quantum pit structure comprises that the u-AlxInyGa1-x-yN in 1 above cycle builds and the u-InbGa1-bN trap; Whole multi-quantum pit structure can be divided into two parts, promptly near last quantum well structure in p district and the multi-quantum pit structure before this quantum well structure.
3. according to the structure at the base in the MQW of claim 1 or 2 said raising charge carrier combined efficiencies; It is characterized in that: last quantum well structure comprises that u-InaGa1-aN/u-AlxInyGa1-x-yN builds and the InbGa1-bN trap, and wherein bag contains u-InaGa1-aN layer and u-AlxInyGa1-x-yN layer, and 0＜a＜1 is arranged; 0＜x＜1; 0≤y＜1,0＜x+y＜1,0＜b＜1 and 0＜a＜b; U-InaGa1-aN is near trap InbGa1-bN layer, the u-InaGa1-aN/u-AlxInyGa1-x-yN structure that this base structure is an one-period or greater than the superlattice structure of one-period, thickness altogether is no more than 100 nm.
4. according to the structure at the base in the MQW of claim 1 or 2 said raising charge carrier combined efficiencies; It is characterized in that: the multi-quantum pit structure before last quantum well structure comprises that AlcIndGa1-c-dN builds and IneGa1-eN; 0＜e＜1 trap; Its Zhonglei AlcIndGa1-c-dN satisfies 0≤c＜1,0≤d＜1,0≤c+d＜1; AlcIndGa1-c-dN in the multi-quantum pit structure before last quantum well structure builds and IneGa1-eN, 0＜e＜1 trap alternately occur and cycle period greater than 1, wherein the thickness of trap is between 1nm to 5nm; The thickness of building between 10 to 25nm, what the thickness of trap can be the same, also thickening or attenuation or thickness replace gradually gradually.
5. according to the structure at the base in the MQW of claim 1 or 2 said raising charge carrier combined efficiencies, it is characterized in that: the thickness of trap is not less than the thickness of the trap in the multi-quantum pit structure in last quantum well structure.
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Cited By (5)
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|---|---|---|---|---|
| CN103500779A (en) * | 2013-09-03 | 2014-01-08 | 华灿光电股份有限公司 | GaN-based light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN104810442A (en) * | 2015-04-29 | 2015-07-29 | 华灿光电(苏州）有限公司 | Light emitting diode epitaxial wafer and growth method thereof |
| CN105206717A (en) * | 2015-09-18 | 2015-12-30 | 华灿光电股份有限公司 | GaN-based luminous diode epitaxial wafer and preparation method thereof |
| CN107546306A (en) * | 2016-06-29 | 2018-01-05 | 晶能光电（江西）有限公司 | A kind of quantum well structure and epitaxial structure with high combined efficiency |
| CN110034174A (en) * | 2019-02-28 | 2019-07-19 | 华灿光电(苏州）有限公司 | High electron mobility transistor epitaxial wafer and preparation method thereof |
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| CN101027791B (en) * | 2004-08-26 | 2011-08-10 | Lg伊诺特有限公司 | Nitride semiconductor light emitting device and fabrication method thereof |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103500779A (en) * | 2013-09-03 | 2014-01-08 | 华灿光电股份有限公司 | GaN-based light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN103500779B (en) * | 2013-09-03 | 2017-03-08 | 华灿光电股份有限公司 | A kind of GaN base light emitting epitaxial wafer and preparation method thereof |
| CN104810442A (en) * | 2015-04-29 | 2015-07-29 | 华灿光电(苏州）有限公司 | Light emitting diode epitaxial wafer and growth method thereof |
| CN104810442B (en) * | 2015-04-29 | 2017-09-29 | 华灿光电(苏州）有限公司 | A kind of LED epitaxial slice and its growing method |
| CN105206717A (en) * | 2015-09-18 | 2015-12-30 | 华灿光电股份有限公司 | GaN-based luminous diode epitaxial wafer and preparation method thereof |
| CN105206717B (en) * | 2015-09-18 | 2018-10-23 | 华灿光电股份有限公司 | GaN base light emitting epitaxial wafer and preparation method thereof |
| CN107546306A (en) * | 2016-06-29 | 2018-01-05 | 晶能光电（江西）有限公司 | A kind of quantum well structure and epitaxial structure with high combined efficiency |
| CN110034174A (en) * | 2019-02-28 | 2019-07-19 | 华灿光电(苏州）有限公司 | High electron mobility transistor epitaxial wafer and preparation method thereof |
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