CN117832347B - A Micro-LED epitaxial wafer and a preparation method thereof, and an LED chip - Google Patents

A Micro-LED epitaxial wafer and a preparation method thereof, and an LED chip Download PDF

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CN117832347B
CN117832347B CN202410240437.6A CN202410240437A CN117832347B CN 117832347 B CN117832347 B CN 117832347B CN 202410240437 A CN202410240437 A CN 202410240437A CN 117832347 B CN117832347 B CN 117832347B
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epitaxial wafer
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CN117832347A (en
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刘春杨
胡加辉
金从龙
顾伟
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials

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Abstract

The invention provides a Micro-LED epitaxial wafer, a preparation method thereof and an LED chip, wherein the Micro-LED epitaxial wafer comprises a buffer layer, the buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers. According to the Micro-LED epitaxial wafer, alNbN is adopted as a first buffer sublayer material, so that smaller lattice mismatch degree is achieved, a buffer transition effect can be better achieved, dislocation generated due to lattice mismatch can be reduced, and therefore crystal quality of epitaxial layer growth is improved; in addition, alONbN has very low internal stress, and AlONbN is adopted as a second buffer sub-layer to adjust the warping of the epitaxial layer, so that the problem that a Micro-LED epitaxial wafer which meets the requirements of Micro-LED display in the prior art is lack of low dislocation density, high crystal quality and high luminous efficiency is solved.

Description

一种Micro-LED外延片及其制备方法、LED芯片A Micro-LED epitaxial wafer and a preparation method thereof, and an LED chip

技术领域Technical Field

本发明涉及半导体器件技术领域,特别涉及一种Micro-LED外延片及其制备、LED芯片。The present invention relates to the technical field of semiconductor devices, and in particular to a Micro-LED epitaxial wafer and its preparation, and an LED chip.

背景技术Background technique

目前,Micro-LED吸引越来越多的人关注,有望促使显示屏向轻薄化、小型化、低功耗、高亮度方向发展,被誉为“下一代微显示器技术”,尽管Micro-LED显示技术正迅速发展。由于Micro-LED芯片较传统芯片微缩至小于50μm,要求极其高的良率、发光波长均匀性,这对外延技术提出了更高的要求;即需要降低位错密度调节翘曲来提高晶体质量和发光效率。Currently, Micro-LED is attracting more and more attention, and is expected to promote the development of display screens towards thinness, miniaturization, low power consumption, and high brightness. It is known as the "next generation of micro-display technology", although Micro-LED display technology is developing rapidly. Since Micro-LED chips are smaller than traditional chips to less than 50μm, they require extremely high yield and uniformity of luminous wavelength, which puts higher requirements on epitaxial technology; that is, it is necessary to reduce dislocation density and adjust warping to improve crystal quality and luminous efficiency.

现有技术中,存在通过图形化衬底技术、缓冲层技术应用在蓝宝石衬底上异质外延生长GaN,用以降低位错密度、提高晶体质量,并调节翘曲来提高发光效率的方法,例如,AlN缓冲层,AlN/AlGaN或AlGaN /GaN超晶格缓冲层过滤位错、调节翘曲,这些技术可以满足LED照明以及普通显示领域的应用,却难以应用于高分辨率的MicroLED,需在此基础上进一步减少位错密度,提高外延层晶体质量和发光效率。In the prior art, there are methods for heteroepitaxially growing GaN on a sapphire substrate by applying patterned substrate technology and buffer layer technology to reduce dislocation density, improve crystal quality, and adjust warping to improve luminous efficiency. For example, AlN buffer layer, AlN/AlGaN or AlGaN/GaN superlattice buffer layer filters dislocations and adjusts warping. These technologies can meet the application needs of LED lighting and general display fields, but are difficult to apply to high-resolution MicroLEDs. On this basis, it is necessary to further reduce the dislocation density and improve the crystal quality and luminous efficiency of the epitaxial layer.

发明内容Summary of the invention

基于此,本发明的目的是提供一种Micro-LED外延片及其制备方法、LED芯片,解决现有技术中的缺少一种满足Micro-LED显示需要求的位错密度低、晶体质量高、发光效率高的Micro-LED外延片问题。Based on this, the purpose of the present invention is to provide a Micro-LED epitaxial wafer and its preparation method, and an LED chip, so as to solve the problem in the prior art of the lack of a Micro-LED epitaxial wafer with low dislocation density, high crystal quality and high luminous efficiency that meets the requirements of Micro-LED display.

本发明提供一种Micro-LED外延片,包括缓冲层,所述缓冲层为周期性交叠结构,包括第一缓冲子层和第二缓冲子层,所述第一缓冲子层的厚度大于所述第二缓冲子层,其中,所述第一缓冲子层为AlNbN层,所述第二缓冲子层为AlONbN层。The present invention provides a Micro-LED epitaxial wafer, including a buffer layer, wherein the buffer layer is a periodically overlapping structure, including a first buffer sublayer and a second buffer sublayer, the thickness of the first buffer sublayer is greater than that of the second buffer sublayer, wherein the first buffer sublayer is an AlNbN layer, and the second buffer sublayer is an AlONbN layer.

本发明中的Micro-LED外延片,通过在衬底上设置缓冲层,其中缓冲层由周期性生长的第一缓冲子层和第二缓冲子层构成,由于第一缓冲子层采用了AlNbN材料,而AlNbN的晶格常数介于蓝宝石和AlN的晶格常数之间,因此在以蓝宝石为衬底的状况下,采用AlNbN作为第一缓冲子层材料相对于采用AlN作缓冲层材料,具有更小的晶格失配度,能更好的起到缓冲过渡的作用,可以降低因晶格失配而产生的位错,从而提高外延层生长的晶体质量;此外,AlONbN具有很低的内应力,因此采用AlONbN作为第二缓冲子层能够调节外延层的翘曲,此外缓冲层上通常会设置GaN层或AlN,而NbN与AlN和GaN有着相似的晶体结构,进而AlNbN和AlONbN也与AlN和GaN有着相似的晶体结构,因此在AlNbN层和AlONbN层上生长AlN或GaN具有良好的匹配性以保证外延片的晶体质量。由于位错密度和翘曲降低以及晶体质量提高,进而使得整体的发光效率提高。因此本发明解决了现有技术中的缺少一种满足Micro-LED显示需要求的位错密度低、晶体质量高、发光效率高的Micro-LED外延片问题。The Micro-LED epitaxial wafer in the present invention is formed by arranging a buffer layer on a substrate, wherein the buffer layer is composed of a first buffer sublayer and a second buffer sublayer that are periodically grown. Since the first buffer sublayer adopts AlNbN material, and the lattice constant of AlNbN is between the lattice constants of sapphire and AlN, when sapphire is used as the substrate, AlNbN is used as the first buffer sublayer material compared to AlN as the buffer layer material. It has a smaller lattice mismatch and can better play a role in buffering transition, and can reduce dislocations caused by lattice mismatch, thereby improving the crystal quality of the epitaxial layer growth; in addition, AlONbN has very low internal stress, so using AlONbN as the second buffer sublayer can adjust the warping of the epitaxial layer. In addition, a GaN layer or AlN is usually arranged on the buffer layer, and NbN has a similar crystal structure to AlN and GaN, and thus AlNbN and AlONbN also have a similar crystal structure to AlN and GaN, so growing AlN or GaN on the AlNbN layer and the AlONbN layer has good matching to ensure the crystal quality of the epitaxial wafer. Since the dislocation density and warpage are reduced and the crystal quality is improved, the overall luminous efficiency is improved. Therefore, the present invention solves the problem in the prior art of lacking a Micro-LED epitaxial wafer with low dislocation density, high crystal quality and high luminous efficiency that meets the requirements of Micro-LED display.

优选地,单个周期内,所述第一缓冲子层的厚度为10nm-20nm。Preferably, in a single period, the thickness of the first buffer sublayer is 10 nm-20 nm.

优选地,单个周期内,所述第二缓冲子层的厚度为1nm-5nm。Preferably, within a single period, the thickness of the second buffer sublayer is 1 nm-5 nm.

优选地,所述缓冲层的厚度为100nm-500nm,所述缓冲层的周期数为10-30。Preferably, the thickness of the buffer layer is 100 nm-500 nm, and the number of periods of the buffer layer is 10-30.

优选地,所述LED外延片还包括衬底,所述缓冲层层叠于所述衬底上;Preferably, the LED epitaxial wafer further comprises a substrate, and the buffer layer is stacked on the substrate;

以及依次层叠于所述缓冲层上的非掺杂GaN层、N型掺杂的GaN层、多量子阱层、电子阻挡层、P型掺杂的GaN层和接触层。And a non-doped GaN layer, an N-type doped GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer are sequentially stacked on the buffer layer.

本发明还提供一种Micro-LED外延片的制备方法,方法包括:The present invention also provides a method for preparing a Micro-LED epitaxial wafer, the method comprising:

提供一衬底;providing a substrate;

在所述衬底上生长缓冲层;growing a buffer layer on the substrate;

其中,所述缓冲层包括周期性生长的第一缓冲子层和第二缓冲子层,所述第一缓冲子层的厚度大于所述第二缓冲子层,所述第一缓冲子层为AlNbN层,所述第二缓冲子层为AlONbN层。The buffer layer includes a first buffer sublayer and a second buffer sublayer that are periodically grown, the first buffer sublayer is thicker than the second buffer sublayer, the first buffer sublayer is an AlNbN layer, and the second buffer sublayer is an AlONbN layer.

优选地,所述在所述衬底上生长缓冲层的步骤包括:Preferably, the step of growing a buffer layer on the substrate comprises:

将所述衬底置于PVD系统中,通过磁控溅射周期性交替生长第一缓冲子层和第二缓冲子层,生长周期为10-30,溅射靶材为铝铌合金靶材,所述铝铌合金靶材中铌的摩尔百分比为1%-10%。The substrate is placed in a PVD system, and a first buffer sublayer and a second buffer sublayer are periodically and alternately grown by magnetron sputtering, with a growth period of 10-30. The sputtering target is an aluminum-niobium alloy target, and the molar percentage of niobium in the aluminum-niobium alloy target is 1%-10%.

优选地,所述通过磁控溅射周期性交替生长第一缓冲子层和第二缓冲子层的步骤包括:Preferably, the step of periodically and alternately growing the first buffer sublayer and the second buffer sublayer by magnetron sputtering comprises:

将衬底置于PVD反应室内,并向所述PVD反应室内通入溅射气体氩气和反应气体氮气,并轰击铝铌合金靶材从而生长第一缓冲子层;Placing the substrate in a PVD reaction chamber, introducing sputtering gas argon and reaction gas nitrogen into the PVD reaction chamber, and bombarding the aluminum-niobium alloy target to grow a first buffer sublayer;

第一缓冲子层生长完成后,向所述PVD反应室内通入溅射气体氩气、反应气体氮气和氧气,并再次轰击铝铌合金靶材从而在所述第一缓冲子层上生长第二缓冲子层;After the growth of the first buffer sublayer is completed, sputtering gas argon, reaction gas nitrogen and oxygen are introduced into the PVD reaction chamber, and the aluminum-niobium alloy target is bombarded again to grow a second buffer sublayer on the first buffer sublayer;

重复上述步骤10-30个周期,完成缓冲层的制备;Repeat the above steps for 10-30 cycles to complete the preparation of the buffer layer;

其中,第一缓冲子层和第二缓冲子层制备时,氩气与氮气流量比例均为3:1-10:1,第二缓冲子层制备时,氮气与氧气流量比例为10:1,氧气流量为1sccm-4sccm。Among them, when preparing the first buffer sublayer and the second buffer sublayer, the flow ratio of argon to nitrogen is 3:1-10:1, and when preparing the second buffer sublayer, the flow ratio of nitrogen to oxygen is 10:1, and the oxygen flow rate is 1sccm-4sccm.

优选地,在所述衬底上生长缓冲层的步骤之后包括:Preferably, after the step of growing a buffer layer on the substrate, the method further comprises:

将生长完所述缓冲层的半成品外延片转入MOCVD设备中;Transferring the semi-finished epitaxial wafer after growing the buffer layer into a MOCVD device;

设定退火温度为600℃-800℃,退火时间为1min-5min,在氧气气氛下对半成品外延片进行退火;The annealing temperature is set to 600°C-800°C, the annealing time is set to 1min-5min, and the semi-finished epitaxial wafer is annealed in an oxygen atmosphere;

设定退火温度为1000℃-1100℃,退火时间为5min-10min,在氮气气氛下对半成品外延片进行退火;其中,两次退火压力均为100torr-500torr;The annealing temperature is set to 1000°C-1100°C, the annealing time is set to 5min-10min, and the semi-finished epitaxial wafer is annealed in a nitrogen atmosphere; wherein, the annealing pressure for both times is 100torr-500torr;

退火完成后,在半成品外延片的缓冲层上依次生长非掺杂GaN层、N型掺杂的GaN层、多量子阱层、电子阻挡层、P型掺杂的GaN层和接触层。After annealing, a non-doped GaN layer, an N-type doped GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer are sequentially grown on the buffer layer of the semi-finished epitaxial wafer.

本发明还提供一种包括上述Micro-LED外延片的LED芯片。The present invention also provides an LED chip comprising the above-mentioned Micro-LED epitaxial wafer.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1为本发明一实施例中的Micro-LED外延片中缓冲层的结构示意图;FIG1 is a schematic diagram of the structure of a buffer layer in a Micro-LED epitaxial wafer in one embodiment of the present invention;

图2为本发明一实施例中的Micro-LED外延片的结构示意图;FIG2 is a schematic diagram of the structure of a Micro-LED epitaxial wafer in one embodiment of the present invention;

图3为本发明一实施例中的Micro-LED外延片的制备方法流程图;FIG3 is a flow chart of a method for preparing a Micro-LED epitaxial wafer in one embodiment of the present invention;

主要元件符号说明:Description of main component symbols:

如下具体实施方式将结合上述附图进一步说明本发明。The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings.

具体实施方式Detailed ways

为了便于理解本发明,下面将参照相关附图对本发明进行更全面的描述。附图中给出了本发明的若干实施例。但是,本发明可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使对本发明的公开内容更加透彻全面。In order to facilitate understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

需要说明的是,当元件被称为“固设于”另一个元件,它可以直接在另一个元件上或者也可以存在居中的元件。当一个元件被认为是“连接”另一个元件,它可以是直接连接到另一个元件或者可能同时存在居中元件。本文所使用的术语“垂直的”、“水平的”、“左”、“右”以及类似的表述只是为了说明的目的。It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and/or" used herein includes any and all combinations of one or more of the related listed items.

如图1至图2所示,本发明公开了一种Micro-LED外延片的部分结构示意图,Micro-LED外延片包括衬底10和依次设置在衬底上的缓冲层20、非掺杂GaN层30、N型掺杂的GaN层、多量子阱层、电子阻挡层、P型掺杂的GaN层和接触层。As shown in Figures 1 and 2, the present invention discloses a partial structural schematic diagram of a Micro-LED epitaxial wafer, which includes a substrate 10 and a buffer layer 20, an undoped GaN layer 30, an N-type doped GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer, which are sequentially arranged on the substrate.

在本实施例当中,衬底10可以为蓝宝石衬底,具体的,非掺杂GaN层30的厚度为1um-3um,示例性的,非掺杂GaN层30的厚度为1.1µm、1.2µm、2µm或2.4µm,但不限于此;N型掺杂的GaN层40的厚度为1µm-3µm,示例性的,N型掺杂的GaN层40的厚度为1µm 、1.3µm、1.8µm、2µm或2.5µm,但不限于此;多量子阱层50为InGaN层和GaN层交替生长的周期性结构,多量子阱层50中单个InGaN层的厚度为2nm-4nm,示例性的,多量子阱层50中单个InGaN层的厚度为2nm、2.5nm、3nm、3.5nm或4nm等,但不限于此,多量子阱层50中单个GaN层的厚度为8nm-20nm,示例性的,多量子阱层50中单个GaN层的厚度为8nm、12nm、16nm、18nm或20nm等,但不限于此,周期数为5-12,示例性的,周期数为5、6、7、8、9、10、11或12等,但不限于此。示例性的,电子阻挡层60为AlGaN层,电子阻挡层60的厚度为20nm-50nm,示例性的,电子阻挡层60的厚度为20nm、25nm、30nm、35nm、40nm或50nm等,但不限于此;P型掺杂的GaN层70的厚度为30nm~100nm,示例性的,P型掺杂的GaN层70的厚度为30nm、40nm、50nm、60nm、80nm或100nm等,但不限于此,P型掺杂的GaN层70用于提供空穴;P型GaN接触层80的厚度为10nm-30nm,P型GaN接触层80的厚度为00nm、12nm、18nm、20nm、26nm或30nm等,但不限于此。In the present embodiment, the substrate 10 may be a sapphire substrate. Specifically, the thickness of the non-doped GaN layer 30 is 1um-3um. For example, the thickness of the non-doped GaN layer 30 is 1.1µm, 1.2µm, 2µm or 2.4µm, but not limited thereto. The thickness of the N-type doped GaN layer 40 is 1µm-3µm. For example, the thickness of the N-type doped GaN layer 40 is 1µm , 1.3µm, 1.8µm, 2µm or 2.5µm, but not limited thereto; the multi-quantum well layer 50 is a periodic structure in which InGaN layers and GaN layers grow alternately, and the thickness of a single InGaN layer in the multi-quantum well layer 50 is 2nm-4nm, and exemplarily, the thickness of a single InGaN layer in the multi-quantum well layer 50 is 2nm, 2.5nm, 3nm, 3.5nm or 4nm, etc., but not limited thereto, the thickness of a single GaN layer in the multi-quantum well layer 50 is 8nm-20nm, and exemplarily, the thickness of a single GaN layer in the multi-quantum well layer 50 is 8nm, 12nm, 16nm, 18nm or 20nm, etc., but not limited thereto, the number of periods is 5-12, and exemplarily, the number of periods is 5, 6, 7, 8, 9, 10, 11 or 12, etc., but not limited thereto. Exemplarily, the electron blocking layer 60 is an AlGaN layer, and the thickness of the electron blocking layer 60 is 20nm-50nm. Exemplarily, the thickness of the electron blocking layer 60 is 20nm, 25nm, 30nm, 35nm, 40nm or 50nm, etc., but not limited to this; the thickness of the P-type doped GaN layer 70 is 30nm~100nm. Exemplarily, the thickness of the P-type doped GaN layer 70 is 30nm, 40nm, 50nm, 60nm, 80nm or 100nm, etc., but not limited to this, the P-type doped GaN layer 70 is used to provide holes; the thickness of the P-type GaN contact layer 80 is 10nm-30nm, and the thickness of the P-type GaN contact layer 80 is 100nm, 12nm, 18nm, 20nm, 26nm or 30nm, etc., but not limited to this.

在本实施例当中,缓冲层20包括周期性生长的第一缓冲子层21和第二缓冲子层22,第一缓冲子层21的厚度大于所述第二缓冲子层22,其中,第一缓冲子层21为AlNbN层,第二缓冲子层22为AlONbN层。可以理解的,由于第一缓冲子层21采用了AlNbN材料,而AlNbN的晶格常数介于蓝宝石和AlN的晶格常数之间,在以蓝宝石为衬底的状况下,采用AlNbN作为第一缓冲子层21材料相对于采用AlN作缓冲层材料,具有更小的晶格失配度,能更好的起到缓冲过渡的作用,可以降低因晶格失配而产生的位错,从而提高外延层生长的晶体质量;此外,AlONbN具有很低的内应力,因此采用AlONbN作为第二缓冲子层22能够调节外延层的翘曲,此外缓冲层20上通常会设置GaN层或AlN,而NbN与AlN和GaN有着相似的晶体结构,进而AlNbN和AlONbN也与AlN和GaN有着相似的晶体结构,因此在AlNbN层和AlONbN层上生长AlN或GaN具有良好的匹配性以保证外延片的晶体质量。由于位错密度和翘曲降低以及晶体质量提高,进而使得整体的发光效率提高。In this embodiment, the buffer layer 20 includes a first buffer sublayer 21 and a second buffer sublayer 22 that are periodically grown, and the thickness of the first buffer sublayer 21 is greater than that of the second buffer sublayer 22 , wherein the first buffer sublayer 21 is an AlNbN layer, and the second buffer sublayer 22 is an AlONbN layer. It can be understood that, since the first buffer sublayer 21 adopts AlNbN material, and the lattice constant of AlNbN is between the lattice constants of sapphire and AlN, when sapphire is used as the substrate, AlNbN as the first buffer sublayer 21 material has a smaller lattice mismatch than AlN as the buffer layer material, can better play the role of buffer transition, can reduce the dislocation caused by lattice mismatch, and thus improve the crystal quality of epitaxial layer growth; in addition, AlONbN has very low internal stress, so using AlONbN as the second buffer sublayer 22 can adjust the warpage of the epitaxial layer, and in addition, a GaN layer or AlN is usually arranged on the buffer layer 20, and NbN has a similar crystal structure to AlN and GaN, and then AlNbN and AlONbN also have a similar crystal structure to AlN and GaN, so AlN or GaN grown on the AlNbN layer and the AlONbN layer has good matching to ensure the crystal quality of the epitaxial wafer. Due to the reduction of dislocation density and warpage and the improvement of crystal quality, the overall luminous efficiency is improved.

此外,各缓冲层20的厚度差异对翘曲和晶体质量也有一定影响,在本实施例中,缓冲层20的厚度为100nm-500nm,示例性的,缓冲层20的厚度为100nm、150nm、200nm、250nm、300nm、350nm、400nm、450nm或500nm等,但不限于此;第一缓冲子层21的厚度为10nm-20nm,示例性的,第一缓冲子层21的厚度为10nm、12nm、15nm、17nm、19nm或20nm等,但不限于此;第二缓冲子层22的厚度为1nm-5nm,示例性的,第二缓冲子层22的厚度为1nm、2nm、2.5nm、3nm、4nm或5nm等,但不限于此;周期数为10-30,示例性的,周期数为10、12、15、17、20、24、26、28或30等,但不限于此。In addition, the thickness difference of each buffer layer 20 also has a certain influence on the warping and crystal quality. In the present embodiment, the thickness of the buffer layer 20 is 100nm-500nm. For example, the thickness of the buffer layer 20 is 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm or 500nm, but is not limited thereto; the thickness of the first buffer sublayer 21 is 10nm-20nm. For example, the first buffer sublayer The thickness of 21 is 10nm, 12nm, 15nm, 17nm, 19nm or 20nm, etc., but not limited to this; the thickness of the second buffer sublayer 22 is 1nm-5nm, and exemplarily, the thickness of the second buffer sublayer 22 is 1nm, 2nm, 2.5nm, 3nm, 4nm or 5nm, etc., but not limited to this; the number of periods is 10-30, and exemplarily, the number of periods is 10, 12, 15, 17, 20, 24, 26, 28 or 30, etc., but not limited to this.

相应的,参考图3,本发明还公开了一种Micro-LED外延片的制备方法,用于制备上述的Micro-LED外延片,其中,制备方法包括以下步骤:Correspondingly, referring to FIG. 3 , the present invention further discloses a method for preparing a Micro-LED epitaxial wafer, which is used to prepare the above-mentioned Micro-LED epitaxial wafer, wherein the preparation method comprises the following steps:

S100:提供一衬底;S100: providing a substrate;

优选的,衬底可以为蓝宝石衬底。Preferably, the substrate may be a sapphire substrate.

S200:在衬底上沿外延生长方向依次沉积所述缓冲层、非掺杂GaN层、N型掺杂的GaN层、多量子阱层、电子阻挡层、P型掺杂的GaN层和接触层。S200: depositing the buffer layer, the undoped GaN layer, the N-type doped GaN layer, the multi-quantum well layer, the electron blocking layer, the P-type doped GaN layer and the contact layer in sequence on the substrate along the epitaxial growth direction.

具体的,S200包括:Specifically, S200 includes:

S201:在蓝宝石衬底上生长缓冲层;S201: growing a buffer layer on a sapphire substrate;

具体的,在PVD系统中通过磁控溅射生长缓冲层,缓冲层包括周期性生长的第一缓冲子层和第二缓冲子层。其中,第一缓冲子层为AlNbN层,第二缓冲子层为AlONbN层;控制所述沉积的单个第一缓冲子层的厚度为10nm-20nm,第二缓冲子层的厚度为1nm-5nm。Specifically, a buffer layer is grown by magnetron sputtering in a PVD system, and the buffer layer includes a first buffer sublayer and a second buffer sublayer that are grown periodically. The first buffer sublayer is an AlNbN layer, and the second buffer sublayer is an AlONbN layer; the thickness of the deposited single first buffer sublayer is controlled to be 10nm-20nm, and the thickness of the second buffer sublayer is controlled to be 1nm-5nm.

具体的,溅射靶材为铝铌合金靶材,铝铌合金靶材中铌的摩尔百分比为1%-10%。第一缓冲子层的生长温度为300℃-600℃,溅射功率为2000W-4000W,生长压力为1torr-10torr,在氩气和氮气的混合气氛下生长,溅射气体为氩气,反应气体为氮气,且氩气的流量为30sccm-400sccm,氮气的流量为10sccm- 40sccm,氩气与氮气流量比例为3:1-10:1;第二缓冲子层的生长温度为300℃-600℃,溅射功率为2000W-4000W,生长压力为1torr-10torr,在氩气、氮气和氧气的混合气氛下生长,溅射气体为氩气,反应气体为氮气和氧气,且氩气的流量为30sccm-400sccm,氮气的流量为10sccm-40sccm,氧气的流量为1sccm-4sccm,氩气与氮气流量比例为3:1-10:1,氮气与氧气的流量比例为10:1。Specifically, the sputtering target is an aluminum-niobium alloy target, and the molar percentage of niobium in the aluminum-niobium alloy target is 1%-10%. The growth temperature of the first buffer sublayer is 300°C-600°C, the sputtering power is 2000W-4000W, the growth pressure is 1torr-10torr, and it grows in a mixed atmosphere of argon and nitrogen. The sputtering gas is argon, the reaction gas is nitrogen, and the flow rate of argon is 30sccm-400sccm, and the flow rate of nitrogen is 10sccm- 40sccm, the flow ratio of argon to nitrogen is 3:1-10:1; the growth temperature of the second buffer sublayer is 300℃-600℃, the sputtering power is 2000W-4000W, the growth pressure is 1torr-10torr, and it grows in a mixed atmosphere of argon, nitrogen and oxygen. The sputtering gas is argon, and the reaction gases are nitrogen and oxygen. The flow rate of argon is 30sccm-400sccm, the flow rate of nitrogen is 10sccm-40sccm, and the flow rate ratio of oxygen is 1sccm-4sccm. The flow ratio of argon to nitrogen is 3:1-10:1, and the flow ratio of nitrogen to oxygen is 10:1.

S202:退火;S202: annealing;

具体的,在生长完缓冲层后,将外延片转入MOCVD中,先在氧气气氛下退火1min-5min,退火温度为600℃-800℃,然后在氮气气氛下进行退火,退火时间为5min-10min,退火温度为1000℃-1100℃,两次退火压力均在100torr- 500torr之间。Specifically, after the buffer layer is grown, the epitaxial wafer is transferred to MOCVD, and first annealed in an oxygen atmosphere for 1 min-5 min at a temperature of 600°C-800°C, and then annealed in a nitrogen atmosphere for 5 min-10 min at a temperature of 1000°C-1100°C. The annealing pressures for both times are between 100 torr and 500 torr.

S203:在缓冲层上生长非掺杂GaN层;S203: growing a non-doped GaN layer on the buffer layer;

具体的,在MOCVD设备中生长非掺杂GaN层,控制所沉积的非掺杂GaN层的厚度为1um-3um,生长温度为1000℃-1200℃,生长压力为100torr-200torr。Specifically, a non-doped GaN layer is grown in an MOCVD device, and the thickness of the deposited non-doped GaN layer is controlled to be 1 um-3 um, the growth temperature is 1000° C.-1200° C., and the growth pressure is 100 torr-200 torr.

S204:在非掺杂GaN层上生长N型掺杂的GaN层;S204: growing an N-type doped GaN layer on the non-doped GaN layer;

具体的,在MOCVD设备中生长N型掺杂的GaN层,控制所沉积的N型掺杂的GaN层的厚度为1um-3um,生长温度为1000℃-1200℃,生长压力为100torr-200torr。Specifically, an N-type doped GaN layer is grown in an MOCVD device, and the thickness of the deposited N-type doped GaN layer is controlled to be 1 um-3 um, the growth temperature is 1000° C.-1200° C., and the growth pressure is 100 torr-200 torr.

S205:在N型掺杂的GaN层上生长多量子阱层;S205: growing a multi-quantum well layer on the N-type doped GaN layer;

具体的,具体的,在MOCVD设备中生长多量子阱层,其中,多量子阱层为InGaN层和GaN层交替生长的周期性结构,控制所沉积的多量子阱层中单个InGaN层的厚度为2nm-4nm,生长温度为800℃-900℃,生长压力为100torr- 200torr,多量子阱层中单个GaN层的厚度为8nm-20nm,生长温度为900℃-1000℃,生长压力为100torr-200torr,周期数为5-12。Specifically, a multi-quantum well layer is grown in an MOCVD device, wherein the multi-quantum well layer is a periodic structure in which InGaN layers and GaN layers are grown alternately, the thickness of a single InGaN layer in the deposited multi-quantum well layer is controlled to be 2nm-4nm, the growth temperature is 800℃-900℃, the growth pressure is 100torr-200torr, the thickness of a single GaN layer in the multi-quantum well layer is 8nm-20nm, the growth temperature is 900℃-1000℃, the growth pressure is 100torr-200torr, and the number of cycles is 5-12.

S206:在多量子阱层上生长电子阻挡层;S206: growing an electron blocking layer on the multi-quantum well layer;

具体的,在MOCVD设备中生长电子阻挡层,其中,电子阻挡层为AlGaN层,控制所沉积的电子阻挡层的厚度为20nm-50nm,生长温度为950℃-1100℃,生长压力为50torr-100torr,Al组分在0.1-0.5之间。Specifically, an electron blocking layer is grown in an MOCVD device, wherein the electron blocking layer is an AlGaN layer, the thickness of the deposited electron blocking layer is controlled to be 20nm-50nm, the growth temperature is 950℃-1100℃, the growth pressure is 50torr-100torr, and the Al component is between 0.1-0.5.

S207:在电子阻挡层上生长P型掺杂的GaN层;S207: growing a P-type doped GaN layer on the electron blocking layer;

具体的,在MOCVD设备中生长P型掺杂的GaN层,其中,控制所沉积的P型掺杂的GaN层的厚度为30nm-100nm,生长温度为950℃-1050℃,生长压力为100torr-600torr。Specifically, a P-type doped GaN layer is grown in an MOCVD device, wherein the thickness of the deposited P-type doped GaN layer is controlled to be 30 nm-100 nm, the growth temperature is 950° C.-1050° C., and the growth pressure is 100 torr-600 torr.

S208:在P型掺杂的GaN层上生长P型GaN接触层;S208: growing a P-type GaN contact layer on the P-type doped GaN layer;

具体的,在MOCVD设备中生P型GaN接触层,其中,控制所沉积的P型GaN接触层的厚度为10nm-30nm,生长温度为1000℃-1100℃,生长压力为100torr- 300torr。外延结构生长结束后,将反应腔温度降低,在氮气气氛中退火处理,退火温度区间为650℃-850℃,退火处理5到15分钟,降至室温外延生长结束。Specifically, a P-type GaN contact layer is grown in an MOCVD device, wherein the thickness of the deposited P-type GaN contact layer is controlled to be 10nm-30nm, the growth temperature is 1000℃-1100℃, and the growth pressure is 100torr-300torr. After the epitaxial structure growth is completed, the temperature of the reaction chamber is lowered, and annealing is performed in a nitrogen atmosphere, the annealing temperature range is 650℃-850℃, the annealing treatment lasts for 5 to 15 minutes, and the epitaxial growth is completed when the temperature drops to room temperature.

下面以具体实施例来对本发明进一步说明:The present invention is further described below with specific embodiments:

实施例一Embodiment 1

本实施例提供一种Micro-LED外延片,Micro-LED外延片还包括衬底和依次设置在衬底上的缓冲层、非掺杂GaN层、N型掺杂的GaN层、多量子阱层、电子阻挡层、P型掺杂的GaN层和接触层。The present embodiment provides a Micro-LED epitaxial wafer, which also includes a substrate and a buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer which are sequentially arranged on the substrate.

在本实施例当中,衬底为蓝宝石衬底,非掺杂GaN层的厚度为2um,N型掺杂的GaN层的厚度为2µm,多量子阱层为InGaN层和GaN层交替生长的周期性结构,多量子阱层中单个InGaN层的厚度为3nm,多量子阱层中单个GaN层的厚度为14nm,周期数为8。电子阻挡层为AlGaN层,电子阻挡层的厚度为35nm,P型掺杂的GaN层的厚度65nm,P型GaN接触层的厚度为20nm。In this embodiment, the substrate is a sapphire substrate, the thickness of the undoped GaN layer is 2um, the thickness of the N-type doped GaN layer is 2µm, the multi-quantum well layer is a periodic structure in which the InGaN layer and the GaN layer grow alternately, the thickness of a single InGaN layer in the multi-quantum well layer is 3nm, the thickness of a single GaN layer in the multi-quantum well layer is 14nm, and the number of periods is 8. The electron blocking layer is an AlGaN layer, the thickness of the electron blocking layer is 35nm, the thickness of the P-type doped GaN layer is 65nm, and the thickness of the P-type GaN contact layer is 20nm.

在本实施例当中,缓冲层包括周期性生长的第一缓冲子层和第二缓冲子层,第一缓冲子层的厚度大于第二缓冲子层,其中,第一缓冲子层为AlNbN层,第二缓冲子层为AlONbN层。第一缓冲子层的厚度为18nm,第二缓冲子层的厚度为2nm,缓冲层的周期数为3。In this embodiment, the buffer layer includes a first buffer sublayer and a second buffer sublayer that are periodically grown, the first buffer sublayer is thicker than the second buffer sublayer, wherein the first buffer sublayer is an AlNbN layer, and the second buffer sublayer is an AlONbN layer. The thickness of the first buffer sublayer is 18nm, the thickness of the second buffer sublayer is 2nm, and the number of periods of the buffer layer is 3.

本实施例中Micro-LED外延片的制备方法包括以下步骤:The method for preparing the Micro-LED epitaxial wafer in this embodiment includes the following steps:

(1):提供一衬底;(1): Providing a substrate;

在本实施例中,衬底为蓝宝石衬底。In this embodiment, the substrate is a sapphire substrate.

(2):在蓝宝石衬底上生长缓冲层;(2): Growing a buffer layer on a sapphire substrate;

具体的,在PVD系统中通过磁控溅射生长缓冲层,缓冲层包括周期性生长的第一缓冲子层和第二缓冲子层。其中,第一缓冲子层为AlNbN层,第二缓冲子层为AlONbN层;控制所述沉积的单个第一缓冲子层的厚度为18nm,第二缓冲子层的厚度为2nm。Specifically, a buffer layer is grown by magnetron sputtering in a PVD system, and the buffer layer includes a first buffer sublayer and a second buffer sublayer that are grown periodically. The first buffer sublayer is an AlNbN layer, and the second buffer sublayer is an AlONbN layer; the thickness of the deposited single first buffer sublayer is controlled to be 18 nm, and the thickness of the second buffer sublayer is controlled to be 2 nm.

具体的,溅射靶材为铝铌合金靶材,铝铌合金靶材中铌的摩尔百分比为5%。第一缓冲子层的生长温度为600℃,溅射功率为3000W,生长压力为1torr,在氩气和氮气的混合气氛下生长,溅射气体为氩气,反应气体为氮气,且氩气的流量为200sccm,氮气的流量为20sccm,氩气与氮气流量比例为7:1;第二缓冲子层的生长温度为600℃,溅射功率为3000W,生长压力为1torr,在氩气、氮气和氧气的混合气氛下生长,溅射气体为氩气,反应气体为氮气和氧气,且氩气的流量为200sccm,氮气的流量为20sccm,氧气的流量为2sccm,氩气与氮气流量比例为7:1,氮气与氧气的流量比例为10:1。缓冲层周期数为15。Specifically, the sputtering target is an aluminum-niobium alloy target, and the molar percentage of niobium in the aluminum-niobium alloy target is 5%. The growth temperature of the first buffer sublayer is 600°C, the sputtering power is 3000W, the growth pressure is 1torr, and it grows in a mixed atmosphere of argon and nitrogen. The sputtering gas is argon, the reaction gas is nitrogen, and the flow rate of argon is 200sccm, the flow rate of nitrogen is 20sccm, and the flow ratio of argon to nitrogen is 7:1; the growth temperature of the second buffer sublayer is 600°C, the sputtering power is 3000W, the growth pressure is 1torr, and it grows in a mixed atmosphere of argon, nitrogen and oxygen. The sputtering gas is argon, the reaction gas is nitrogen and oxygen, and the flow rate of argon is 200sccm, the flow rate of nitrogen is 20sccm, the flow rate of oxygen is 2sccm, the flow ratio of argon to nitrogen is 7:1, and the flow ratio of nitrogen to oxygen is 10:1. The number of buffer layer cycles is 15.

S202:退火;S202: annealing;

具体的,在生长完缓冲层后,将外延片转入MOCVD中,先在氧气气氛下退火3min,退火温度为700℃,然后在氮气气氛下进行退火,退火时间为8min,退火温度为1050℃,两次退火压力均为300torr。Specifically, after the buffer layer is grown, the epitaxial wafer is transferred to MOCVD, and first annealed in an oxygen atmosphere for 3 minutes at an annealing temperature of 700°C, and then annealed in a nitrogen atmosphere for 8 minutes at an annealing temperature of 1050°C. The annealing pressure for both times is 300 torr.

S203:在缓冲层上生长非掺杂GaN层;S203: growing a non-doped GaN layer on the buffer layer;

具体的,在MOCVD设备中生长非掺杂GaN层,控制所沉积的非掺杂GaN层的厚度为2um,生长温度为1100℃,生长压力为150torr。Specifically, a non-doped GaN layer is grown in an MOCVD device, and the thickness of the deposited non-doped GaN layer is controlled to be 2 um, the growth temperature is 1100° C., and the growth pressure is 150 torr.

S204:在非掺杂GaN层上生长N型掺杂的GaN层;S204: growing an N-type doped GaN layer on the non-doped GaN layer;

具体的,在MOCVD设备中生长N型掺杂的GaN层,控制所沉积的N型掺杂的GaN层的厚度为2um,生长温度为1100℃,生长压力为150torr。Specifically, an N-type doped GaN layer is grown in an MOCVD device, and the thickness of the deposited N-type doped GaN layer is controlled to be 2 um, the growth temperature is 1100° C., and the growth pressure is 150 torr.

S205:在N型掺杂的GaN层上生长多量子阱层;S205: growing a multi-quantum well layer on the N-type doped GaN layer;

具体的,具体的,在MOCVD设备中生长多量子阱层,其中,多量子阱层为InGaN层和GaN层交替生长的周期性结构,控制所沉积的多量子阱层中单个InGaN层的厚度为3nm,生长温度为850℃,生长压力为150torr,多量子阱层中单个GaN层的厚度为14nm,生长温度为950℃,生长压力为150torr,周期数为8。Specifically, a multi-quantum well layer is grown in an MOCVD device, wherein the multi-quantum well layer is a periodic structure in which InGaN layers and GaN layers grow alternately, and the thickness of a single InGaN layer in the deposited multi-quantum well layer is controlled to be 3 nm, the growth temperature is 850° C., the growth pressure is 150 torr, the thickness of a single GaN layer in the multi-quantum well layer is 14 nm, the growth temperature is 950° C., the growth pressure is 150 torr, and the number of cycles is 8.

S206:在多量子阱层上生长电子阻挡层;S206: growing an electron blocking layer on the multi-quantum well layer;

具体的,在MOCVD设备中生长电子阻挡层,其中,电子阻挡层为AlGaN层,控制所沉积的电子阻挡层的厚度为35nm,生长温度为1000℃,生长压力为75torr,Al组分在0.3之间。Specifically, an electron blocking layer is grown in an MOCVD device, wherein the electron blocking layer is an AlGaN layer, the thickness of the deposited electron blocking layer is controlled to be 35 nm, the growth temperature is 1000° C., the growth pressure is 75 torr, and the Al component is between 0.3.

S207:在电子阻挡层上生长P型掺杂的GaN层;S207: growing a P-type doped GaN layer on the electron blocking layer;

具体的,在MOCVD设备中生长P型掺杂的GaN层,其中,控制所沉积的P型掺杂的GaN层的厚度为65nm,生长温度为1000℃,生长压力为350torr。Specifically, a P-type doped GaN layer is grown in an MOCVD device, wherein the thickness of the deposited P-type doped GaN layer is controlled to be 65 nm, the growth temperature is 1000° C., and the growth pressure is 350 torr.

S208:在P型掺杂的GaN层上生长P型GaN接触层;S208: growing a P-type GaN contact layer on the P-type doped GaN layer;

具体的,在MOCVD设备中生P型GaN接触层,其中,控制所沉积的P型GaN接触层的厚度为20nm,生长温度为1050℃,生长压力为200torr。外延结构生长结束后,将反应腔温度降低,在氮气气氛中退火处理,退火温度区间为700℃,退火处理10分钟,降至室温外延生长结束。Specifically, a P-type GaN contact layer is grown in an MOCVD device, wherein the thickness of the deposited P-type GaN contact layer is controlled to be 20 nm, the growth temperature is 1050° C., and the growth pressure is 200 torr. After the epitaxial structure growth is completed, the temperature of the reaction chamber is lowered, and annealing is performed in a nitrogen atmosphere at a temperature range of 700° C. for 10 minutes, and the epitaxial growth is terminated by cooling to room temperature.

实施例二Embodiment 2

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,第一缓冲子层的厚度为10nm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that the thickness of the first buffer sublayer is 10 nm.

实施例三Embodiment 3

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,第一缓冲子层的厚度为14nm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that the thickness of the first buffer sublayer is 14 nm.

实施例四Embodiment 4

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,第一缓冲子层的厚度为20nm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that the thickness of the first buffer sublayer is 20 nm.

实施例五Embodiment 5

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,第二缓冲子层的厚度为1nm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that the thickness of the second buffer sublayer is 1 nm.

实施例六Embodiment 6

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,第二缓冲子层的厚度为3nm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that the thickness of the second buffer sublayer is 3 nm.

实施例七Embodiment 7

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,第二缓冲子层的厚度为5nm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that the thickness of the second buffer sublayer is 5 nm.

实施例八Embodiment 8

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,铝铌合金靶材中铌的摩尔百分比为1%。This embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the molar percentage of niobium in the aluminum-niobium alloy target is 1%.

实施例九Embodiment 9

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,铝铌合金靶材中铌的摩尔百分比为10%。This embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the molar percentage of niobium in the aluminum-niobium alloy target is 10%.

实施例十Embodiment 10

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,生长第一缓冲子层和第二缓冲子层时,氩气与氮气流量比例均为3:1。This embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that when growing the first buffer sublayer and the second buffer sublayer, the flow ratio of argon gas to nitrogen gas is 3:1.

实施例十一Embodiment 11

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,生长第一缓冲子层和第二缓冲子层时,氩气与氮气流量比例均为10:1。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that when growing the first buffer sublayer and the second buffer sublayer, the flow ratio of argon gas to nitrogen gas is 10:1.

实施例十二Embodiment 12

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,生长第二缓冲子层时,氧气的流量为1sccm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that when growing the second buffer sublayer, the flow rate of oxygen is 1 sccm.

实施例十三Embodiment 13

本实施例同样提供一种Micro-LED外延片,与实施例一的区别在于,生长第二缓冲子层时,氧气的流量为3sccm。This embodiment also provides a Micro-LED epitaxial wafer, which differs from the first embodiment in that when growing the second buffer sublayer, the flow rate of oxygen is 3 sccm.

对比例一Comparative Example 1

本对比例提高一种LED外延片及其制备方法,与实施例一的区别在于缓冲层为AlN层。This comparative example provides an LED epitaxial wafer and a preparation method thereof, which is different from the first embodiment in that the buffer layer is an AlN layer.

将实施例一至实施例十三,以及对比例一所得的Micro-LED外延片制备得到尺寸为9mil*11mil的LED芯片,并在同等条件下进行测试,具体结果如表1所示:The Micro-LED epitaxial wafers obtained in Examples 1 to 13 and Comparative Example 1 were used to prepare LED chips with a size of 9 mil*11 mil, and tested under the same conditions. The specific results are shown in Table 1:

表1Table 1

从表1中可以看出,采用本发明实施例中的方法所得的Micro-LED外延片制备得到尺寸为9mil*11mil的LED芯片,在相同的测试条件下,本发明实施例一中的方法制备得到的LED芯片相比于对比例1传统方法制备得到LED芯片而言,正向发光亮度有效提升,提升28.59%,同时,本发明其它实施例中的方法制备得到的LED芯片的发光亮度也优于传统方法制备得到的LED芯片的发光亮度。It can be seen from Table 1 that the Micro-LED epitaxial wafer obtained by the method in the embodiment of the present invention is used to prepare an LED chip with a size of 9 mil*11 mil. Under the same test conditions, the LED chip prepared by the method in Example 1 of the present invention has an effective improvement in forward luminescence brightness by 28.59% compared to the LED chip prepared by the traditional method in Comparative Example 1. At the same time, the luminescence brightness of the LED chips prepared by the methods in other embodiments of the present invention is also better than that of the LED chips prepared by the traditional method.

本发明实施例还提供一种LED芯片,包括上述的Micro-LED外延片。An embodiment of the present invention further provides an LED chip, comprising the above-mentioned Micro-LED epitaxial wafer.

综上,本发明实施例当中的Micro-LED外延片及其制备方法、LED芯片,通过在衬底上设置缓冲层,其中缓冲层由周期性生长的第一缓冲子层和第二缓冲子层构成,由于第一缓冲子层采用了AlNbN材料,而AlNbN的晶格常数介于蓝宝石和AlN的晶格常数之间,因此在以蓝宝石为衬底的状况下,采用AlNbN作为第一缓冲子层材料相对于采用AlN作缓冲层材料,具有更小的晶格失配度,能更好的起到缓冲过渡的作用,可以降低因晶格失配而产生的位错,从而提高外延层生长的晶体质量;此外,AlONbN具有很低的内应力,因此采用AlONbN作为第二缓冲子层能够调节外延层的翘曲,此外缓冲层上通常会设置GaN层或AlN,而NbN与AlN和GaN有着相似的晶体结构,进而AlNbN和AlONbN也与AlN和GaN有着相似的晶体结构,因此在AlNbN层和AlONbN层上生长AlN或GaN具有良好的匹配性以保证外延片的晶体质量。由于位错密度和翘曲降低以及晶体质量提高,进而使得整体的发光效率提高。因此本发明解决了现有技术中的缺少一种满足Micro-LED显示需要求的位错密度低、晶体质量高、发光效率高的Micro-LED外延片问题。In summary, the Micro-LED epitaxial wafer and its preparation method, and the LED chip in the embodiments of the present invention are provided with a buffer layer on the substrate, wherein the buffer layer is composed of a first buffer sublayer and a second buffer sublayer that are periodically grown. Since the first buffer sublayer adopts AlNbN material, and the lattice constant of AlNbN is between the lattice constants of sapphire and AlN, when sapphire is used as the substrate, AlNbN is used as the first buffer sublayer material, which has a smaller lattice mismatch than AlN as the buffer layer material, and can better play the role of buffer transition, and can Reduce dislocations caused by lattice mismatch, thereby improving the crystal quality of epitaxial layer growth; in addition, AlONbN has very low internal stress, so using AlONbN as the second buffer sublayer can adjust the warping of the epitaxial layer. In addition, a GaN layer or AlN is usually set on the buffer layer, and NbN has a similar crystal structure to AlN and GaN, and then AlNbN and AlONbN also have similar crystal structures to AlN and GaN, so AlN or GaN grown on the AlNbN layer and the AlONbN layer has good matching to ensure the crystal quality of the epitaxial wafer. Since the dislocation density and warping are reduced and the crystal quality is improved, the overall luminous efficiency is improved. Therefore, the present invention solves the problem in the prior art of the lack of a Micro-LED epitaxial wafer with low dislocation density, high crystal quality, and high luminous efficiency that meets the requirements of Micro-LED display.

在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不一定指的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对本发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims (9)

1. The Micro-LED epitaxial wafer is characterized by comprising a buffer layer, wherein the buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers;
The LED epitaxial wafer further comprises a substrate, and the buffer layer is laminated on the substrate;
And the undoped GaN layer, the N-type doped GaN layer, the multiple quantum well layer, the electron blocking layer, the P-type doped GaN layer and the contact layer are sequentially laminated on the buffer layer.
2. The Micro-LED epitaxial wafer of claim 1, wherein the thickness of the first buffer sub-layer is 10nm-20nm in a single period.
3. The Micro-LED epitaxial wafer of claim 1, wherein the thickness of the second buffer sub-layer is 1nm-5nm in a single period.
4. A Micro-LED epitaxial wafer according to claim 2 or 3, characterized in that the thickness of the buffer layer is 100nm-500nm and the number of cycles of the buffer layer is 10-30.
5. A method for preparing a Micro-LED epitaxial wafer, which is used for preparing the Micro-LED epitaxial wafer according to any one of claims 1 to 4, the method comprising:
Providing a substrate;
Growing a buffer layer on the substrate;
The buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, wherein the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers.
6. The method of claim 5, wherein the step of growing a buffer layer on the substrate comprises:
and (3) placing the substrate in a PVD system, periodically and alternately growing a first buffer sub-layer and a second buffer sub-layer by magnetron sputtering, wherein the growth period is 10-30, the sputtering target is an aluminum-niobium alloy target, and the mole percentage of niobium in the aluminum-niobium alloy target is 1-10%.
7. The method of manufacturing a Micro-LED epitaxial wafer of claim 6, wherein the step of periodically and alternately growing the first buffer sub-layer and the second buffer sub-layer by magnetron sputtering comprises:
Placing a substrate in a PVD reaction chamber, introducing sputtering gas argon and reactive gas nitrogen into the PVD reaction chamber, and bombarding an aluminum-niobium alloy target material so as to grow a first buffer sub-layer;
after the growth of the first buffer sub-layer is finished, sputtering gas argon, reaction gas nitrogen and oxygen are introduced into the PVD reaction chamber, and the Al-Nb alloy target is bombarded again so as to grow a second buffer sub-layer on the first buffer sub-layer;
Repeating the steps for 10-30 cycles to finish the preparation of the buffer layer;
wherein, when the first buffer sub-layer and the second buffer sub-layer are prepared, the flow ratio of argon to nitrogen is 3:1-10:1, and when the second buffer sub-layer is prepared, the flow ratio of nitrogen to oxygen is 10:1, and the flow of oxygen is 1sccm-4sccm.
8. The method of claim 5, wherein the step of growing a buffer layer on the substrate comprises:
Transferring the semi-finished epitaxial wafer after growing the buffer layer into MOCVD equipment;
Setting the annealing temperature to 600-800 ℃ and the annealing time to 1-5 min, and annealing the semi-finished epitaxial wafer in oxygen atmosphere;
Setting the annealing temperature to be 1000-1100 ℃ and the annealing time to be 5-10 min, and annealing the semi-finished epitaxial wafer in nitrogen atmosphere; wherein the pressure of the two annealing is 100-500 torr;
And after the annealing is finished, sequentially growing an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer on the buffer layer of the semi-finished epitaxial wafer.
9. An LED chip, wherein the LED chip comprises: the Micro-LED epitaxial wafer of any one of claims 1 to 4.
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