CN117832347B - Micro-LED epitaxial wafer, preparation method thereof and LED chip - Google Patents
Micro-LED epitaxial wafer, preparation method thereof and LED chip Download PDFInfo
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- CN117832347B CN117832347B CN202410240437.6A CN202410240437A CN117832347B CN 117832347 B CN117832347 B CN 117832347B CN 202410240437 A CN202410240437 A CN 202410240437A CN 117832347 B CN117832347 B CN 117832347B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 56
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 40
- 238000000137 annealing Methods 0.000 claims description 28
- 229910052757 nitrogen Inorganic materials 0.000 claims description 28
- 229910052786 argon Inorganic materials 0.000 claims description 24
- 230000000903 blocking effect Effects 0.000 claims description 22
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 20
- 239000001301 oxygen Substances 0.000 claims description 20
- 229910052760 oxygen Inorganic materials 0.000 claims description 20
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 16
- 229910001257 Nb alloy Inorganic materials 0.000 claims description 14
- QNTVPKHKFIYODU-UHFFFAOYSA-N aluminum niobium Chemical group [Al].[Nb] QNTVPKHKFIYODU-UHFFFAOYSA-N 0.000 claims description 12
- 238000004544 sputter deposition Methods 0.000 claims description 12
- 239000007789 gas Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 238000005240 physical vapour deposition Methods 0.000 claims description 10
- 239000012298 atmosphere Substances 0.000 claims description 8
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 6
- 239000010955 niobium Substances 0.000 claims description 6
- 229910052758 niobium Inorganic materials 0.000 claims description 6
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 claims description 6
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 6
- 239000012495 reaction gas Substances 0.000 claims description 6
- 238000005477 sputtering target Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 239000013077 target material Substances 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 24
- 239000000463 material Substances 0.000 abstract description 13
- 230000007704 transition Effects 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 45
- 229910052594 sapphire Inorganic materials 0.000 description 13
- 239000010980 sapphire Substances 0.000 description 13
- 229910002704 AlGaN Inorganic materials 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 230000000737 periodic effect Effects 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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Abstract
The invention provides a Micro-LED epitaxial wafer, a preparation method thereof and an LED chip, wherein the Micro-LED epitaxial wafer comprises a buffer layer, the buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers. According to the Micro-LED epitaxial wafer, alNbN is adopted as a first buffer sublayer material, so that smaller lattice mismatch degree is achieved, a buffer transition effect can be better achieved, dislocation generated due to lattice mismatch can be reduced, and therefore crystal quality of epitaxial layer growth is improved; in addition, alONbN has very low internal stress, and AlONbN is adopted as a second buffer sub-layer to adjust the warping of the epitaxial layer, so that the problem that a Micro-LED epitaxial wafer which meets the requirements of Micro-LED display in the prior art is lack of low dislocation density, high crystal quality and high luminous efficiency is solved.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a Micro-LED epitaxial wafer, a preparation method thereof and an LED chip.
Background
At present, micro-LEDs attract more and more attention, and are expected to promote the development of display screens to be light and thin, miniaturized, low in power consumption and high in brightness, and are known as the next-generation Micro-display technology, although the Micro-LED display technology is rapidly developing. Because Micro-LED chips are miniaturized to be smaller than 50 mu m compared with the traditional chips, extremely high yield and uniformity of luminous wavelength are required, and higher requirements are provided for the epitaxial technology; that is, it is necessary to reduce dislocation density to adjust warpage to improve crystal quality and luminous efficiency.
In the prior art, there are methods for heteroepitaxially growing GaN on a sapphire substrate by using a patterned substrate technology and a buffer layer technology to reduce dislocation density, improve crystal quality, and adjust warpage to improve luminous efficiency, for example, an AlN buffer layer, an AlN/AlGaN or AlGaN/GaN superlattice buffer layer filters dislocation and adjusts warpage, which can satisfy the application of LED illumination and common display fields, but are difficult to apply to MicroLED with high resolution, and on the basis, dislocation density needs to be further reduced to improve crystal quality and luminous efficiency of an epitaxial layer.
Disclosure of Invention
Based on the above, the invention aims to provide a Micro-LED epitaxial wafer, a preparation method thereof and an LED chip, and solve the problem that the Micro-LED epitaxial wafer which is low in dislocation density, high in crystal quality and high in luminous efficiency and meets the requirements of Micro-LED display is lacking in the prior art.
The invention provides a Micro-LED epitaxial wafer, which comprises a buffer layer, wherein the buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers.
According to the Micro-LED epitaxial wafer, the buffer layer is arranged on the substrate, and consists of the first buffer sub-layer and the second buffer sub-layer which are grown periodically, and the first buffer sub-layer is made of AlNbN materials, and the lattice constant of AlNbN is between that of sapphire and AlN, so that under the condition of taking sapphire as the substrate, alNbN is adopted as the material of the first buffer sub-layer, compared with the situation of adopting AlN as the material of the buffer layer, the buffer layer has smaller lattice mismatch degree, the buffer transition effect can be better achieved, dislocation generated due to lattice mismatch can be reduced, and the crystal quality of epitaxial layer growth is improved; in addition, alONbN has very low internal stress, so that AlONbN is adopted as a second buffer sub-layer to adjust the warpage of the epitaxial layer, in addition, a GaN layer or AlN is usually arranged on the buffer layer, nbN has a similar crystal structure with AlN and GaN, and AlNbN and AlONbN also have a similar crystal structure with AlN and GaN, so that AlN or GaN grows on the AlNbN layer and the AlONbN layer to have good matching property so as to ensure the crystal quality of the epitaxial wafer. The dislocation density and warpage are reduced, and the crystal quality is improved, so that the overall luminous efficiency is improved. Therefore, the invention solves the problem that the Micro-LED epitaxial wafer which is low in dislocation density, high in crystal quality and high in luminous efficiency and meets the display requirement of the Micro-LED is lacking in the prior art.
Preferably, the thickness of the first buffer sub-layer is 10nm-20nm in a single period.
Preferably, the thickness of the second buffer sub-layer is 1nm-5nm in a single period.
Preferably, the thickness of the buffer layer is 100nm-500nm, and the cycle number of the buffer layer is 10-30.
Preferably, the LED epitaxial wafer further comprises a substrate, and the buffer layer is laminated on the substrate;
And the undoped GaN layer, the N-type doped GaN layer, the multiple quantum well layer, the electron blocking layer, the P-type doped GaN layer and the contact layer are sequentially laminated on the buffer layer.
The invention also provides a preparation method of the Micro-LED epitaxial wafer, which comprises the following steps:
Providing a substrate;
Growing a buffer layer on the substrate;
The buffer layer comprises a first buffer sub-layer and a second buffer sub-layer which grow periodically, the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers.
Preferably, the step of growing a buffer layer on the substrate includes:
and (3) placing the substrate in a PVD system, periodically and alternately growing a first buffer sub-layer and a second buffer sub-layer by magnetron sputtering, wherein the growth period is 10-30, the sputtering target is an aluminum-niobium alloy target, and the mole percentage of niobium in the aluminum-niobium alloy target is 1-10%.
Preferably, the step of periodically and alternately growing the first buffer sub-layer and the second buffer sub-layer by magnetron sputtering includes:
Placing a substrate in a PVD reaction chamber, introducing sputtering gas argon and reactive gas nitrogen into the PVD reaction chamber, and bombarding an aluminum-niobium alloy target material so as to grow a first buffer sub-layer;
after the growth of the first buffer sub-layer is finished, sputtering gas argon, reaction gas nitrogen and oxygen are introduced into the PVD reaction chamber, and the Al-Nb alloy target is bombarded again so as to grow a second buffer sub-layer on the first buffer sub-layer;
Repeating the steps for 10-30 cycles to finish the preparation of the buffer layer;
wherein, when the first buffer sub-layer and the second buffer sub-layer are prepared, the flow ratio of argon to nitrogen is 3:1-10:1, and when the second buffer sub-layer is prepared, the flow ratio of nitrogen to oxygen is 10:1, and the flow of oxygen is 1sccm-4sccm.
Preferably, the step of growing a buffer layer on the substrate comprises:
Transferring the semi-finished epitaxial wafer after growing the buffer layer into MOCVD equipment;
Setting the annealing temperature to 600-800 ℃ and the annealing time to 1-5 min, and annealing the semi-finished epitaxial wafer in oxygen atmosphere;
Setting the annealing temperature to be 1000-1100 ℃ and the annealing time to be 5-10 min, and annealing the semi-finished epitaxial wafer in nitrogen atmosphere; wherein the pressure of the two annealing is 100-500 torr;
And after the annealing is finished, sequentially growing an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer on the buffer layer of the semi-finished epitaxial wafer.
The invention further provides an LED chip comprising the Micro-LED epitaxial wafer.
Drawings
FIG. 1 is a schematic diagram of a buffer layer in a Micro-LED epitaxial wafer according to an embodiment of the present invention;
Fig. 2 is a schematic structural diagram of a Micro-LED epitaxial wafer according to an embodiment of the present invention;
FIG. 3 is a flowchart of a method for manufacturing a Micro-LED epitaxial wafer according to an embodiment of the present invention;
description of main reference numerals:
the invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1 to 2, the present invention discloses a partial schematic structure of a Micro-LED epitaxial wafer, which includes a substrate 10, and a buffer layer 20, an undoped GaN layer 30, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer sequentially disposed on the substrate.
In this embodiment, the substrate 10 may be a sapphire substrate, specifically, the thickness of the undoped GaN layer 30 is 1um-3um, and the thickness of the undoped GaN layer 30 is 1.1 um, 1.2 um, 2 um or 2.4 um, which is exemplary, but not limited thereto; the thickness of the N-type doped GaN layer 40 is 1 μm-3 μm, and exemplary thicknesses of the N-type doped GaN layer 40 are 1 μm, 1.3 μm, 1.8 μm, 2 μm or 2.5 μm, but are not limited thereto; the multiple quantum well layer 50 is a periodic structure in which InGaN layers and GaN layers are alternately grown, the thickness of a single InGaN layer in the multiple quantum well layer 50 is 2nm to 4nm, and exemplary, but not limited thereto, the thickness of a single InGaN layer in the multiple quantum well layer 50 is 2nm, 2.5nm, 3nm, 3.5nm, or 4nm, and the like, and the thickness of a single GaN layer in the multiple quantum well layer 50 is 8nm to 20nm, exemplary, but not limited thereto, the thickness of a single GaN layer in the multiple quantum well layer 50 is 8nm, 12nm, 16nm, 18nm, or 20nm, and the like, and the number of periods is 5 to 12, exemplary, the number of periods is 5,6, 7, 8, 9, 10, 11, or 12, and the like. The electron blocking layer 60 is an AlGaN layer, and the thickness of the electron blocking layer 60 is 20nm to 50nm, and the thickness of the electron blocking layer 60 is 20nm, 25nm, 30nm, 35nm, 40nm, 50nm, or the like, by way of example, but not limited thereto; the thickness of the P-type doped GaN layer 70 is 30nm to 100nm, and exemplary P-type doped GaN layer 70 is 30nm, 40nm, 50nm, 60nm, 80nm, 100nm, or the like, but is not limited thereto, and the P-type doped GaN layer 70 is used to provide holes; the thickness of the P-type GaN contact layer 80 is 10nm to 30nm, and the thickness of the P-type GaN contact layer 80 is 00nm, 12nm, 18nm, 20nm, 26nm, 30nm, or the like, but is not limited thereto.
In this embodiment, the buffer layer 20 includes a first buffer sub-layer 21 and a second buffer sub-layer 22 that are periodically grown, where the thickness of the first buffer sub-layer 21 is greater than that of the second buffer sub-layer 22, and the first buffer sub-layer 21 is AlNbN layers, and the second buffer sub-layer 22 is AlONbN layers. It can be understood that, since the first buffer sublayer 21 is made of AlNbN materials, and the lattice constant of AlNbN is between that of sapphire and AlN, in the case of using sapphire as a substrate, alNbN is adopted as the material of the first buffer sublayer 21, compared with the material of AlN as the buffer layer, the material has smaller lattice mismatch degree, can better play a role in buffer transition, and can reduce dislocation generated due to lattice mismatch, thereby improving the crystal quality of epitaxial layer growth; in addition, alONbN has very low internal stress, so that AlONbN is adopted as the second buffer sub-layer 22 to adjust the warpage of the epitaxial layer, in addition, a GaN layer or AlN is usually arranged on the buffer layer 20, nbN has a similar crystal structure with AlN and GaN, and further AlNbN and AlONbN also have a similar crystal structure with AlN and GaN, so that growing AlN or GaN on the AlNbN layer and AlONbN layer has good matching property to ensure the crystal quality of the epitaxial wafer. The dislocation density and warpage are reduced, and the crystal quality is improved, so that the overall luminous efficiency is improved.
In addition, the thickness difference of each buffer layer 20 has some influence on warpage and crystal quality, and in this embodiment, the thickness of the buffer layer 20 is 100nm to 500nm, and exemplary thicknesses of the buffer layer 20 are 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, or the like, but not limited thereto; the thickness of the first buffer sub-layer 21 is 10nm to 20nm, and exemplary, the thickness of the first buffer sub-layer 21 is 10nm, 12nm, 15nm, 17nm, 19nm, 20nm, or the like, but is not limited thereto; the thickness of the second buffer sub-layer 22 is 1nm to 5nm, and exemplary, the thickness of the second buffer sub-layer 22 is 1nm, 2nm, 2.5nm, 3nm, 4nm, 5nm, or the like, but is not limited thereto; the number of cycles is 10-30, and is exemplified by, but not limited to, 10, 12, 15, 17, 20, 24, 26, 28, 30, etc.
Correspondingly, referring to fig. 3, the invention also discloses a preparation method of the Micro-LED epitaxial wafer, which is used for preparing the Micro-LED epitaxial wafer, wherein the preparation method comprises the following steps:
S100: providing a substrate;
Preferably, the substrate may be a sapphire substrate.
S200: and sequentially depositing the buffer layer, the undoped GaN layer, the N-type doped GaN layer, the multiple quantum well layer, the electron blocking layer, the P-type doped GaN layer and the contact layer on the substrate along the epitaxial growth direction.
Specifically, S200 includes:
s201: growing a buffer layer on a sapphire substrate;
Specifically, a buffer layer is grown in a PVD system by magnetron sputtering, and the buffer layer comprises a first buffer sub-layer and a second buffer sub-layer which are grown periodically. Wherein the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers; controlling the thickness of the deposited single first buffer sub-layer to be 10nm-20nm, and controlling the thickness of the second buffer sub-layer to be 1nm-5nm.
Specifically, the sputtering target is an aluminum-niobium alloy target, and the mole percentage of niobium in the aluminum-niobium alloy target is 1% -10%. The growth temperature of the first buffer sub-layer is 300-600 ℃, the sputtering power is 2000-4000W, the growth pressure is 1-10 torr, the first buffer sub-layer grows in a mixed atmosphere of argon and nitrogen, the sputtering gas is argon, the reaction gas is nitrogen, the flow rate of the argon is 30-400 sccm, the flow rate of the nitrogen is 10-40 sccm, and the flow ratio of the argon to the nitrogen is 3:1-10:1; the growth temperature of the second buffer sub-layer is 300-600 ℃, the sputtering power is 2000-4000W, the growth pressure is 1torr-10torr, the second buffer sub-layer grows under the mixed atmosphere of argon, nitrogen and oxygen, the sputtering gas is argon, the reaction gas is nitrogen and oxygen, the flow rate of the argon is 30sccm-400sccm, the flow rate of the nitrogen is 10sccm-40sccm, the flow rate of the oxygen is 1sccm-4sccm, the flow rate ratio of the argon to the nitrogen is 3:1-10:1, and the flow rate ratio of the nitrogen to the oxygen is 10:1.
S202: annealing;
Specifically, after the buffer layer is grown, the epitaxial wafer is transferred into MOCVD, and is annealed for 1min-5min under the oxygen atmosphere, the annealing temperature is 600-800 ℃, then is annealed under the nitrogen atmosphere, the annealing time is 5min-10min, the annealing temperature is 1000-1100 ℃, and the annealing pressure is 100-500 torr for both times.
S203, growing an undoped GaN layer on the buffer layer;
Specifically, an undoped GaN layer is grown in MOCVD equipment, the thickness of the deposited undoped GaN layer is controlled to be 1um-3um, the growth temperature is 1000-1200 ℃, and the growth pressure is 100-200 torr.
S204: growing an N-type doped GaN layer on the undoped GaN layer;
Specifically, an N-type doped GaN layer is grown in MOCVD equipment, the thickness of the deposited N-type doped GaN layer is controlled to be 1um-3um, the growth temperature is 1000-1200 ℃, and the growth pressure is 100-200 torr.
S205: growing a multi-quantum well layer on the N-type doped GaN layer;
Specifically, a multi-quantum well layer is grown in MOCVD equipment, wherein the multi-quantum well layer is of a periodic structure in which InGaN layers and GaN layers alternately grow, the thickness of a single InGaN layer in the deposited multi-quantum well layer is controlled to be 2nm-4nm, the growth temperature is 800-900 ℃, the growth pressure is 100-200 torr, the thickness of a single GaN layer in the multi-quantum well layer is 8nm-20nm, the growth temperature is 900-1000 ℃, the growth pressure is 100-200 torr, and the cycle number is 5-12.
S206: growing an electron blocking layer on the multiple quantum well layer;
Specifically, an electron blocking layer is grown in MOCVD equipment, wherein the electron blocking layer is an AlGaN layer, the thickness of the deposited electron blocking layer is controlled to be 20nm-50nm, the growth temperature is 950-1100 ℃, the growth pressure is 50-100 torr, and the Al component is 0.1-0.5.
S207: growing a P-type doped GaN layer on the electron blocking layer;
Specifically, a P-type doped GaN layer is grown in MOCVD equipment, wherein the thickness of the deposited P-type doped GaN layer is controlled to be 30nm-100nm, the growth temperature is 950-1050 ℃, and the growth pressure is 100-600 torr.
S208: growing a P-type GaN contact layer on the P-type doped GaN layer;
Specifically, a P-type GaN contact layer is grown in MOCVD equipment, wherein the thickness of the deposited P-type GaN contact layer is controlled to be 10nm-30nm, the growth temperature is 1000-1100 ℃, and the growth pressure is 100-300 torr. And after the epitaxial structure is grown, the temperature of the reaction cavity is reduced, annealing treatment is carried out in a nitrogen atmosphere, the annealing temperature range is 650-850 ℃, the annealing treatment is carried out for 5-15 minutes, and the temperature is reduced to room temperature, so that the epitaxial growth is finished.
The invention is further illustrated by the following examples:
Example 1
The embodiment provides a Micro-LED epitaxial wafer, which further comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer which are sequentially arranged on the substrate.
In this embodiment, the substrate is a sapphire substrate, the thickness of the undoped GaN layer is 2um, the thickness of the n-doped GaN layer is 2um, the multiple quantum well layer is a periodic structure in which InGaN layers and GaN layers alternately grow, the thickness of a single InGaN layer in the multiple quantum well layer is 3nm, the thickness of a single GaN layer in the multiple quantum well layer is 14nm, and the number of cycles is 8. The electron blocking layer is an AlGaN layer, the thickness of the electron blocking layer is 35nm, the thickness of the P-type doped GaN layer is 65nm, and the thickness of the P-type GaN contact layer is 20nm.
In this embodiment, the buffer layer includes a first buffer sub-layer and a second buffer sub-layer that periodically grow, where the thickness of the first buffer sub-layer is greater than that of the second buffer sub-layer, and the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers. The thickness of the first buffer sub-layer is 18nm, the thickness of the second buffer sub-layer is 2nm, and the period number of the buffer layers is 3.
The preparation method of the Micro-LED epitaxial wafer in the embodiment comprises the following steps:
(1): providing a substrate;
In this embodiment, the substrate is a sapphire substrate.
(2): Growing a buffer layer on a sapphire substrate;
Specifically, a buffer layer is grown in a PVD system by magnetron sputtering, and the buffer layer comprises a first buffer sub-layer and a second buffer sub-layer which are grown periodically. Wherein the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers; the thickness of the deposited single first buffer sub-layer was controlled to be 18nm and the thickness of the second buffer sub-layer was controlled to be 2nm.
Specifically, the sputtering target is an aluminum-niobium alloy target, and the mole percentage of niobium in the aluminum-niobium alloy target is 5%. The growth temperature of the first buffer sub-layer is 600 ℃, the sputtering power is 3000W, the growth pressure is 1torr, the first buffer sub-layer grows in a mixed atmosphere of argon and nitrogen, the sputtering gas is argon, the reaction gas is nitrogen, the flow of the argon is 200sccm, the flow of the nitrogen is 20sccm, and the flow ratio of the argon to the nitrogen is 7:1; the growth temperature of the second buffer sub-layer is 600 ℃, the sputtering power is 3000W, the growth pressure is 1torr, the second buffer sub-layer grows in a mixed atmosphere of argon, nitrogen and oxygen, the sputtering gas is argon, the reaction gas is nitrogen and oxygen, the flow of the argon is 200sccm, the flow of the nitrogen is 20sccm, the flow of the oxygen is 2sccm, the flow ratio of the argon to the nitrogen is 7:1, and the flow ratio of the nitrogen to the oxygen is 10:1. The buffer layer cycle number was 15.
S202: annealing;
Specifically, after the buffer layer is grown, the epitaxial wafer is transferred into MOCVD, and is annealed for 3min under the oxygen atmosphere at 700 ℃ and then under the nitrogen atmosphere for 8min at 1050 ℃ under 300torr.
S203, growing an undoped GaN layer on the buffer layer;
Specifically, an undoped GaN layer is grown in MOCVD equipment, the thickness of the deposited undoped GaN layer is controlled to be 2um, the growth temperature is 1100 ℃, and the growth pressure is 150torr.
S204: growing an N-type doped GaN layer on the undoped GaN layer;
Specifically, an N-type doped GaN layer is grown in MOCVD equipment, the thickness of the deposited N-type doped GaN layer is controlled to be 2um, the growth temperature is 1100 ℃, and the growth pressure is 150torr.
S205: growing a multi-quantum well layer on the N-type doped GaN layer;
Specifically, a multiple quantum well layer is grown in MOCVD equipment, wherein the multiple quantum well layer is a periodic structure of alternately growing InGaN layers and GaN layers, the thickness of a single InGaN layer in the deposited multiple quantum well layer is controlled to be 3nm, the growth temperature is 850 ℃, the growth pressure is 150torr, the thickness of a single GaN layer in the multiple quantum well layer is 14nm, the growth temperature is 950 ℃, the growth pressure is 150torr, and the number of cycles is 8.
S206: growing an electron blocking layer on the multiple quantum well layer;
specifically, an electron blocking layer is grown in MOCVD equipment, wherein the electron blocking layer is an AlGaN layer, the thickness of the deposited electron blocking layer is controlled to be 35nm, the growth temperature is 1000 ℃, the growth pressure is 75torr, and the Al component is between 0.3.
S207: growing a P-type doped GaN layer on the electron blocking layer;
Specifically, a P-type doped GaN layer is grown in an MOCVD apparatus, wherein the thickness of the deposited P-type doped GaN layer is controlled to 65nm, the growth temperature is 1000 ℃, and the growth pressure is 350torr.
S208: growing a P-type GaN contact layer on the P-type doped GaN layer;
Specifically, a P-type GaN contact layer is grown in MOCVD equipment, wherein the thickness of the deposited P-type GaN contact layer is controlled to be 20nm, the growth temperature is 1050 ℃, and the growth pressure is 200torr. And after the epitaxial structure is grown, the temperature of the reaction cavity is reduced, annealing treatment is performed in a nitrogen atmosphere, the annealing temperature interval is 700 ℃, the annealing treatment is performed for 10 minutes, and the temperature is reduced to room temperature, so that the epitaxial growth is finished.
Example two
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the thickness of the first buffer sub-layer is 10nm.
Example III
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the thickness of the first buffer sub-layer is 14nm.
Example IV
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the thickness of the first buffer sub-layer is 20nm.
Example five
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the thickness of the second buffer sub-layer is 1nm.
Example six
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the thickness of the second buffer sub-layer is 3nm.
Example seven
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the thickness of the second buffer sub-layer is 5nm.
Example eight
The present example also provides a Micro-LED epitaxial wafer, which is different from the first example in that the mole percentage of niobium in the aluminum-niobium alloy target is 1%.
Example nine
The present example also provides a Micro-LED epitaxial wafer, which is different from the first example in that the mole percentage of niobium in the aluminum-niobium alloy target is 10%.
Examples ten
The embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the flow ratio of argon to nitrogen is 3:1 when the first buffer sub-layer and the second buffer sub-layer are grown.
Example eleven
The embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the flow ratio of argon to nitrogen is 10:1 when the first buffer sub-layer and the second buffer sub-layer are grown.
Example twelve
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the flow rate of oxygen is 1sccm when the second buffer sub-layer is grown.
Example thirteen
The present embodiment also provides a Micro-LED epitaxial wafer, which is different from the first embodiment in that the flow rate of oxygen is 3sccm when the second buffer sub-layer is grown.
Comparative example one
The comparative example improves an LED epitaxial wafer and a method for manufacturing the same, and is different from the first embodiment in that the buffer layer is an AlN layer.
Micro-LED epitaxial wafers obtained in examples one to thirteenth and comparative example one were prepared to obtain LED chips with a size of 9mil x 11mil, and tested under the same conditions, and specific results are shown in table 1:
TABLE 1
As can be seen from table 1, the Micro-LED epitaxial wafer obtained by the method in the embodiment of the present invention is used to prepare an LED chip with a size of 9mil x 11mil, and under the same test conditions, compared with the LED chip prepared by the conventional method in comparative example 1, the LED chip prepared by the method in the first embodiment of the present invention has a forward luminance effectively improved by 28.59%, and meanwhile, the LED chips prepared by the methods in other embodiments of the present invention also have a luminance better than that of the LED chips prepared by the conventional method.
The embodiment of the invention also provides an LED chip, which comprises the Micro-LED epitaxial wafer.
In summary, according to the Micro-LED epitaxial wafer, the preparation method thereof and the LED chip provided by the embodiment of the invention, the buffer layer is arranged on the substrate, wherein the buffer layer is composed of the first buffer sub-layer and the second buffer sub-layer which grow periodically, and as the first buffer sub-layer adopts AlNbN material and the lattice constant of AlNbN is between that of sapphire and AlN, under the condition of taking sapphire as the substrate, alNbN is adopted as the material of the first buffer sub-layer, compared with the material of the buffer layer adopting AlN, the buffer layer has smaller lattice mismatch degree, can better play a role of buffer transition, and can reduce dislocation generated due to lattice mismatch, thereby improving the crystal quality of epitaxial layer growth; in addition, alONbN has very low internal stress, so that AlONbN is adopted as a second buffer sub-layer to adjust the warpage of the epitaxial layer, in addition, a GaN layer or AlN is usually arranged on the buffer layer, nbN has a similar crystal structure with AlN and GaN, and AlNbN and AlONbN also have a similar crystal structure with AlN and GaN, so that AlN or GaN grows on the AlNbN layer and the AlONbN layer to have good matching property so as to ensure the crystal quality of the epitaxial wafer. The dislocation density and warpage are reduced, and the crystal quality is improved, so that the overall luminous efficiency is improved. Therefore, the invention solves the problem that the Micro-LED epitaxial wafer which is low in dislocation density, high in crystal quality and high in luminous efficiency and meets the display requirement of the Micro-LED is lacking in the prior art.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (9)
1. The Micro-LED epitaxial wafer is characterized by comprising a buffer layer, wherein the buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers;
The LED epitaxial wafer further comprises a substrate, and the buffer layer is laminated on the substrate;
And the undoped GaN layer, the N-type doped GaN layer, the multiple quantum well layer, the electron blocking layer, the P-type doped GaN layer and the contact layer are sequentially laminated on the buffer layer.
2. The Micro-LED epitaxial wafer of claim 1, wherein the thickness of the first buffer sub-layer is 10nm-20nm in a single period.
3. The Micro-LED epitaxial wafer of claim 1, wherein the thickness of the second buffer sub-layer is 1nm-5nm in a single period.
4. A Micro-LED epitaxial wafer according to claim 2 or 3, characterized in that the thickness of the buffer layer is 100nm-500nm and the number of cycles of the buffer layer is 10-30.
5. A method for preparing a Micro-LED epitaxial wafer, which is used for preparing the Micro-LED epitaxial wafer according to any one of claims 1 to 4, the method comprising:
Providing a substrate;
Growing a buffer layer on the substrate;
The buffer layer is of a periodical overlapping structure and comprises a first buffer sub-layer and a second buffer sub-layer, wherein the thickness of the first buffer sub-layer is larger than that of the second buffer sub-layer, the first buffer sub-layer is AlNbN layers, and the second buffer sub-layer is AlONbN layers.
6. The method of claim 5, wherein the step of growing a buffer layer on the substrate comprises:
and (3) placing the substrate in a PVD system, periodically and alternately growing a first buffer sub-layer and a second buffer sub-layer by magnetron sputtering, wherein the growth period is 10-30, the sputtering target is an aluminum-niobium alloy target, and the mole percentage of niobium in the aluminum-niobium alloy target is 1-10%.
7. The method of manufacturing a Micro-LED epitaxial wafer of claim 6, wherein the step of periodically and alternately growing the first buffer sub-layer and the second buffer sub-layer by magnetron sputtering comprises:
Placing a substrate in a PVD reaction chamber, introducing sputtering gas argon and reactive gas nitrogen into the PVD reaction chamber, and bombarding an aluminum-niobium alloy target material so as to grow a first buffer sub-layer;
after the growth of the first buffer sub-layer is finished, sputtering gas argon, reaction gas nitrogen and oxygen are introduced into the PVD reaction chamber, and the Al-Nb alloy target is bombarded again so as to grow a second buffer sub-layer on the first buffer sub-layer;
Repeating the steps for 10-30 cycles to finish the preparation of the buffer layer;
wherein, when the first buffer sub-layer and the second buffer sub-layer are prepared, the flow ratio of argon to nitrogen is 3:1-10:1, and when the second buffer sub-layer is prepared, the flow ratio of nitrogen to oxygen is 10:1, and the flow of oxygen is 1sccm-4sccm.
8. The method of claim 5, wherein the step of growing a buffer layer on the substrate comprises:
Transferring the semi-finished epitaxial wafer after growing the buffer layer into MOCVD equipment;
Setting the annealing temperature to 600-800 ℃ and the annealing time to 1-5 min, and annealing the semi-finished epitaxial wafer in oxygen atmosphere;
Setting the annealing temperature to be 1000-1100 ℃ and the annealing time to be 5-10 min, and annealing the semi-finished epitaxial wafer in nitrogen atmosphere; wherein the pressure of the two annealing is 100-500 torr;
And after the annealing is finished, sequentially growing an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer and a contact layer on the buffer layer of the semi-finished epitaxial wafer.
9. An LED chip, wherein the LED chip comprises: the Micro-LED epitaxial wafer of any one of claims 1 to 4.
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Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005183930A (en) * | 2003-11-26 | 2005-07-07 | Sanken Electric Co Ltd | Semiconductor light emitting element and its manufacturing method |
| CN1665001A (en) * | 2005-04-05 | 2005-09-07 | 中国科学院物理研究所 | Three-dopant contained P-type zinc oxide film and method for making same |
| TW201003983A (en) * | 2008-07-15 | 2010-01-16 | Au Optronics Corp | Light emitting diode and fabricating method thereof |
| CN101997071A (en) * | 2009-08-17 | 2011-03-30 | 三星电子株式会社 | Substrate structures and methods of manufacturing the same |
| CN102605320A (en) * | 2011-01-24 | 2012-07-25 | 鸿富锦精密工业（深圳）有限公司 | Coated workpiece with hard coating and method for manufacturing same |
| CN103515495A (en) * | 2013-09-13 | 2014-01-15 | 华灿光电股份有限公司 | GaN-base light-emitting diode chip growing method |
| CN105659383A (en) * | 2013-10-21 | 2016-06-08 | 传感器电子技术股份有限公司 | Heterostructure including a composite semiconductor layer |
| CN108110098A (en) * | 2017-10-25 | 2018-06-01 | 华灿光电（浙江）有限公司 | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof |
| CN115084329A (en) * | 2022-07-25 | 2022-09-20 | 江西兆驰半导体有限公司 | LED epitaxial wafer applied to Si substrate and growth method thereof |
| CN116581159A (en) * | 2023-05-12 | 2023-08-11 | 苏州汉骅半导体有限公司 | Vertical power device and preparation method thereof |
| CN117577748A (en) * | 2023-11-20 | 2024-02-20 | 江西兆驰半导体有限公司 | LED epitaxial wafer, preparation method thereof and LED |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI566300B (en) * | 2011-03-23 | 2017-01-11 | 斯克林集團公司 | Heat treatment method and heat treatment apparatus for heating substrate by irradiating substrate with light |
| US20230282789A1 (en) * | 2022-02-25 | 2023-09-07 | Meta Platforms Technologies, Llc | Microdisplay architecture with light extraction efficiency enhancement |
-
2024
- 2024-03-04 CN CN202410240437.6A patent/CN117832347B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005183930A (en) * | 2003-11-26 | 2005-07-07 | Sanken Electric Co Ltd | Semiconductor light emitting element and its manufacturing method |
| CN1665001A (en) * | 2005-04-05 | 2005-09-07 | 中国科学院物理研究所 | Three-dopant contained P-type zinc oxide film and method for making same |
| TW201003983A (en) * | 2008-07-15 | 2010-01-16 | Au Optronics Corp | Light emitting diode and fabricating method thereof |
| CN101997071A (en) * | 2009-08-17 | 2011-03-30 | 三星电子株式会社 | Substrate structures and methods of manufacturing the same |
| CN102605320A (en) * | 2011-01-24 | 2012-07-25 | 鸿富锦精密工业（深圳）有限公司 | Coated workpiece with hard coating and method for manufacturing same |
| CN103515495A (en) * | 2013-09-13 | 2014-01-15 | 华灿光电股份有限公司 | GaN-base light-emitting diode chip growing method |
| CN105659383A (en) * | 2013-10-21 | 2016-06-08 | 传感器电子技术股份有限公司 | Heterostructure including a composite semiconductor layer |
| CN108110098A (en) * | 2017-10-25 | 2018-06-01 | 华灿光电（浙江）有限公司 | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof |
| CN115084329A (en) * | 2022-07-25 | 2022-09-20 | 江西兆驰半导体有限公司 | LED epitaxial wafer applied to Si substrate and growth method thereof |
| CN116581159A (en) * | 2023-05-12 | 2023-08-11 | 苏州汉骅半导体有限公司 | Vertical power device and preparation method thereof |
| CN117577748A (en) * | 2023-11-20 | 2024-02-20 | 江西兆驰半导体有限公司 | LED epitaxial wafer, preparation method thereof and LED |
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