CN107636812B - 双材料高k热密封剂系统 - Google Patents

双材料高k热密封剂系统 Download PDF

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CN107636812B
CN107636812B CN201580080102.1A CN201580080102A CN107636812B CN 107636812 B CN107636812 B CN 107636812B CN 201580080102 A CN201580080102 A CN 201580080102A CN 107636812 B CN107636812 B CN 107636812B
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die
encapsulant
electronic package
filler
thermal conductivity
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CN107636812A (zh
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V·麦克马汉
S·纳加拉坚
E·博左尔格-格拉叶利
A·马利克
K-H·楚
L·王
N·阿南坦克里希南
C·J·魏因曼
A·埃坦
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Intel Corp
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Intel Corp
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Abstract

一些实施例涉及电子封装。电子封装包括第一管芯和堆叠到第一管芯上的第二管芯。第一密封剂位于第一管芯和第二管芯之间。第一密封剂包括覆盖第一管芯与第二管芯之间的第一体积的第一材料。第二密封剂位于第一管芯与第二管芯之间。第二密封剂包括覆盖第一管芯与第二管芯之间的第二体积的第二材料。所述第一材料具有比第二材料更高的导热率，并且与第一材料相比较，第二材料更有效地促进第一管芯与第二管芯之间的电连接。

Description

双材料高K热密封剂系统
技术领域
本文所述的实施例总体上涉及电子封装和使用双材料高导热率密封剂系统将第一管芯连接到第二管芯以形成电子封装的方法。
背景技术
最小化晶体管尺寸以便跟上摩尔定律持续地需要减小的第一级互连(FLI)间距和凸起尺寸。另外，使用高级电介质常常导致在硅中利用低k且极低导热率的材料。
这些因素的组合导致对组装期间的应力和热机械应力的较高敏感度。因此，随着每个新技术进步，用于减小热机械应力的解决方案变得明显更重要。
将芯片(CPU、存储器、图形)一个堆叠在另一个上产生了针对提高的电性能(例如，在不同的产品区段中使用的较高带宽和/或较低时延)的较短互连线。然而，芯片堆叠导致增加的热阻，从而使相对于未堆叠的芯片从CPU除去热量变得更难。
常规堆叠式电子设备的分析指示密封剂层的热阻是在从堆叠式封装传递热量时的关键限制因素。当前封装架构使用一般包括二氧化硅填料的芯片间密封剂材料。
这些一般密封剂范围的复合导热性通常限制包括密封剂制备的电子设备从堆叠式电子设备传递热量的能力。
附图说明
图1示出了一些一般导热填料相对于熔融的二氧化硅的热特性。
图2示出了可以适合于实现例如堆叠式电子封装的足够的热耗散的窗。
图3示出了示例性电子封装的顶视图。
图4示出了就在第一管芯和第二管芯压缩在一起之前的示例性电子封装的侧视图。
图5示出了示例性电子封装的底视图，其中第一管芯被去除以暴露第二管芯的下表面。
图6示出了另一个示例性电子封装的顶视图，其中第二管芯被去除以暴露第二管芯的上表面。
图7示出了另一个示例性电子封装的顶视图。
图8是示出制造示例性电子封装的示例性方法的流程图。
图9是示出制造示例性电子封装的另一个示例性方法的流程图。
图10是并入至少一个电子封装和/或本文所述的方法的电子设备的方框图。
具体实施方式
下面的描述和附图充分示出了特定的实施例以使本领域中的技术人员能够实践它们。其它实施例可以并入结构、逻辑、电气、过程和其它变化。一些实施例的部分和特征可以包括在其它实施例的那些部分和特征中或代替其它实施例的那些部分和特征。在权利要求中阐述的实施例包含那些权利要求的所有可用的等效形式。
如本申请中使用的取向术语(例如“水平”)相对于与晶片或衬底的常规平面或表面平行的平面来定义，而不考虑晶片或衬底的取向。术语“竖直”指代垂直于如上面所定义的水平的方向。介词(例如“在……上”、“侧”(如“侧壁”中的)、“较高”、“较低”、“在……之上”和“在……之下”相对于在晶片或衬底的顶表面上的常规平面或表面来定义，而不考虑晶片或衬底的取向。
本文所述的电子封装和方法可以部分地利用包括大颗粒尺寸和高体积分数的填料来制备具有较高体热的复合物。虽然设计特别是高导热率的材料可能在技术上是可行的，但较高的导热率将伴随在使用有利于难得多的管芯附接过程的材料时消极的折衷而发生。作为示例，最大化填料体积分数并最大化平均颗粒尺寸有利于较高的导热率，但这增加了填料包封风险并且可能完全干扰接头形成。
本文所述的电子封装和方法可以使用两种密封剂材料来(ⅰ)将逻辑管芯接合到存储器管芯(和/或将存储器接合到存储器管芯和/或将逻辑管芯接合到逻辑管芯)；以及(ⅱ)耗散从底部逻辑管芯到顶部存储器的热量以实现在较高功率的堆叠式封装中的较高热耗散。使用双密封剂材料来提高堆叠式芯片中的热耗散可能适合于与各种不同的电子封装架构一起使用。
本文所述的电子封装和方法的基本原理在于使用两种材料(而不是一种)来制造芯片间接头并实现各种电子封装架构中的较大热耗散。作为示例，材料1可以形成接头并密封接头，并且材料2可以耗散从底部管芯到顶部管芯的热量。
本文所述的电子封装和方法中的双材料填料系统使接合要求与导热要求区分开，使得每个功能可以由双材料填料系统实现而不牺牲性能。接头形成可以由任何导热芯片间密封剂的填料加载来限制。本文所述的电子封装和方法可以通过使用非接头区域中的高填料加载(即，以促进导热率)和接头区域中的低填料加载(即，以促进堆叠式管芯之间的电连接的形成)来扩展较低成本和较低导热填料的使用。
高填料加载和较大的填料尺寸有利于较高的导热率，但可能引起填料包封并可能干扰芯片间隙塌陷。因此，单密封剂材料一般不能够平衡对高导热率的需要与接合过程所需的特性。本文所述的示例性电子封装和方法可以不混淆对芯片附接和高导热率的双重要求。
在一些形式中，本文所述的电子封装和方法可以扩展到外围阵列，其中一种材料密封外围阵列，而另一较高导热材料填充封装的内部。作为示例，两种不同的材料可以在附接过程之前和之后分配，包括(ⅰ)包含导热填料的NCP、CUF、MUF；(ⅱ)至少两个管芯，其中管芯之一包括穿硅过孔(TSV)；以及(ⅲ)具有凸起的局部化区域的堆叠的一层或更多层(例如少于30％的凸起区域)，其可以或可以不基于第一管芯(例如逻辑管芯)与第二管芯(例如存储器、图形等)之间的交叠区域来布线。
因此，填料的材料1的材料覆盖区域可以高达交叠区域的45％。另外，填料的材料2可以是包括导热填料以实现所需热耗散的高导热密封剂。
在一些形式中，导热填料拥有比熔融的二氧化硅的导热率更大的导热率。图1示出了一些一般导热填料10相对于熔融的二氧化硅的热特性。
应注意，用于材料1和材料2的导热填料的类型可以符合堆叠式电子封装的热要求。图2示出了Bruggeman等式的曲线20，并为具有0.23W/m*K的导热率的环氧树脂的相应填料传导率和树脂传导率提供所估计的复合导热率。
图2中的方框区域示出了窗21，其将适合于实现针对示例性堆叠式电子封装的15W的热耗散。由于材料2的制备不被接头形成的约束限制，所以高填料加载可以用于扩展较低成本和较低导热填料的使用。
在一些形式中，互连阵列可以由材料1密封。互连将耗散热量，并且因此较高导热材料是不需要的。材料1应该可以被定义为不同于材料2的任何芯片间材料，如由一个或更多个下面的特性表明的：填料类型、填料颗粒尺寸、填料颗粒尺寸分布和填料加载。另外，材料1和材料2可以包括相似或不相似的树脂结构，以便便于每种材料的处理。
图3示出了示例性电子封装30的顶视图。电子封装30包括第一管芯31和堆叠到第一管芯31上的第二管芯32。
第一密封剂33位于第一管芯31与第二管芯32之间。第一密封剂33包括覆盖第一管芯31与第二管芯32之间的第一体积的第一材料。
第二密封剂34位于第一管芯31与第二管芯32之间。第二密封剂34包括覆盖第一管芯31与第二管芯32之间的第二体积的第二材料。第一材料具有比第二材料高的导热率，并且与第一材料相比较，第二材料更有效地促进第一管芯31与第二管芯32之间的电连接。
在图3中所示的示例性形式中，第二密封剂34包围第一密封剂33。设想其它形式，其中第二密封剂34不包围第一密封剂33或只部分地包围第一密封剂33。
尽管未在图3中示出，第一密封剂33可以覆盖至少一个额外的体积(在图3中只示出一个体积)。第一密封剂33的附接体积的数量将部分地取决于电子封装30的总体配置(连同其它因素)。另外，第二密封剂34可以包围(ⅰ)第一密封剂33的每个额外体积；部分地包围第一密封剂33的每个额外体积中的一些(或全部)；和/或不包围第一密封剂33的每个额外体积中的一些(或全部)。
电子封装30中的第一填料33和第二填料34的类型将部分地取决于(ⅰ)将使用电子封装30的应用；(ⅱ)电子封装30的总体结构；和/或(ⅲ)在电子封装30中使用的第一填料33和第二填料34的相对数量。在一些形式中，形成第一填料33的第一材料与形成第二填料34的第二材料相比被更密集地充填。
形成第一填料33的第一材料和形成第二填料34的第二材料可以包括相同的树脂。设想其它形式，其中第一材料和第二材料包括不同的树脂或第一材料和第二材料中的至少一种(或两种都)包括多个树脂。包括在第一材料和第二材料中的树脂的类型将部分地取决于(ⅰ)将使用电子封装30的应用；电子封装30的总体结构；(ⅲ)第一填料33和第二填料34的相对数量；和/或(ⅳ)形成第一管芯31和第二管芯32的材料的类型。
在图3中所示的电子封装的示例性形式中，第一管芯31具有与第二管芯32不同的尺寸。设想其它形式，其中第一管芯31具有与第二管芯32相同的尺寸。
包括在电子封装30中的管芯的类型将部分地取决于将使用电子封装30的应用。作为示例，第一管芯31和/或第二管芯32可以是芯片、逻辑管芯、存储器管芯、衬底、集成电路、处理器控制中心和/或嵌入式设备连同其它类型的电子设备。
图4示出了就在第一管芯31和第二管芯32压缩在一起之前的示例性电子封装30的侧视图。图4示出了被施加到第一管芯31和/或第二管芯32的第一密封剂33和第二密封剂34的量可以不同，这取决于一旦第一管芯31和第二管芯32堆叠在一起就如何布置第一密封剂33和第二密封剂34的体积。被施加到第一管芯31和/或第二管芯32的第一密封剂33和第二密封剂34的量将部分地取决于第一密封剂33和第二密封剂34的相应体积中所需的导热率和电连接的位置和量。
图5示出了示例性电子封装30的示例性底视图，在示例性电子封装30中，第一管芯31被去除以暴露第二管芯32的下表面35。通过在去除第一管芯31的情况下可见的互连36A、36B来电连接第一管芯31和第二管芯32。
在本文所述的电子封装和方法的一些形式中，第二密封剂34包围互连36A、36B。应注意，设想电子封装30的其它示例性形式，其中第二密封剂34包围互连36A、36B中的一些(或没有一个)。
在本文所述的电子封装30和方法的一些示例性形式中，互连36A、36B可以用任何方式布置在第一管芯31和/或第二管芯32上。互连36A、36B布置在第一管芯31和/或第二管芯32上的方式将部分地取决于(ⅰ)电子封装30的应用；(ⅱ)包括在电子封装30中的芯片的类型；和/或(ⅲ)第一管芯31和第二管芯32的总体配置(除其它因素以外)。
作为示例，互连36A可以围绕第一管芯31和第二管芯32中的一个的外围37延伸(在图5中只示出第二管芯32)。在其它示例性形式中，互连36A可以围绕第一管芯31和第二管芯32中的一个的外围37的至少一部分延伸。
互连36B不围绕第一管芯31和第二管芯32中的一个的外围延伸。应注意，电子封装30可以包括不同类型的互连。作为示例，互连36A大于互连36B。另外，互连36A或36B可以以交错配置来布置，以便维持第一管芯31和/或第二管芯32上的宝贵空间。
图6示出了另一示例性电子封装60的顶视图，其中第二管芯被去除以暴露第一管芯61的上表面65。通过在去除第二管芯的情况下可见的互连66来电连接第一管芯61和第二管芯。
在电子封装60的一些形式中，第二密封剂34包围互连66(在图6中示出四个互连66)。应注意，设想电子封装60的其它示例性形式，其中第二密封剂34包围互连66中的一些(或没有一个)。在图6中所示的示例性电子封装60中，第一密封剂33的四个区域位于第二密封剂34的任一侧上。
图7示出了另一示例性电子封装70的顶视图。电子封装70包括第一管芯71和堆叠到第一管芯71上的第二管芯72。在图7中所示的示例性形式中，第一管芯71具有与第二管芯72相同的尺寸，虽然第一管芯71和第二管芯72可以具有不同的尺寸。
第一密封剂73位于第一管芯71与第二管芯72之间。第一密封剂73包括覆盖第一管芯71与第二管芯72之间的多个第一体积的第一材料。
第二密封剂74位于第一管芯71与第二管芯72之间。第二密封剂74包括覆盖第一管芯71与第二管芯72之间的第二体积的第二材料。第一材料具有比第二材料高的导热率，并且与第一材料相比较，第二材料更有效地促进第一管芯71与第二管芯72之间的电连接。
尽管未在图7中示出，但第二密封剂74可以覆盖至少一个额外的体积(在图7中只示出一个体积)。第一密封剂73的体积的数量将部分地取决于电子封装70的总体配置(除其它因素以外)。
如图7中所示，电子封装还可以包括位于第一管芯71与第二管芯72之间的第三密封剂75。第三密封剂75包括覆盖第一管芯71与第二管芯72之间的至少一个第三体积的第三材料(在图7中示出第三密封剂75的两个体积)。第三材料可以具有与第一材料和第二材料不同的导热率，和/或第三材料可以与第一材料和第二材料不同地促进第一和第二管芯之间的电连接。
形成第一填料73的第一材料、形成第二填料74的第二材料和形成第三填料75的第三材料都可以包括相同的树脂。设想其它形式，其中第一材料、第二材料和第三材料包括不同的树脂或第一材料、第二材料和第三材料中的至少一种(一些或全部)包括多个树脂。
图8是示出制造电子封装30(见图3)的示例性方法[800]的流程图。方法[800]包括[810]将由第一材料组成的第一密封剂33放置到第一管芯31上以及[820]将由第二材料组成的第二密封剂34放置到第一管芯31上。在一些形式中，[820]将第二密封剂34放置到第一管芯31上包括用第二密封剂34包围(有时仅仅部分地)第一密封剂33。
第一材料具有比第二材料高的导热率。另外，与第一材料相比较，第二材料更有效地促进第一管芯31与第二管芯32之间的电连接。
方法[800]还包括[830]将第二管芯32堆叠到第一管芯31上，使得第一密封剂33和第二密封剂34位于第一管芯31与第二管芯32之间。第二管芯32可以使用现在已知或将来发现的任何技术堆叠到第一管芯31上。
在方法[800]的一些形式中，[820]将第二密封剂34放置到第一管芯31上包括用第二密封剂34包围将第一管芯31电连接到第二管芯32的互连36A、36B。互连36A、36B由第二密封剂34包围的方式将部分地取决于成本、制造考虑因素和与制造电子封装30相关联的功能(除其它因素以外)。
另外，[820]将第二密封剂34放置到第一管芯31上可以包括将第二密封剂34围绕第一管芯31和第二管芯32中的一个的外围37的至少一部分放置。
图9是示出制造示例电子封装30的另一示例性方法[900]的流程图。方法[900]包括[910]将由第二材料组成的第二密封剂34放置到第一管芯31上以及[920]将第二管芯32堆叠到第一管芯31上，使得第二密封剂34位于第一管芯31与第二管芯32之间。第二管芯32可以使用现在已知或将来发现的任何技术堆叠到第一管芯31上。
方法[900]还包括[930]将由第一材料组成的第一底部填料插入在第一管芯与第二管芯之间。第一材料具有比第二材料高的导热率，并且与第一材料相比较，第二材料更有效地促进第一管芯31与第二管芯32之间的电连接。
在方法[900]的一些形式中，[930]将第一底部填料插入在第一管芯31与第二管芯32之间可以包括(ⅰ)用第一底部填料33包围(有时仅部分地)第二底部填料34；(ⅱ)用第一底部填料33包围将第一管芯31电连接到第二管芯32的互连36A、36B；和/或(ⅲ)将第一底部填料34围绕第一管芯31和第二管芯32中的一个的外围37的至少一部分放置。
第一底部填料33包围第二底部填料34并且互连36A、36B由第二底部填料34包围的方式将部分地取决于成本、制造考虑因素和与制造电子封装30相关联的功能(除其它因素以外)。在方法[800]、[900]中包括的第一管芯31和第二管芯32的类型、尺寸和配置将部分地取决于电子封装30的总期望配置和功能。
本文所述的电子封装和方法可以结合较高导热材料来实现较低导热填料的使用。这两种不同的填料的使用可以处理与用于堆叠管芯的附接过程有关的需要以及本文所述的电子封装的热管理要求。
为了更好地说明本文公开的方法和电子封装，此处提供了实施例的非限制性列表。
示例1包括电子封装。电子封装包括：衬底；附接到衬底的管芯；以及由于毛细作用(capillary action)而位于管芯与衬底之间的密封剂；以及包围管芯的支撑物。
示例2包括示例1的电子封装，其中管芯是接合到衬底的倒装芯片。
示例3包括示例1-2中的任一项的电子封装，其中密封剂将支撑物固定到衬底。
示例4包括示例1-3中的任一项的电子封装，其中密封剂将支撑物固定到管芯。
示例5包括示例1-4中的任一项的电子封装，其中支撑物具有实质上均匀的截面。
示例6包括示例1-5中的任一项的电子封装，其中支撑物具有内部底边缘和外部底边缘，对内部底边缘开槽以当支撑物围绕管芯安装时接纳密封剂。
示例7包括示例6的电子封装，其中支撑物具有内部上边缘和外部上边缘，内部上边缘包括用于当支撑物围绕管芯安装时接纳在管芯与支撑物之间向上流动的过量密封剂的沟道。
示例8包括示例1-7中的任一项的电子封装，其中支撑物的截面变化，使得截面在管芯上的相对较高应力的区域中较大并且在管芯上的相对较低应力的区域中较小。
示例9包括示例8的电子封装，其中支撑物具有内部下边缘和外部下边缘，支撑物包括通路和外表面，通路从支撑物的内部下边缘延伸到支撑物的外表面，使得当支撑物围绕管芯安装时密封剂从外表面穿过通路流到内部下边缘。
示例10包括示例9的电子封装，其中通路在支撑物的一侧上从支撑物的外表面延伸。
示例11包括一种方法，其包括将管芯附接到衬底；使用毛细作用将密封剂插入在管芯与衬底之间；以及将支撑物围绕管芯放置，使得支撑物包围管芯。
示例12包括示例11中的任一项的方法，其中将管芯附接到衬底包括使用倒装芯片接合将管芯附接到衬底。
示例13包括示例11-12中的任一项的方法，其中将支撑物围绕管芯放置，使得支撑物包围管芯包括：使用密封剂将支撑物附接到管芯。
示例14包括示例11-13中的任一项的方法，其中将支撑物围绕管芯放置，使得支撑物包围管芯包括：使用密封剂将支撑物附接到衬底。
示例15包括示例11-14中的任一项的方法，并且进一步包括固化密封剂。
示例16包括示例11-15中的任一项的方法，并且进一步包括通过支撑物中的开口区域去除密封剂。
示例17包括示例11-16中的任一项的方法，其中使用毛细作用将底部填料插入在管芯与衬底之间包括：通过支撑物中的从支撑物的外表面到支撑物的内部下边缘的通路插入底部填料。
示例18包括电子封装。电子封装包括管芯；模制到管芯的支撑物，其中支撑物包围管芯；衬底；以及由于支撑物与管芯和衬底之间的底部填料的毛细管作用而将管芯和支撑物附接到衬底的底部填料。
示例19包括示例18的电子封装，其中管芯是接合到衬底的倒装芯片。
示例20包括示例18-19中的任一项的电子封装，其中衬底包括多个再分布层，并且底部填料将管芯和支撑物附接到形成衬底的再分布层中的至少一个。
将在具体实施方式中部分地阐述当前电子设备、焊料成分和有关方法的这些和其它示例和特征。这个概述旨在提供当前主题的非限制性示例——并不旨在提供排他性或穷举性解释。具体实施方式被包括以提供关于系统和方法的另外的信息。
本公开内容中描述的使用电子封装方法的电子设备的示例被包括以显示针对本发明的更高级设备应用的示例。图10是并入本文所述的至少一个电子封装和/或方法的电子设备1000的方框图。电子设备1000仅仅是电子系统的一个示例，其中可以使用本发明的实施例。
电子设备1000的示例包括但不限于个人计算机、平板计算机、移动电话、游戏设备、MP3或其它数字音乐播放器等。在这个示例中，电子设备1000包括数据处理系统，数据处理系统包括系统总线1002以耦合系统的各种部件。系统总线1002提供在电子设备800的各种部件之间的通信链路，并且可以被实施为单个总线、总线的组合或以任何其它适合的方式实施。
电子封装1010耦合到系统总线1002。电子封装1010可以包括任何电路或电路的组合。在一个实施例中，电子封装1010包括处理器1012，处理器1012可以具有任何类型。如本文使用的，“处理器”意指任何类型的计算电路，例如但不限于：微处理器、微控制器、复杂指令集计算(CISC)微处理器、精简指令集计算(RISC)微处理器、超长指令字(VLIW)微处理器、图形处理器、数字信号处理器(DSP)、多核心处理器或任何其它类型的处理器或处理电路。
可以包括在电子封装1010中的其它类型的电路是定制电路、专用集成电路(ASIC)等，例如用于在无线设备(如移动电话、平板计算机、膝上型计算机、双向无线电装置和类似的电子系统)中使用的一个或多个电路(例如通信电路1014)。IC可以执行任何其它类型的功能。
电子设备1000还可以包括外部存储器820，其进而可以包括适合于特定应用的一个或多个存储器元件，例如采用随机存取存储器(RAM)的形式的主存储器1022、一个或多个硬盘驱动器1024和/或操纵可移动介质1026(例如光盘(CD)、闪存卡、数字视频盘(DVD)等)的一个或多个驱动器。
电子设备1000还可以包括显示设备1016、一个或多个扬声器1018和键盘和/或控制器1030，其可以包括鼠标、轨迹球、触摸屏、语音识别设备或允许系统用户将信息输入到电子设备1000中并从电子设备1000接收信息的任何其它设备。
这个概述旨在提供当前主题的非限制性示例——并不旨在提供排他性或穷举性解释。具体实施方式被包括以提供关于方法的另外的信息。
以上具体实施方式包括对形成具体实施方式的一部分的附图的引用。附图通过说明的方式显示可以实践本发明的特定实施例。这些实施例在本文中也被称为“示例”。这样的示例可以包括除了所示或所述的那些元件以外的元件。然而，当前的发明人还设想只提供所示或所述的那些元件的示例。而且，当前的发明人还针对特定的示例(或其一个或多个方面)或针对本文所示或所述的其它示例(或其一个或多个方面)设想使用所示或所述的那些元件(或其一个或多个方面)的任何组合或排列的示例。
在这个文档中，如在专利文档中常见的，使用术语“一”或“一个”以包括一个或多于一个，独立于“至少一个”或“一个或多个”的任何其它实例或使用。在这个文档中，除非另有指示，否则术语“或”用于指代非排他性的或，使得“A或B”包括“A但不是B”、“B但不是A”以及“A和B”。在这个文档中，术语“包括(including)”和“其中(in which)”用作相应的术语“包括(comprising)”和“其中(wherein)”的浅近英语等效形式。此外，在所附权利要求中，术语“包括(including)”和“包括(comprising)”是开放的，也就是说，在权利要求中包括除了在这样的术语之后列出的那些以外的元件的系统、设备、物品、组成、配制或过程仍然被认为落在那个权利要求的范围内。而且，在所附权利要求中，术语“第一”、“第二”、“第三”等仅用作标记，并且并不旨在将数字要求强加在它们的对象上。
以上描述旨在为说明性的而非限制性的。例如，上述示例(或其一个或多个方面)可以彼此组合地使用。其它实施例可以例如由本领域中的普通技术人员在审阅以上描述时使用。
提供摘要以符合37C.F.R.§1.72(b)，以允许读者快速确定技术公开的本质。其以将不用于解释或限制权利要求的范围或含义的理解来提交。
此外，在以上具体实施方式中，各种特征可以被分组在一起以精简本公开内容。这不应被解释为意欲未要求保护的所公开的特征对任何权利要求是必不可少的。更确切地，创造性主题可以在于特定的所公开的实施例的少于全部的特征。因此，所附权利要求由此并入具体实施方式，每个权利要求本身独立地作为单独的实施例，并且设想这样的实施例可以在各种组合或排列中相互组合。应参考所附权利要求确定本发明的范围连同这样的权利要求被给予权利的等效形式的范围。

Claims (24)

1.一种电子封装，包括：
第一管芯；
第二管芯，其堆叠到所述第一管芯上；
第一密封剂，其位于所述第一管芯与所述第二管芯之间，所述第一密封剂包括第一材料，所述第一密封剂占据所述第一管芯与所述第二管芯之间的多个分离的非连续体积；
第二密封剂，其位于所述第一管芯与所述第二管芯之间，所述第二密封剂包括第二材料，所述第二密封剂占据所述第一管芯与所述第二管芯之间的分离的非连续体积，其中，所述第一材料具有比所述第二材料高的导热率，并且所述第二材料具有比所述第一材料低的填料加载；以及
第三密封剂，其位于所述第一管芯与所述第二管芯之间，所述第三密封剂包括第三材料，所述第三密封剂占据所述第一管芯与所述第二管芯之间的至少一个分离的非连续体积，其中，所述第三材料具有与所述第一材料和所述第二材料不同的导热率。
2.根据权利要求1所述的电子封装，其中，所述第三材料具有与所述第一材料和所述第二材料不同的填料加载。
3.根据权利要求1所述的电子封装，其中，所述第一管芯和所述第二管芯通过互连而电气地连接。
4.根据权利要求3所述的电子封装，其中，所述第二密封剂包围所述互连。
5.根据权利要求3所述的电子封装，其中，所述互连围绕所述第一管芯和所述第二管芯中的一个的外围的至少一部分延伸。
6.根据权利要求1-5中的任一项所述的电子封装，其中，所述第一材料中的第一填料与所述第二材料中的第二填料相比被更密集地充填。
7.根据权利要求6所述的电子封装，其中，所述第一材料和所述第二材料包括相同的树脂。
8.根据权利要求1-5和7中的任一项所述的电子封装，其中，所述第二密封剂覆盖至少一个额外的体积。
9.根据权利要求1-5和7中的任一项所述的电子封装，其中，所述第一密封剂包围所述第二密封剂。
10.根据权利要求1-5和7中的任一项所述的电子封装，其中，所述第一管芯具有与所述第二管芯不同的尺寸。
11.根据权利要求1-5和7中的任一项所述的电子封装，其中，所述第三密封剂包围所述第二密封剂。
12.根据权利要求1-5和7中的任一项所述的电子封装，其中，所述第三材料与所述第一材料和所述第二材料中的至少一种材料包括相同的树脂。
13.一种用于形成电子封装的方法，包括：
将由第一材料组成的第一密封剂放置到第一管芯上，使得所述第一密封剂占据所述第一管芯与第二管芯之间的多个分离的非连续体积；
将由第二材料组成的第二密封剂放置到所述第一管芯上，使得所述第二密封剂占据所述第一管芯与所述第二管芯之间的分离的非连续体积，其中，所述第一材料具有比所述第二材料高的导热率，并且所述第二材料具有比所述第一材料低的填料加载；
将由第三材料组成的第三密封剂放置到所述第一管芯上，使得所述第三密封剂占据所述第一管芯与所述第二管芯之间的至少一个分离的非连续体积，其中，所述第三材料具有与所述第一材料和所述第二材料不同的导热率；以及
将第二管芯堆叠到所述第一管芯上，使得所述第一密封剂、所述第二密封剂和所述第三密封剂位于所述第一管芯与所述第二管芯之间。
14.根据权利要求13所述的方法，其中，所述第三材料具有与所述第一材料和所述第二材料不同的填料加载。
15.根据权利要求13所述的方法，其中，将第二密封剂放置到所述第一管芯上包括：利用所述第二密封剂包围将所述第一管芯电连接到所述第二管芯的互连。
16.根据权利要求13所述的方法，其中，将第二密封剂放置到所述第一管芯上包括：将所述第二密封剂围绕所述第一管芯和所述第二管芯中的一个的外围的至少一部分放置。
17.根据权利要求13所述的方法，其中，所述第一管芯和所述第二管芯通过互连而电气地连接。
18.根据权利要求13-17中的任一项所述的方法，其中，所述第一材料中的第一填料与所述第二材料中的第二填料相比被更密集地充填。
19.根据权利要求18所述的方法，其中，所述第一材料和所述第二材料包括相同的树脂。
20.根据权利要求13-17和19中的任一项所述的方法，其中，所述第二密封剂覆盖至少一个额外的体积。
21.根据权利要求13-17和19中的任一项所述的方法，其中，所述第一密封剂包围所述第二密封剂。
22.根据权利要求13-17和19中的任一项所述的方法，其中，所述第一管芯具有与所述第二管芯不同的尺寸。
23.根据权利要求13-17和19中的任一项所述的方法，其中，所述第三密封剂包围所述第二密封剂。
24.根据权利要求13-17和19中的任一项所述的方法，其中，所述第三材料与所述第一材料和所述第二材料中的至少一种材料包括相同的树脂。
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