CN107492528A - 具有石墨烯条带的柔性半导体装置 - Google Patents

具有石墨烯条带的柔性半导体装置 Download PDF

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Publication number
CN107492528A
CN107492528A CN201610412040.6A CN201610412040A CN107492528A CN 107492528 A CN107492528 A CN 107492528A CN 201610412040 A CN201610412040 A CN 201610412040A CN 107492528 A CN107492528 A CN 107492528A
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CN
China
Prior art keywords
band
semiconductor device
strip
semiconductor element
electrical contacts
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Pending
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CN201610412040.6A
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English (en)
Inventor
葛友
赖明光
王志杰
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NXP USA Inc
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NXP USA Inc
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Application filed by NXP USA Inc filed Critical NXP USA Inc
Priority to CN201610412040.6A priority Critical patent/CN107492528A/zh
Priority to US15/365,549 priority patent/US10692802B2/en
Publication of CN107492528A publication Critical patent/CN107492528A/zh
Priority to US16/874,196 priority patent/US11456188B2/en
Pending legal-status Critical Current

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Abstract

本发明涉及具有石墨烯条带的柔性半导体装置。一种柔性半导体装置包含其上形成有接合焊盘和导电迹线的第一条带。具有底表面的半导体管芯附接于第一条带并且借助于电接触部与接合焊盘电连接。第二条带附接于半导体管芯的顶表面。第一条带和第二条带包封着导电迹线的至少一部分、半导体管芯以及电接触部。

Description

具有石墨烯条带的柔性半导体装置
技术领域
本发明涉及半导体装置组件，并且更特别地涉及以石墨烯条带组装的柔性半导体装置。
背景技术
随着可穿戴装置市场的扩展，对低成本的柔性半导体封装的需求已变得越来越大。以像塑料或陶瓷那样的包封材料组装的常规的半导体封装刚性很高，导致柔性较低，因而对于可穿戴装置而言并不很理想。
因此，具有用于组装低成本的柔性装置的方法和材料是期望的。
附图说明
本发明连同其目的和优点一起可以结合附图通过参考下面对优选实施例的描述而得到最佳的理解，在附图中：
图1-5是根据本发明的实施例的各种柔性半导体装置的截面侧视图；
图6是根据本发明的实施例的图5的半导体装置的第二条带的俯视平面图；
图7是根据本发明的实施例的图1-5的半导体装置的石墨烯条带的俯视平面图；
图8-10是根据本发明的实施例的柔性半导体装置的俯视平面图；
图11-16是示出根据本发明的实施例的柔性半导体装置的组装步骤的一系列示图；以及
图17-19是示出根据本发明的另一个实施例的柔性半导体装置的组装步骤的一系列示图。
具体实施方式
下文中结合附图所做出的详细描述意在作为对本发明的目前优选的实施例的描述，而并非意在代表本发明可以实施的唯一形式。应当理解，同样的或等效的功能可以由意在包含于本发明的精神和范围之中的不同实施例实现。在附图中，相同的附图标记被用来指示所有附图中的相同要素。而且，术语“包含”、“包括”或者其任何其他变型意在涵盖非排他性的包含，使得包含一系列要素或步骤的模块、电路、装置构件、结构及方法步骤并不只是包含那些要素，而是可以包含没有明确列出的或者此类模块、电路、装置构件或步骤所固有的其他要素或步骤。在没有更多约束的情况下，由“包含…”限定的要素或步骤并不排除包含该要素或步骤的另外的等同要素或步骤的存在。
在一个实施例中，本发明提供了包含其上形成有多个接合焊盘和多个导电迹线的第一条带的半导体装置，其中该多个接合焊盘形成于第一条带的第一中心区域中，并且该多个导电迹线形成于第一中心区域中并且从该多个接合焊盘延伸到包围着第一中心区域的第一外围区域。该半导体装置还包含附接于第一条带且借助于多个电接触部与该多个接合焊盘电连接的第一半导体管芯以及第二条带，所述第二条带具有附接于第一半导体管芯的第二中心区域以及附接于第一条带的第一外围区域且包围着第二中心区域的第二外围区域，其中第一条带和第二条带包封着所述多个导电迹线的至少一部分、第一半导体管芯以及所述多个电接触部。
在另一个实施例中，本发明提供了一种用于组装半导体装置的方法。该方法包括提供其上形成有多个接合焊盘和多个导电迹线的第一条带，其中该多个接合焊盘形成于第一条带的第一中心区域中，并且该多个导电迹线形成于第一中心区域中并且从该多个接合焊盘延伸到包围着第一中心区域的第一外围区域。该方法还包括将至少第一半导体管芯附接于第一条带并借助于多个电接触部与该多个接合焊盘电连接，并且将第二条带的第二中心区域附接于第一半导体管芯以及将包围着第二中心区域的第二外围区域附接于第一条带的第一外围区域，其中第一条带和第二条带包封所述多个导电迹线的至少一部分、第一半导体管芯以及所述多个电接触部。
现在参照图1，该图中示出了根据本发明的第一实施例的半导体装置100的截面侧视图。半导体装置100包含其上形成有多个接合焊盘104和多个导电迹线106的第一条带102。多个接合焊盘104形成于第一条带102的第一中心区域108中，并且多个导电迹线106形成于第一中心区域108中并且从多个接合焊盘104延伸到包围着第一中心区域108的第一外围区域110。在优选实施例中，多个导电迹线106和多个接合焊盘104包含石墨烯。
半导体装置100还包含具有附接于第一条带102且借助于多个电接触部114与多个接合焊盘104电连接的底表面的第一半导体管芯112以及第二条带116，第二条带116具有附接于第一半导体管芯112的顶表面的第二中心区域118以及附接于第一条带102的第一外围区域110且包围着第二中心区域118的第二外围区域120。多个电接触部114是通过受控塌陷芯片连接(controlled collapse chip connection)(C4)工艺附接于第一半导体管芯112的底表面的焊球或焊料凸块。第一条带102和第二条带116包封着多个导电迹线106的至少一部分、第一半导体管芯112以及多个电接触部114。在优选实施例中，真空被施加于第一条带102和第二条带116之间以使第一条带102和第二条带116贴合在一起。多个电接触部114通过气压附接于多个接合焊盘104。在优选实施例中，第一外围区域110和第二外围区域120通过布置于其间的粘性材料而相互附接。在另一个优选的实施例中，第一外围区域110和第二外围区域120被加热并彼此附接。在优选实施例中，多个导电迹线106中的至少一个具有从第二条带120露出的部分122，使得多个导电迹线106中的至少一个的露出部分122充当半导体装置100的输入和输出端子。
图2示出了根据本发明的第二实施例半导体装置200的截面侧视图。第二实施例类似于上文所描述的第一实施例，除了半导体装置200还包含布置于第一半导体管芯112与第二条带116之间的保护第一半导体管芯112使其不被弯曲的金属板202，以及布置于第一条带102和第一半导体管芯112之间的将多个电接触部114锁定在适当位置以防止在多个电接触部114和多个接合焊盘104之间发生移位的水平非导电层204。在优选实施例中，水平非导电层204具有范围在10μm-50μm的厚度。水平非导电层204优选地包含粘性材料，诸如各向异性导电膜或B阶段环氧树脂。在优选实施例中，水平非导电层204包含与多个接合焊盘104对应的多个开口206，其中多个电接触部114通过该多个开口206与多个接合焊盘104物理连接且电连接。
图3示出了根据本发明的第三实施例的半导体装置300的截面侧视图。第三实施例类似于上文所描述的第二实施例，除了水平非导电层204由于施加于第一条带102和第二条带116之间的真空而至少部分地接触第一半导体管芯112的底表面。在另一个优选的实施例中，水平非导电层204填充第一半导体管芯112和第一条带102之间的间隙。
图4示出了根据本发明的第四实施例的半导体装置400的截面侧视图。第四实施例类似于上文所描述的第三实施例，除了水平非导电层204包含通过在垂直方向上的气压而仅在垂直方向上导电的各向异性导电膜。在优选实施例中，水平非导电层204被布置于第一条带102与多个电接触部114之间，并且将多个接合焊盘104电连接至多个电接触部114。在优选实施例中，多个电接触部114被气压至少部分地挤压到水平非导电层204中，使得水平非导电层204将该多个电接触部114锁定在适当位置以防止在多个电接触部114与多个接合焊盘104之间发生移位。
图5示出了根据本发明的第五实施例的半导体装置500的截面侧视图。第五实施例类似于上文所描述的第三实施例，除了金属板202被嵌入第二条带116的第二中心区域118内并且从第二条带116露出以实现更好的散热。图6是根据本发明的第五实施例的图5的第二条带116和金属板202的俯视平面图，该图显示金属板202被嵌入第二条带116的第二中心区域118内并且从第二条带116露出。
图7是根据本发明的实施例的图1-5的第一条带102的俯视平面图。第一条带102包含形成于其上的多个接合焊盘104和多个导电迹线106。多个接合焊盘104形成于第一条带102的第一中心区域108中，并且多个导电迹线106形成于第一中心区域108中且从多个接合焊盘104延伸到包围着第一中心区域108的第一外围区域110。在优选实施例中，多个导电迹线106是石墨烯迹线。
图8是根据本发明的实施例的半导体装置100的俯视平面图。如图8所示，半导体装置100具有矩形轮廓。图9是根据本发明的另一个实施例的半导体装置100的俯视平面图。如图9所示，半导体装置100具有圆形轮廓。
图10是根据本发明的又一个实施例的半导体装置600的俯视平面图。图10所示的实施例类似于以上所描述的图8所示的实施例，除了存在着附接于第一条带102的且与形成于第一条带102上的导电迹线106电连接的多个半导体管芯602-606。在优选实施例中，该多个半导体管芯602-606包括功能管芯(诸如，微控制器单元)、传感器管芯、射频(RF)管芯等。导电迹线106优选地仅被设置为与多个半导体管芯602-606电连接，并且在半导体装置600是自备式(self-contained)系统的条件下导电迹线106完全被第一条带102和第二条带116包封。在优选实施例中，半导体装置600包含形成于第一条带102上的至少一个无源装置608。在另一个优选的实施例中，半导体装置600还包含至少一个线圈610，其中线圈610优选地由石墨烯迹线形成。在优选实施例中，多个半导体管芯602-606、至少一个无源装置608和线圈610借助于多个导电迹线106相互电连接，以作为在半导体装置600中的一个系统一起来操作。
图11–16是示出根据本发明的实施例的以其上形成有多个接合焊盘104和多个导电迹线106的第一条带102来组装或封装半导体装置的步骤的一系列示图。多个接合焊盘104形成于第一条带102的第一中心区域108中，并且多个导电迹线106形成于第一中心区域108中且从多个接合焊盘104延伸到包围着第一中心区域108的第一外围区域110。
从图11开始，提供了第一条带102的阵列700。在优选实施例中，每个第一条带102上均形成有多个接合焊盘104和多个导电迹线106。在优选实施例中，第一条带102的阵列700被设置于单片条带中。在优选实施例中，多个导电迹线106和多个接合焊盘104包含石墨烯。
在图12所示的下一步骤中，水平非导电层204被布置于每个第一条带102的第一中心区域108之上。在优选实施例中，水平非导电层204包含在压力沿垂直方向施加时于垂直方向上导电的各向异性导电膜。在优选实施例中，水平非导电层204具有范围在10μm-50μm的厚度。
在图13所示的下一步骤中，第一半导体管芯112被安装于每个第一条带102的第一中心区域108之上，并且借助于多个电接触部114以及水平非导电层204与多个接合焊盘104电连接，水平非导电层204仅在垂直方向上导电以将多个接合焊盘104电连接至多个电接触部114。在优选实施例中，金属板202被进一步附接于第一半导体管芯112的顶表面上以保护第一半导体管芯112不被弯曲。
在图14A和14B所示的下一步骤中，设置第二条带116的阵列800。在优选实施例中，第二条带116的阵列800被设置为单片条带。每个第二条带116包含第二中心区域118以及包围着第二中心区域118的第二外围区域120。在优选实施例中，每个第二条带116还包含将被剥离的预半切(pre-half-cut)部分802，如图14A中的虚线所示。在优选实施例中，预半切部分802位于第二条带116的至少一侧上。在另一个优选的实施例中，如图14B所示，预半切部分802沿着第二条带116的外围边缘形成于环形内。
在图15A所示的下一步骤中，第二条带116被附接于相应的第一半导体管芯112之上。在优选实施例中，每个第二条带116均附接于附接在第一半导体管芯112的顶表面上的相应的金属板202。图15B是图15A在直线A-A处的截面侧视图，该图显示每个第二条带116的第二中心区域118附接于相应的第一半导体管芯112之上，并且每个第二条带的第二外围区域120均附接于每个第一条带102的第一外围区域110。在优选实施例中，金属板202被布置于第一半导体管芯112与第二条带116之间。在另一个优选的实施例中，金属板202被嵌入第二条带116的第二中心区域118内并且从第二条带116露出以实现更好的散热。
在图16A所示的下一步骤中，真空被施加于第一条带102和第二条带116之间以将第一条带和第二条带贴合在一起，使得第一条带102和第二条带116包封多个导电迹线106的至少一部分、第一半导体管芯112、金属板202以及多个电接触部114。在优选实施例中，多个电接触部114被气压至少部分地挤压到水平非导电层204中，使得水平非导电层204将该多个电接触部114锁定在适当位置以防止在多个电接触部114与多个接合焊盘104之间发生移位。在优选实施例中，第一外围区域110和第二外围区域120通过布置于其间的粘性材料而相互附接。在另一个优选的实施例中，第一外围区域110和第二外围区域120被加热并彼此附接。多个半导体装置200的阵列900在所述包封之后形成。然后沿着切割线902执行切割，以单切阵列中的半导体装置200使其彼此分离。图16B是图16A在直线B-B处的截面侧视图，该图显示，真空被施加于第一条带102和第二条带116之间以将第一条带和第二条带贴合在一起，使得第一条带102和第二条带116包封多个导电迹线106的至少一部分、第一半导体管芯112、金属板202以及多个电接触部114。在优选实施例中，水平非导电层204被固化以将多个电接触部114锁定在适当位置，使得水平非导电层204防止在多个电接触部114与多个接合焊盘104之间发生移位。半导体装置200然后通过沿着切割线902进行切割而从阵列中被单切。第二条带116的预半切部分802被剥离以使导电迹线106的至少一部分露出，从而允许该露出部分充当如图4所示的半导体装置400的输入和输出端子。在优选实施例中，所述剥离在所述单切之前执行。
图17-19是示出根据本发明的另一个实施例的以其上形成有多个接合焊盘104和多个导电迹线106的第一条带102组装或封装半导体装置的步骤的一系列示图。多个接合焊盘104形成于第一条带102的第一中心区域108中，并且多个导电迹线106形成于第一中心区域108中并且从多个接合焊盘104延伸到包围着第一中心区域108的第一外围区域110。
如图17所示，在优选实施例中，水平非导电层204设置有多个开口206。图18示出了附接于第一条带102的水平非导电层204的截面侧视图。该多个开口206对应于多个接合焊盘104，使得该多个接合焊盘104中的每一个均从相应的开口206露出。在优选实施例中，水平非导电层204包含粘性材料，诸如通过丝网印刷工艺布置于第一条带102上的B阶段环氧树脂。B阶段环氧树脂包括环氧树脂、聚酰亚胺、双马来酰亚胺三嗪(BismaleimideTriazine)等。
在图19所示的下一步骤中，第一半导体管芯112被安装于第一条带102且借助于多个电接触部114与多个接合焊盘104电连接，其中多个电接触部114通过在水平非导电层204中的多个开口206与多个接合焊盘104物理连接且电连接。如上文所讨论的，导电迹线106的至少一部分、第一半导体管芯112以及多个电接触部114然后通过在它们之间施加真空被第一条带102和第二条带116包封。
对本发明的优选实施例的描述已经为了图示和描述的目的而给出，但并非意在是穷尽性的或者将本发明限制于所公开的形式。本领域技术人员应当理解，在不脱离本发明的广泛的发明构思的情况下能够对以上所描述的实施例进行改变。因此，应当理解，本发明并不限制于所公开的特定实施例，而是涵盖在所附权利要求书所限定的本发明的精神和范围之内的修改。

Claims (10)

1.一种柔性半导体装置，包含：
第一条带，其上形成有多个接合焊盘和多个导电迹线，其中所述多个接合焊盘形成于所述第一条带的第一中心区域中，并且所述多个导电迹线形成于所述第一中心区域中、与所述接合焊盘中相应的接合焊盘电接触且从所述接合焊盘延伸到包围着所述第一中心区域的第一外围区域；
第一半导体管芯，其附接于所述第一条带且借助于多个管芯电接触部与所述多个接合焊盘电连接；以及
第二条带，其具有附接于所述第一半导体管芯的第二中心区域以及包围着所述第二中心区域的第二外围区域，其中所述第二外围区域附接于所述第一条带的所述第一外围区域，使得所述第一条带和第二条带包封着所述多个导电迹线的至少一部分、所述第一半导体管芯以及所述多个管芯电接触部。
2.根据权利要求1所述的半导体装置，还包含被布置在所述第一半导体管芯与所述第二条带之间的金属板，其中所述金属板保护所述管芯使其不被弯曲。
3.根据权利要求1所述的半导体装置，还包含嵌入所述第二条带的所述第二中心区域中且附接于所述第一半导体管芯的顶表面的金属板。
4.根据权利要求1所述的半导体装置，还包含：
水平非导电层，其被布置在所述第一条带与所述第一半导体管芯之间，所述水平非导电层将所述多个电接触部锁定在适当位置。
5.根据权利要求4所述的半导体装置，其中所述水平非导电层包含仅在垂直方向上导电的各向异性导电层。
6.根据权利要求5所述的半导体装置，其中所述水平非导电层被布置在所述第一条带与所述多个管芯电接触部之间并且将所述多个接合焊盘电连接至所述多个管芯电接触部。
7.根据权利要求4所述的半导体装置，其中所述水平非导电层包含与所述多个接合焊盘对应的多个开口，其中所述多个管芯电接触部通过所述多个开口与所述多个接合焊盘机械连接且电连接。
8.根据权利要求1所述的半导体装置，其中所述多个导电迹线中的至少一个具有从所述第二条带露出的部分，其中所述多个导电迹线中的至少一个的露出部分充当所述半导体装置的输入和输出端子。
9.根据权利要求1所述的半导体装置，其中所述第一条带和第二条带通过真空被贴合在一起。
10.根据权利要求1所述的半导体装置，还包含附接于所述第一条带的且借助于所述多个接合焊盘和所述多个导电迹线与所述第一半导体管芯电连接的第二半导体管芯。
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