CN107431065A - 堆叠式封装配置及其制造方法 - Google Patents
堆叠式封装配置及其制造方法 Download PDFInfo
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- CN107431065A CN107431065A CN201680018920.3A CN201680018920A CN107431065A CN 107431065 A CN107431065 A CN 107431065A CN 201680018920 A CN201680018920 A CN 201680018920A CN 107431065 A CN107431065 A CN 107431065A
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- tube core
- plane
- interconnection
- die
- substrate
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Abstract
本公开的一些示例可包括一种层叠封装集成封装配置,包括:位于基板上方在第一平面中的第一管芯;位于第一管芯上方在第二平面中的第二管芯,该第二管芯所具有的一部分延伸超过该第一管芯;位于第一管芯上方在第二平面中的第三管芯,该第三管芯所具有的一部分延伸超过该第一管芯;位于第二管芯和第三管芯上方在第三平面中的第四管芯,该第四管芯所具有的一部分延伸超过该第二管芯和第三管芯;以及位于第二管芯和第三管芯上方在第三平面中的第五管芯,该第五管芯所具有的一部分延伸超过该第二管芯和第三管芯。
Description
根据35 U.S.C.§119的优先权要求
本专利申请要求于2015年3月31提交的题为“STACKED SEMICONDUCTORCONFIGURATIONS AND METHODS OF MAKING THE SAME(堆叠式封装配置及其制造方法)”的临时申请No.62/141,139的优先权,该临时申请被转让给本专利申请受让人并由此通过援引明确纳入于此。
公开领域
本公开一般涉及集成封装,并且更为具体但不排他地,涉及高密度层叠封装(PoP)集成封装配置。
背景
存储器管芯用于各种各样的集成封装(例如,半导体)应用中。这些集成封装应用可包括高输入/输出(I/O)计数(1000+个IO连接)而不是正常IO计数(100个IO连接)。然而,高IO计数一般包括用于IO连接以及存储器管芯与集成封装中的其他组件(包括其他存储器管芯)之间的广泛互连的大面积。为了在特定目标容量(诸如4GB,使用四个1GB存储器管芯)的集成封装中实现高IO计数存储器管芯(类似宽IO或高带宽存储器(HBM))以及所包括的互连,穿基板通孔(TSV)被认为是可行的选项,因为常规的PoP或并排集成封装由于可用于IO连接和互连的有限空间而对IO计数的数目具有限制。但是在集成封装中实现TSV是昂贵的工艺并且与当前的商业模型不兼容。由此,目标容量高IO存储器将受益于在不使用TSV的情况下在集成封装中的实现。
相应地,存在对由此提供的系统、装置和方法的需求。
概述
以下给出了与本文所公开的各装置和方法相关联的一个或多个方面和/或示例相关的简化概述。如此,以下概述既不应被视为与所有构想的方面和/或示例相关的详尽纵览,以下概述也不应被认为标识与所有构想的方面和/或示例相关的关键性或决定性要素或描绘与任何特定方面和/或示例相关联的范围。相应地,以下概述仅具有在以下给出的详细描述之前以简化形式呈现与关于本文所公开的装置和方法的一个或多个方面和/或示例相关的某些概念的目的。
在一个方面,一种层叠封装可包括:位于第一平面中的第一管芯;位于第二平面中的第二管芯,所述第二管芯所具有的第一部分延伸超过所述第一管芯的第一边缘,所述第二平面位于所述第一平面上方;位于所述第二平面中的第三管芯,所述第三管芯所具有的第二部分延伸超过所述第一管芯的第二边缘;位于第三平面中的第四管芯,所述第四管芯所具有的第三部分延伸超过所述第二管芯的第一边缘、所述第三管芯的第一边缘、以及所述第一管芯的第三边缘,所述第三平面位于所述第二平面上方;位于所述第三平面中的第五管芯,所述第五管芯所具有的第四部分延伸超过所述第二管芯的第二边缘、所述第三管芯的第二边缘、以及所述第一管芯的第四边缘;第一多个互连,其被配置成将所述第二管芯的第一部分耦合到所述第一管芯;第二多个互连,其被配置成将所述第三管芯的第二部分耦合到所述第一管芯;第三多个互连,其被配置成将所述第四管芯的第三部分耦合到所述第一管芯;以及第四多个互连,其被配置成将所述第五管芯的第四部分耦合到所述第一管芯。
在另一方面,一种层叠封装可包括:位于第一平面中的第一管芯;位于第二平面中的第二管芯,所述第二管芯所具有的第一部分延伸超过所述第一管芯的第一边缘,所述第二平面位于所述第一平面上方;位于所述第二平面中的第三管芯,所述第三管芯所具有的第二部分延伸超过所述第一管芯的第二边缘;位于第三平面中的第四管芯,所述第四管芯所具有的第三部分延伸超过所述第二管芯的第一边缘、所述第三管芯的第一边缘、以及所述第一管芯的第三边缘,所述第三平面位于所述第二平面上方;位于所述第三平面中的第五管芯,所述第五管芯所具有的第四部分延伸超过所述第二管芯的第二边缘、所述第三管芯的第二边缘、以及所述第一管芯的第四边缘;用于将所述第二管芯的第一部分耦合到所述第一管芯的第一互连装置;用于将所述第三管芯的第二部分耦合到所述第一管芯的第二互连装置;用于将所述第四管芯的第三部分耦合到所述第一管芯的第三互连装置;以及用于将所述第五管芯的第四部分耦合到所述第一管芯的第四互连装置。
在又一方面,一种用于制造层叠封装的方法可包括:形成基板,所述基板具有沿所述基板的前侧周界的第一多个焊盘、沿所述基板的后侧周界的第二多个焊盘、沿所述基板的第三侧周界的第三多个焊盘、以及沿所述基板的第四侧周界的第四多个焊盘;在所述基板的第一侧上安装第一管芯;在所述第一多个焊盘上放置第一多个第二平面互连;在所述第二多个焊盘上放置第二多个第二平面互连;在所述第一管芯上方在第二平面中安装第二管芯,所述第二管芯所具有的一部分延伸超过所述第一管芯的周界并连接到所述第一多个第二平面互连;在所述第一管芯上方在所述第二平面中邻近所述第二管芯安装第三管芯,所述第三管芯所具有的一部分延伸超过所述第一管芯的周界并连接到所述第二多个第二平面互连;在所述第四多个焊盘中放置第一多个第三平面互连的第一部分并在所述第三多个焊盘中放置第二多个第三平面互连的第一部分;在所述第一多个第三平面互连的第一部分上放置所述第一多个第三平面互连的第二部分,并在所述第二多个第三平面互连的第一部分上放置所述第二多个第三互连的第二部分;在所述第二管芯的第一侧和所述第三管芯的第一侧上在第三平面中安装第四管芯,所述第四管芯所具有的一部分延伸超过所述第二管芯的周界和所述第三管芯的周界;以及在所述第二管芯的第一侧和所述第三管芯的第一侧上在所述第三平面中邻近所述第四管芯安装第五管芯,所述第五管芯所具有的一部分延伸超过所述第二管芯的周界和所述第三管芯的周界。
基于附图和详细描述,与本文公开的各装置和方法相关联的其它特征和优点对本领域技术人员而言将是明了的。
附图简述
对本公开的各方面及其许多伴随优点的更完整领会将因其在参考结合附图考虑的以下详细描述时变得更好理解而易于获得,附图仅出于解说目的被给出而不对本公开构成任何限定,并且其中:
图1解说了根据本公开的一些示例的具有单个模塑层的示例性PoP集成封装配置。
图2解说了根据本公开的一些示例的具有两个模塑层的示例性PoP集成封装配置。
图3解说了根据本公开的一些示例的示例性PoP集成封装配置的俯视图。
图4解说了根据本公开的一些示例的用于PoP集成封装配置的示例性顶部封装。
图5解说了根据本公开的一些示例的具有线焊的示例性PoP集成封装配置。
图6解说了根据本公开的一些示例的具有线焊的示例性PoP集成封装配置的俯视图。
图7A-G解说了根据本公开的一些示例的用于具有两个模塑层的PoP集成封装配置的示例性部分工艺流程。
图8A-E解说了根据本公开的一些示例的用于具有单个模塑层的PoP集成封装配置的示例性部分工艺流程。
图9解说了根据本公开的一些示例的用于制造PoP集成封装配置的部分工艺流程的示例性框图。
图10解说了根据本公开的一些示例的示例性集成设备。
根据惯例,附图所描绘的特征可能并非按比例绘制。相应地,为了清晰起见,所描绘的特征的尺寸可能被任意放大或缩小。根据惯例,为了清晰起见,某些附图被简化。由此,附图可能未绘制特定装置或方法的所有组件。此外,类似附图标记贯穿说明书和附图标示类似特征。
详细描述
本文中公开的示例性方法、装置和系统有利地解决了长期以来的行业需求,以及其它先前未标识出的需求,并且缓解了常规方法、装置和系统的不足。例如,本文所描述的一些示例解说了具有多个顶部平面的PoP集成封装配置,在每个顶部平面中具有多个管芯而没有使用TSV来进行管芯互连。
图1解说了根据本公开的一些示例的具有单个模塑层的示例性PoP集成封装配置。如图1中所示,PoP集成封装配置100可包括:基板110,该基板110在其第二侧上具有第一多个焊球120以用于外部连接;位于基板110的第一侧上方在第一平面中的第一管芯130(例如,逻辑管芯);位于第一管芯130上方在第二平面中的第二管芯140(例如,存储器管芯),该第二管芯140所具有的一部分延伸超过第一管芯130的周界并且具有第一多个第二平面互连145(例如,焊球、焊盘、迹线、通孔、柱、电导体等等)以用于连接到基板110和第一管芯130;位于第一管芯130上方、在第二平面中毗邻于第二管芯140的第三管芯150(例如,存储器管芯,图1中未示出),该第三管芯150所具有的一部分延伸超过第一管芯130的周界并且具有第二多个第二平面互连155(未示出)以用于连接到基板110和第一管芯130;位于第二管芯140和第三管芯150上方在第三平面中的第四管芯160(例如,存储器管芯),该第四管芯160所具有的一部分延伸超过第二管芯140和第三管芯150的周界并且具有第一多个第三平面互连165以用于连接到基板110和第一管芯130;位于第二管芯140和第三管芯150上方、在第三平面中毗邻于第四管芯160的第五管芯170(例如,存储器管芯),该第五管芯170所具有的一部分延伸超过第二管芯140和第三管芯150的周界并且具有第二多个第三平面互连175以用于连接到基板110和第一管芯130;以及第一模塑层180,该第一模塑层180对PoP集成封装配置100在基板110的第一侧上的部分进行封装。
基板110可以是基板(例如,硅、其它晶体无机固体)、中介体、层压基板、或者高密度扇出基板。第一多个焊球120可以是焊球(诸如球栅阵列)、或者用于PoP集成封装配置100的外部连接的其他适当材料。第一多个第二平面互连145、第二多个第二平面互连155、第一多个第三平面互连165、以及第二多个第三平面互连175可以是焊球、焊盘、迹线、通孔、柱、电导体、或者用于将管芯140、150、160和170连接到基板110和第一管芯130的其他适当材料。虽然该配置示出了存储器管芯140、150、160和170,但这些管芯可以是其他逻辑管芯或者包括至基板110的互连的集成电路组件。虽然该配置将第一多个第三平面互连165和第二多个第三平面互连175示出为两个分开的互连列,但应当理解,该配置可具有单个列或者两个以上的列。如所示出的,PoP集成封装配置100包括在第二和第三平面中的多个管芯,这些管芯延伸超过下方平面中的管芯。
图2解说了纳入图1中配置的所有细节的示例性PoP集成封装配置,不同之处在于具有两个模塑层而不是一个模塑层。如图2中所示,PoP集成封装配置200可包括:基板210;位于基板210上方在第一平面中的第一管芯230;位于第一管芯230上方在第二平面中的第二管芯240;位于第一管芯230上方、在第二平面中邻近第二管芯240的第三管芯250(图2中未示出);位于第二管芯240和第三管芯250上方在第三平面中的第四管芯260;位于第二管芯240和第三管芯250上方、在第三平面中邻近第四管芯260的第五管芯270;对第一管芯230进行封装的第一模塑层280、以及在第一模塑层280上的对第二管芯240、第三管芯250、第四管芯260和第五管芯270进行封装的第二模塑层290。替换地并且如下面图7D中所示,第一模塑层280可至少部分地封装第一管芯230、第二管芯240和第三管芯250。
图3解说了根据本公开的一些示例的示例性PoP集成封装配置的俯视图。如图3中所示,PoP集成封装配置300可包括:基板310;位于基板310的第一侧上方在第一平面中、并且位于基板310的周界内中央的第一管芯330;位于第一管芯330的第一侧上方在第二平面中的第二管芯340,该第二管芯340所具有的一部分延伸超过第一管芯330的周界但是在基板310的周界内;位于第一管芯330的第一侧上方、在第二平面中邻近第二管芯340的第三管芯350,该第三管芯350所具有的一部分延伸超过第一管芯330的周界但是在基板310的周界内;位于第二管芯340和第三管芯350的第一侧上方在第三平面中的第四管芯360,该第四管芯360所具有的一部分延伸超过第二管芯340和第三管芯350的周界但是在基板310的周界内;以及位于第二管芯340和第三管芯350上方、在第三平面中邻近第四管芯360的第五管芯370,该第五管芯370所具有的一部分延伸超过第二管芯340和第三管芯350的周界但是在基板310的周界内。
图4解说了根据本公开的一些示例的用于PoP集成封装配置的示例性顶部封装。如图4中所示,用于PoP集成封装配置的预先形成的顶部封装400可包括:在第二平面中的第二管芯440,该第二管芯440具有第一多个第二平面互连445以用于最终连接到基板(未示出);在第二平面中邻近第二管芯440的第三管芯450(图4中未示出),该第三管芯450具有第二多个第二平面互连455(未示出)以用于连接到基板(未示出);位于第二管芯440和第三管芯450的第一侧上方在第三平面中的第四管芯460,该第四管芯460所具有的一部分延伸超过第二管芯440和第三管芯450的周界并且具有第一多个第三平面互连465以用于连接到基板(未示出);位于第二管芯440和第三管芯450上方、在第三平面中邻近第四管芯460的第五管芯470,该第五管芯470所具有的一部分延伸超过第二管芯440和第三管芯450的周界并且具有第二多个第三平面互连475以用于连接到基板(未示出);以及对第二管芯440、第三管芯450、第四管芯460和第五管芯470进行封装的第一模塑层480。通过在附连到底部封装之前预先形成顶部封装400,顶部封装400可以更易于构造并且降低在形成底部封装期间形成顶部封装的成本。
图5解说了根据本公开的一些示例的具有线焊的示例性PoP集成封装配置。如图5中所示,PoP集成封装配置500可包括:基板510,该基板510在其第二侧上具有第一多个焊球520以用于外部连接;位于基板510的第一侧上方在第一平面中的第一管芯530;位于第一管芯530的第一侧上方在第二平面中的第二管芯540,该第二管芯540所具有的一部分延伸超过第一管芯530的周界并且具有第一多个第二平面互连545以用于连接到基板510;位于第一管芯530的第一侧上方、在第二平面中邻近第二管芯540的第三管芯550(图5中未示出),该第三管芯550所具有的一部分延伸超过第一管芯530的周界并且具有第二多个第二平面互连555(未示出)以用于连接到基板510;位于第二管芯540和第三管芯550的第一侧上方在第三平面中的第四管芯560,该第四管芯560所具有的一部分延伸超过第二管芯540和第三管芯550的周界并且具有第一多个第三平面线焊互连565以用于连接到基板510;位于第二管芯540和第三管芯550上方、在第三平面中邻近第四管芯560的第五管芯570,该第五管芯570所具有的一部分延伸超过第二管芯540和第三管芯550的周界并且具有第二多个第三平面线焊互连575以用于连接到基板510;以及对PoP集成封装配置500在基板510的第一侧上的部分进行封装的第一模塑层580。
基板510可以是硅基板、中介体、层压基板、或者高密度扇出基板。第一多个焊球520可以是焊球(诸如球栅阵列)、或者用于PoP集成封装配置500的外部连接的其他适当材料。第一多个第二平面互连545、第二多个第二平面互连555可以是焊球、预先形成的铜柱、经铜镀敷的列、或者用于将管芯540和550连接到基板510的其他适当材料。第一多个第三平面线焊互连565和第二多个第三平面线焊互连575可以是电导线或者用于将管芯560和570连接到基板510的其他适当材料。虽然该配置示出了存储器管芯540、550、560和570,但这些管芯可以是其他逻辑管芯或者包括至基板510的互连的集成电路组件。虽然该配置将第一多个第三平面互连565和第二多个第三平面互连575示出为单条导线,但应当理解,其可具有一条以上导线。如所示出的,PoP集成封装配置500包括在第二和第三平面中的多个管芯,这些管芯延伸超过下方平面中的管芯。
图6解说了根据本公开的一些示例的具有线焊的示例性PoP集成封装配置的俯视图。如图6中所示,PoP集成封装配置600可包括:基板610;位于基板610的第一侧上方在第一平面中、并且位于基板610的周界内中央的第一管芯630;位于第一管芯630的第一侧上方在第二平面中的第二管芯640,该第二管芯640所具有的一部分延伸超过第一管芯630的周界但是在基板610的周界内并且具有第一多个第二平面线焊互连645以用于连接到基板610;位于第一管芯630的第一侧上方、在第二平面中邻近第二管芯640的第三管芯650,该第三管芯650所具有的一部分延伸超过第一管芯630的周界但是在基板610的周界内并且具有第二多个第二平面线焊互连655以用于连接到基板610;位于第二管芯640和第三管芯650的第一侧上方在第三平面中的第四管芯660,该第四管芯660所具有的一部分延伸超过第二管芯640和第三管芯650的周界但是在基板610的周界内并且具有第一多个第三平面线焊互连665以用于连接到基板610;以及位于第二管芯640和第三管芯650上方、在第三平面中邻近第四管芯660的第五管芯670,该第五管芯670所具有的一部分延伸超过第二管芯640和第三管芯650的周界但是在基板610的周界内并且具有第二多个第三平面线焊互连675以用于连接到基板610。
图7A-G解说了根据本公开的一些示例的用于具有两个模塑层的PoP集成封装配置的示例性部分工艺流程。如图7A中所示,该部分工艺开始于基板710,该基板710具有沿基板710的前侧周界的第一多个焊盘711、沿基板710的后侧周界的第二多个焊盘712、沿基板710的第三侧周界的第三多个焊盘713、以及沿基板710的第四侧周界的第四多个焊盘714。如图7B中所示,该工艺继以在基板710的第一侧上安装第一管芯730,继之以在第一多个焊盘711中放置第一多个第二平面互连745并在第二多个焊盘712中放置第二多个第二平面互连755。
如图7C中所示,该工艺继以在第一管芯730的第一侧上在第二平面中安装第二管芯740,该第二管芯740所具有的一部分延伸超过第一管芯730的周界并耦合到第一多个第二平面互连745;在第一管芯730的第一侧上在第二平面中邻近第二管芯740安装第三管芯750,该第三管芯750所具有的一部分延伸超过第一管芯730的周界并连接到第二多个第二平面互连755;继之以在第四多个焊盘714中放置第一多个第三平面互连775的一部分并在第三多个焊盘713中放置第二多个第三平面互连765(未示出)的一部分。如图7D中所示,该工艺继以在基板710的第一侧上施加对基板710之上的各组件进行封装的第一模塑层780。如图7E中所示,该工艺继以在第一模塑层780中形成从模塑层780到第一多个第三平面互连775和第二多个第三平面互连765(未示出)的先前放置部分的沟道781。可通过使用激光、机械钻孔、光刻工艺、或类似方法来形成沟道781。
如图7F中所示,该工艺继以在沟道781中放置第一多个第三平面互连775的另一部分并在沟道781中放置第二多个第三平面互连765(未示出)的另一部分;继之以在第二管芯740和第三管芯750的第一侧上在第三平面中安装第四管芯760(未示出),该第四管芯760所具有的一部分延伸超过第二管芯740和第三管芯750的周界,该第四管芯760具有连接到基板710的第一多个第三平面互连765(未示出);以及在第二管芯740和第三管芯750上在第三平面中邻近第四管芯760安装第五管芯770,该第五管芯770所具有的一部分延伸超过第二管芯740和第三管芯750的周界,该第五管芯770具有连接到基板710的第二多个第三平面互连775。如所示出的,第一多个第三平面互连775和第二多个第三平面互连765是使用沟道781用两动作工艺而不是单个动作来形成的。使用沟道781作为两动作工艺中的第二动作的一个益处在于,它允许第一多个第三平面互连775的第二部分和第二多个第三平面互连765的第二部分改变这些第二部分的高度,以计及第一部分的形成中的变化,同时仍然达到用于连接到第三平面管芯的期望总体高度而没有可能由工艺变化造成的任何间隙或超量。如图7G中所示,该部分工艺结束于在第一模塑层780上施加对第四管芯760和第五管芯770进行封装的第二模塑层790。
图8A-E解说了根据本公开的一些示例的用于具有单个模塑层的PoP集成封装配置的示例性部分工艺流程。如图8A中所示,该部分工艺开始于基板810,该基板810具有沿基板810的前侧周界的第一多个焊盘811、沿基板810的后侧周界的第二多个焊盘812、沿基板810的第三侧周界的第三多个焊盘813、以及沿基板810的第四侧周界的第四多个焊盘814。如图8B中所示,该工艺继以在基板810的第一侧上安装第一管芯830,继之以在第一多个焊盘811中放置第一多个第二平面互连845并在第二多个焊盘812中放置第二多个第二平面互连855。
如图8C中所示,该工艺继以在第一管芯830的第一侧上在第二平面中安装第二管芯840,该第二管芯840所具有的一部分延伸超过第一管芯830的周界并连接到第一多个第二平面互连845;在第一管芯830的第一侧上在第二平面中邻近第二管芯840安装第三管芯850,该第三管芯850所具有的一部分延伸超过第一管芯830的周界并连接到第二多个第二平面互连855;继之以在第四多个焊盘814中放置第一多个第三平面互连875的一部分并在第三多个焊盘813中放置第二多个第三平面互连865(未示出)的一部分。如图8D中所示,该工艺继以放置第一多个第三平面互连875的另一部分以及第二多个第三平面互连865(未示出)的另一部分;继之以在第二管芯840和第三管芯850的第一侧上在第三平面中安装第四管芯860(未示出),该第四管芯860所具有的一部分延伸超过第二管芯840和第三管芯850的周界,该第四管芯860具有连接到基板810的第一多个第三平面互连865(未示出);以及在第二管芯840和第三管芯850上在第三平面中邻近第四管芯860安装第五管芯870,该第五管芯870所具有的一部分延伸超过第二管芯840和第三管芯850的周界,该第五管芯870具有连接到基板810的第二多个第三平面互连875。如图8E中所示,该部分工艺结束于在基板810上施加对PoP集成封装配置在基板810的第一侧上的部分进行封装的第一模塑层880。
图9解说了用于制造层叠封装配置的示例性部分方法900。如框902中所示,该方法开始于形成基板,该基板具有沿该基板的前侧周界的第一多个焊盘、沿该基板的后侧周界的第二多个焊盘、沿该基板的第三侧周界的第三多个焊盘、以及沿该基板的第四侧周界的第四多个焊盘。在框904中,该方法继以在基板的第一侧上安装第一管芯。在框906中,该方法继以在第一多个焊盘上放置第一多个第二平面互连。在框908中,该方法继以在第二多个焊盘上放置第二多个第二平面互连。在框910中,该方法继以在第一管芯上方在第二平面中安装第二管芯,该第二管芯所具有的一部分延伸超过第一管芯的周界并且该第二管芯连接到第一多个第二平面互连。在框912中,该方法继以在第一管芯上方在第二平面中邻近第二管芯安装第三管芯,该第三管芯所具有的一部分延伸超过第一管芯的周界并且该第三管芯连接到第二多个第二平面互连。在框914中,该方法继以在第四多个焊盘中放置第一多个第三平面互连的第一部分并在第三多个焊盘中放置第二多个第三平面互连的第一部分。在框916中,该方法继以在第一多个第三平面互连的第一部分上放置第一多个第三平面互连的第二部分,并在第二多个第三平面互连的第一部分上放置第二多个第三互连的第二部分。在框918中,该方法继以在第二管芯的第一侧和第三管芯的第一侧上在第三平面中安装第四管芯,该第四管芯所具有的一部分延伸超过第二管芯的周界和第三管芯的周界。在框920中,该部分方法继以在第二管芯的第一侧和第三管芯的第一侧在第三平面中邻近第四管芯安装第五管芯,该第五管芯所具有的一部分延伸超过第二管芯的周界和第三管芯的周界。
此外还应当注意,本描述或权利要求中所公开的装置和方法可由包括用于执行该装置或方法的相应动作的装置的设备来实现。例如,PoP集成封装配置可包括:基板;位于基板上方在第一平面中的第一管芯(例如,第一管芯130、第一管芯230、第一管芯330、第一管芯430、第一管芯530、第一管芯630、第一管芯730、以及第一管芯830);位于第一管芯上方在第二平面中的第二管芯(例如,第二管芯140、第二管芯240、第二管芯340、第二管芯440、第二管芯540、第二管芯640、第二管芯740、以及第二管芯840),该第二管芯所具有的一部分延伸超过第一管芯的周界并且该第二管芯具有第一互连装置以用于将第二管芯的第一部分耦合到第一管芯(该第一互连装置可包括例如焊球、焊盘、迹线、通孔、柱、电导体、或者用于将第二管芯的第一部分耦合到第一管芯的类似结构,诸如第一多个互连145、第一多个互连445、第一多个互连545、第一多个互连645、第一多个互连745、以及第一多个互连845);位于第一管芯上方在第二平面中的第三管芯(例如,第三管芯150、第三管芯250、第三管芯350、第三管芯450、第三管芯550、第三管芯650、第三管芯750、以及第三管芯850),该第三管芯所具有的一部分延伸超过第一管芯的周界并且该第三管芯具有第二互连装置以用于将第三管芯的第二部分耦合到第一管芯(该第二互连装置可包括例如焊球、焊盘、迹线、通孔、柱、电导体、或者用于将第三管芯的第二部分耦合到第一管芯的类似结构,诸如第二多个第二平面互连155、第二多个第二平面互连455、第二多个第二平面互连555、第二多个第二平面互连655、第二多个第二平面互连755、以及第二多个第二平面互连855);位于第二管芯和第三管芯上方在第三平面中的第四管芯160(例如,第四管芯160、第四管芯260、第四管芯360、第四管芯460、第四管芯560、第四管芯660、第四管芯760、以及第四管芯860),该第四管芯所具有的一部分延伸超过第二管芯和第三管芯的周界并且该第四管芯具有第三互连装置以用于将第四管芯的第三部分耦合到第一管芯(该第三互连装置可包括例如焊球、焊盘、迹线、通孔、柱、电导体、或者用于将第四管芯的第三部分耦合到第一管芯的类似结构,诸如第一多个第三平面互连165、第一多个第三平面互连465、第一多个第三平面互连565、第一多个第三平面互连665、第一多个第三平面互连765、以及第一多个第三平面互连865);位于第二管芯和第三管芯上方在第三平面中的第五管芯(例如,第五管芯170、第五管芯270、第五管芯370、第五管芯470、第五管芯570、第五管芯670、第五管芯770、以及第五管芯870),该第五管芯所具有的一部分延伸超过第二管芯和第三管芯的周界并且该第五管芯具有第四互连装置以用于将第五管芯的第四部分耦合到第一管芯(该第四互连装置可包括例如焊球、焊盘、迹线、通孔、柱、电导体、或者用于将第五管芯的第四部分耦合到第一管芯的类似结构,诸如第二多个第三平面互连175、第二多个第三平面互连475、第二多个第三平面互连575、第二多个第三平面互连675、第二多个第三平面互连775、以及第二多个第三平面互连875);以及至少部分地对PoP集成封装配置在基板上的部分进行封装的第一模塑层。
图10解说了可集成有前述集成器件、半导体器件、集成电路、管芯、中介体、封装或层叠封装(PoP)中的任何一者的各种电子设备。例如,移动电话设备1002、膝上型计算机设备1004、以及固定位置终端设备1006可包括如本文所描述的集成器件1000。集成器件1000可以是例如本文描述的集成电路、管芯、集成器件、集成器件封装、集成电路器件、器件封装、集成电路(IC)封装、层叠封装器件中的任一者。图10中所解说的设备1002、1004、1006仅是示例性的。其它电子设备也能以集成器件1000为其特征,此类电子设备包括但不限于包含以下各项的一组设备(例如,电子设备):移动设备、手持式个人通信系统(PCS)单元、便携式数据单元(诸如个人数字助理)、启用全球定位系统(GPS)的设备、导航设备、机顶盒、音乐播放器、视频播放器、娱乐单元、固定位置数据单元(诸如仪表读数装备)、通信设备、智能电话、平板计算机、计算机、可穿戴设备、服务器、路由器、实现在机动车辆(例如,自主车辆)中的电子设备、或者存储或检索数据或计算机指令的任何其它设备,或者其任何组合。
图1-10中解说的各组件、过程、特征、和/或功能中的一个或多个可以被重新安排和/或组合成单个组件、过程、特征或功能,或者可以实施在若干组件、过程或功能中。也可添加附加的元件、组件、过程、和/或功能而不会脱离本公开。还应当注意,图1-10及其在本公开中的对应描述不限于管芯和/或IC。在一些实现中,图1-10及其对应描述可被用于制造、创建、提供、和/或生产集成器件。在一些实现中,器件可包括管芯、集成器件、管芯封装、集成电路(IC)、器件封装、集成电路(IC)封装、晶片、半导体器件、层叠封装(PoP)器件、和/或中介体。
措辞“示例性”在本文中用于表示“用作示例、实例或解说”。同样,术语“示例”并不表示所有示例都包括所讨论的特征、优点、或工作模式。术语“在一个示例中”、“示例”、“在一个特征中”和/或“特征”在本说明书中的使用并不总是引述相同特征和/或示例。此外,特定的特征和/或结构可与一个或多个其他特征和/或结构组合。并且,由此描述的装置的至少一部分可被配置成执行由此描述的方法的至少一部分。
本文所使用的术语是出于描述特定示例的目的,而不意在限制本公开的诸示例。如本文所使用的,单数形式的“一”、“某”和“该”旨在也包括复数形式,除非上下文另外明确指示。将进一步理解,术语“包括”、“具有”、“包含”和/或“含有”在本文中使用时指明所陈述的特征、整数、动作、操作、元素、和/或组件的存在,但并不排除一个或多个其他特征、整数、动作、操作、元素、组件和/或其群组的存在或添加。
应该注意,术语“连接”、“耦合”或其任何变体意指在元件之间的直接或间接的任何连接或耦合,且可涵盖两个元件之间中间元件的存在,这两个元件经由该中间元件被“连接”或“耦合”在一起。元件之间的耦合和/或连接可为物理的、逻辑的、或其组合。如本文所采用的,元件可例如通过使用一条或多条导线、电缆、和/或印刷电气连接以及通过使用电磁能量被“连接”或“耦合”在一起。
本文中使用诸如“第一”、“第二”等之类的指定对元素的任何引述并不限定那些元素的数量和/或次序。确切而言,这些指定被用作区别两个或更多个元素和/或元素实例的便捷方法。同样,除非另外声明,否则元素集合可包括一个或多个元素。另外,在说明书或权利要求中使用的“A、B、或C中的至少一者”形式的术语可被解读为“A或B或C或这些元素的任何组合”。
本申请中已描述或解说描绘的任何内容都不旨在指定任何组件、动作、特征、益处、优点、或等同物奉献给公众,无论这些组件、动作、特征、益处、优点或等同物是否记载在权利要求中。
在以上详细描述中,可以看到不同特征在示例中被编组在一起。这种公开方式并不应被理解为反映所要求保护的示例包括比相应权利要求中所明确提及的特征更多的特征的意图。确切而言,该情形是使得发明性的内容可驻留在少于所公开的个体示例的所有特征的特征中。因此,所附权利要求由此应该被认为是被纳入到该描述中,其中每项权利要求自身可为单独的示例。尽管每项权利要求自身可为单独示例,但应注意,尽管权利要求书中的从属权利要求可引用具有一个或多个权利要求的具体组合,但其他示例也可涵盖或包括所述从属权利要求与具有任何其他从属权利要求的主题内容的组合或任何特征与其他从属和独立权利要求的组合。此类组合在本文提出,除非显示表达了并不以某一具体组合为目标。并且,还旨在使权利要求的特征可被包括在任何其他独立权利要求中,即使所述权利要求不直接从属于该独立权利要求。
此外,在一些示例中,个体动作可被细分为多个子动作或包含多个子动作。此类子动作可被包含在个体动作的公开中并且可以是个体动作的公开的一部分。
尽管前面的公开示出了本公开的解说性示例,但是应当注意,在其中可作出各种变更和修改而不会脱离如所附权利要求定义的本公开的范围。根据本文中所描述的本公开的各示例的方法权利要求中的功能和/或动作不一定要以任何特定次序执行。另外,众所周知的元素将不被详细描述或可被省去以免模糊本文所公开的各方面和示例的相关细节。此外,尽管本公开的要素可能是以单数来描述或主张权利的,但是复数也是已料想了的,除非显式地声明了限定于单数。
Claims (20)
1.一种层叠封装,包括:
位于第一平面中的第一管芯;
位于第二平面中的第二管芯,所述第二管芯所具有的第一部分延伸超过所述第一管芯的第一边缘,所述第二平面位于所述第一平面上方;
位于所述第二平面中的第三管芯,所述第三管芯所具有的第二部分延伸超过所述第一管芯的第二边缘;
位于第三平面中的第四管芯,所述第四管芯所具有的第三部分延伸超过所述第二管芯的第一边缘、所述第三管芯的第一边缘、以及所述第一管芯的第三边缘,所述第三平面位于所述第二平面上方;
位于所述第三平面中的第五管芯,所述第五管芯所具有的第四部分延伸超过所述第二管芯的第二边缘、所述第三管芯的第二边缘、以及所述第一管芯的第四边缘;
第一多个互连,其被配置成将所述第二管芯的所述第一部分耦合到所述第一管芯;
第二多个互连,其被配置成将所述第三管芯的所述第二部分耦合到所述第一管芯;
第三多个互连,其被配置成将所述第四管芯的所述第三部分耦合到所述第一管芯;以及
第四多个互连,其被配置成将所述第五管芯的所述第四部分耦合到所述第一管芯。
2.如权利要求1所述的层叠封装配置,其特征在于,所述第一多个互连、所述第二多个互连、所述第三多个互连、以及所述第四多个互连包括焊球。
3.如权利要求2所述的层叠封装配置,其特征在于,所述第三多个互连和所述第四多个互连各自包括两列焊球。
4.如权利要求1所述的层叠封装配置,其特征在于,所述第一多个互连、所述第二多个互连、所述第三多个互连、以及所述第四多个互连被配置成在没有穿基板通孔的情况下耦合到所述第一管芯。
5.如权利要求1所述的层叠封装配置,其特征在于,进一步包括第一模塑层,所述第一模塑层被配置成至少部分地封装所述第一管芯、所述第二管芯、以及所述第三管芯。
6.如权利要求5所述的层叠封装配置,其特征在于,进一步包括第二模塑层,所述第二模塑层被配置成至少部分地封装所述第四管芯和所述第五管芯。
7.如权利要求1所述的层叠封装配置,其特征在于,所述层叠封装配置被纳入选自包括以下各项的组的设备中:音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、移动设备、移动电话、智能电话、个人数字助理、固定位置终端、平板计算机、计算机、可穿戴设备、膝上型计算机、服务器、以及机动车辆中的装备,并且进一步包括所述设备。
8.一种层叠封装,包括:
位于第一平面中的第一管芯;
位于第二平面中的第二管芯,所述第二管芯所具有的第一部分延伸超过所述第一管芯的第一边缘,所述第二平面位于所述第一平面上方;
位于所述第二平面中的第三管芯,所述第三管芯所具有的第二部分延伸超过所述第一管芯的第二边缘;
位于第三平面中的第四管芯,所述第四管芯所具有的第三部分延伸超过所述第二管芯的第一边缘、所述第三管芯的第一边缘、以及所述第一管芯的第三边缘,所述第三平面位于所述第二平面上方;
位于所述第三平面中的第五管芯,所述第五管芯所具有的第四部分延伸超过所述第二管芯的第二边缘、所述第三管芯的第二边缘、以及所述第一管芯的第四边缘;
用于将所述第二管芯的所述第一部分耦合到所述第一管芯的第一互连装置;
用于将所述第三管芯的所述第二部分耦合到所述第一管芯的第二互连装置;
用于将所述第四管芯的所述第三部分耦合到所述第一管芯的第三互连装置;以及
用于将所述第五管芯的所述第四部分耦合到所述第一管芯的第四互连装置。
9.如权利要求8所述的层叠封装配置,其特征在于,所述第一互连装置、所述第二互连装置、所述第三互连装置、以及所述第四互连装置包括焊球。
10.如权利要求9所述的层叠封装配置,其特征在于,所述第三互连装置和所述第四互连装置各自包括两列焊球。
11.如权利要求8所述的层叠封装配置,其特征在于,所述第一互连装置、所述第二互连装置、所述第三互连装置、以及所述第四互连装置在没有穿基板通孔的情况下耦合到所述第一管芯。
12.如权利要求8所述的层叠封装配置,其特征在于,进一步包括第一模塑层,所述第一模塑层被配置成至少部分地封装所述第一管芯、所述第二管芯、以及所述第三管芯。
13.如权利要求12所述的层叠封装配置,其特征在于,进一步包括第二模塑层,所述第二模塑层被配置成至少部分地封装所述第四管芯和所述第五管芯。
14.如权利要求8所述的层叠封装配置,其特征在于,所述层叠封装配置被纳入选自包括以下各项的组的设备中:音乐播放器、视频播放器、娱乐单元、导航设备、通信设备、移动设备、移动电话、智能电话、个人数字助理、固定位置终端、平板计算机、计算机、可穿戴设备、膝上型计算机、服务器、以及机动车辆中的装备,并且进一步包括所述设备。
15.一种用于制造层叠封装的方法,所述方法包括:
形成基板,所述基板具有沿所述基板的前侧周界的第一多个焊盘、沿所述基板的后侧周界的第二多个焊盘、沿所述基板的第三侧周界的第三多个焊盘、以及沿所述基板的第四侧周界的第四多个焊盘;
在所述基板的第一侧上安装第一管芯;
在所述第一多个焊盘上放置第一多个第二平面互连;
在所述第二多个焊盘上放置第二多个第二平面互连;
在所述第一管芯上方在第二平面中安装第二管芯,所述第二管芯所具有的一部分延伸超过所述第一管芯的周界并且所述第二管芯连接到所述第一多个第二平面互连;
在所述第一管芯上方在所述第二平面中邻近所述第二管芯安装第三管芯,所述第三管芯所具有的一部分延伸超过所述第一管芯的周界并且所述第三管芯连接到所述第二多个第二平面互连;
在所述第四多个焊盘中放置第一多个第三平面互连的第一部分并在所述第三多个焊盘中放置第二多个第三平面互连的第一部分;
在所述第一多个第三平面互连的第一部分上放置所述第一多个第三平面互连的第二部分,并在所述第二多个第三平面互连的第一部分上放置所述第二多个第三互连的第二部分;
在所述第二管芯的第一侧和所述第三管芯的第一侧上在第三平面中安装第四管芯,所述第四管芯所具有的一部分延伸超过所述第二管芯的周界和所述第三管芯的周界;以及
在所述第二管芯的第一侧和所述第三管芯的第一侧上在所述第三平面中邻近所述第四管芯安装第五管芯,所述第五管芯所具有的一部分延伸超过所述第二管芯的周界和所述第三管芯的周界。
16.如权利要求15所述的用于制造层叠封装配置的方法,其特征在于,进一步包括:在所述基板的第一侧上施加第一模塑层,所述第一模塑层被配置成至少部分地封装所述第一管芯;以及在所述第一模塑层中形成至所述第一多个第三平面互连的第一部分和所述第二多个第三平面互连的第一部分的多个沟道。
17.如权利要求16所述的用于制造层叠封装配置的方法,其特征在于,施加所述第一模塑层至少部分地封装所述第二管芯和所述第三管芯。
18.如权利要求17所述的用于制造层叠封装配置的方法,其特征在于,施加所述第一模塑层至少部分地封装所述第四管芯和所述第五管芯。
19.如权利要求17所述的用于制造层叠封装配置的方法,其特征在于,进一步包括:在所述第一模塑层上施加第二模塑层,所述第二模塑层被配置成至少部分地封装所述第四管芯和所述第五管芯。
20.如权利要求15所述的用于制造层叠封装配置的方法,其特征在于,所述第一多个第二平面互连、所述第二多个第二平面互连、所述第一多个第三平面互连、以及所述第二多个第三平面互连包括焊球。
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US15/043,484 US9799628B2 (en) | 2015-03-31 | 2016-02-12 | Stacked package configurations and methods of making the same |
US15/043,484 | 2016-02-12 | ||
PCT/US2016/024952 WO2016160948A1 (en) | 2015-03-31 | 2016-03-30 | Stacked package configurations and methods of making the same |
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JP7251951B2 (ja) * | 2018-11-13 | 2023-04-04 | 新光電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
CN110634856A (zh) * | 2019-09-23 | 2019-12-31 | 华天科技(西安)有限公司 | 一种倒装加打线混合型封装结构及其封装方法 |
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