CN107369716B - 薄膜晶体管及制作方法、显示装置 - Google Patents

薄膜晶体管及制作方法、显示装置 Download PDF

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CN107369716B
CN107369716B CN201710581306.4A CN201710581306A CN107369716B CN 107369716 B CN107369716 B CN 107369716B CN 201710581306 A CN201710581306 A CN 201710581306A CN 107369716 B CN107369716 B CN 107369716B
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isolation layer
thin film
film transistor
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CN107369716A (zh
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周天民
杨维
王利忠
朱夏明
宋吉鹏
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BOE Technology Group Co Ltd
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Abstract

本发明公开了一种薄膜晶体管及制作方法、显示装置,所述薄膜晶体管包括栅极、栅介质层、有源层、源漏电极和钝化层;所述源漏电极和钝化层之间设有隔离层,所述隔离层覆盖源漏电极以及源漏电极之间的沟道区。本发明通过在源漏电极以及源漏电极之间的沟道区蒸镀隔离层,使所述源漏电极在后续工艺中不易氧化,尤其是改善了铜在后续高温钝化工艺中的氧化问题。

Description

薄膜晶体管及制作方法、显示装置
技术领域
本发明涉及液晶显示领域,尤其是一种薄膜晶体管及制作方法、显示装置。
背景技术
氧化物薄膜晶体管(Oxide Thin Film Transistor,简称Oxide TFT)凭借其优良的电子迁移率,良好的a-Si TFT生产线兼容性和低温制造工艺,成为下一代面板显示行业的首选。近些年来,随着国内外研究单位的技术竞争日趋激烈,已经使Oxide TFT工艺进入快速量产化的轨道上。
在氧化物薄膜晶体管的背沟道刻蚀(BCE)结构中,背沟道区域的处理有着十分关键的作用,通常由于刻蚀对背沟道区域的损伤,常常导致TFT的有源层出现导体化趋势。
发明内容
本发明的主要目的是解决对氧化物薄膜晶体管的背沟道刻蚀结构进行钝化处理时,源漏金属层容易被氧化的问题,尤其是沉积钝化层工艺的温度提高后,导电率高的金属铜更容易氧化的问题。本发明的技术方案如下:
一种薄膜晶体管,包括栅极、栅介质层、有源层、源漏电极和钝化层;所述源漏电极和钝化层之间设有隔离层,所述隔离层覆盖源漏电极以及源漏电极之间的沟道区。
优选地,所述隔离层的材料包括硅与氧的摩尔比例为1:1.1-1.4的硅氧化合物或氧化铝。
优选地,所述隔离层的厚度为
Figure BDA0001352359390000011
优选地,所述钝化层包括硅与氧的摩尔比例为1:1.6-2的硅氧化合物。
本发明还提出一种阵列基板,所述阵列基板包括所述的薄膜晶体管。
本发明还提出一种显示装置,所述显示装置包括所述的薄膜晶体管。
根据所述薄膜晶体管,本发明还提出一种薄膜晶体管的制作方法,在包括源漏电极的衬底上,形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层。
优选地,所述形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层具体包括,在170℃-200℃的环境下,通入流量比率不小于1:40的SiH4和N2O,通过等离子增强化学气相沉积工艺形成包括厚度为
Figure BDA0001352359390000021
的硅氧化合物的隔离层。
优选地,所述形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层具体包括,通过原子层沉积工艺或等离子增强的原子层沉积工艺,在180℃-220℃的环境下形成包括厚度为
Figure BDA0001352359390000022
的氧化铝的隔离层。
优选地,所述制作方法还包括,在所述形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层之后,在240℃-280℃的环境下,通入流量比率不大于1:90的SiH4和N2O,以在所述隔离层上形成厚度为
Figure BDA0001352359390000023
的钝化层。
优选地,在包括源漏电极的衬底上,形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层之前,还包括对所述源漏电极进行N2O等离子处理。
优选地,在所述形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层之后、在所述隔离层上形成钝化层之前,还包括对所述隔离层进行N2O等离子处理。
优选地,在所述通过沉积工艺制作钝化层之后,还包括进行250℃-350℃的退火。
为了改善刻蚀对TFT背沟道区域的损伤,避免TFT有源层导体化,可以在后续的钝化层(PVX)沉积过程前,增加一步N2O plasma处理工艺,通过对沟道区域进行N2O处理,有效弥补由于刻蚀工艺带来的缺陷态,改善Oxide TFT的电学特性。但是发明人发现,钝化层薄膜的沉积温度对Oxide TFT的电学特性测试特性(electronic parameter measurement,EPM)影响很大,在工艺范围内提高钝化层的沉积温度,能有效提高钝化层的信赖性,但温度提高很容易造成源漏金属的氧化,尤其是现阶段为满足高分辨率要求,源漏金属制作源漏电极往往选择导电率高但更容易氧化的金属铜,使得钝化温度的提高后,对源漏金属的氧化情况更为严重。
本发明的有益效果如下:
1、通过在源漏电极以及源漏电极之间的沟道区蒸镀隔离层,使所述源漏电极在后续工艺中不易氧化,尤其是改善了铜在后续高温钝化工艺中的氧化问题。
2、所述隔离层采用低氧含量的氧化硅或氧化铝,所述钝化层采用较高含量的氧化硅,可使钝化层薄膜中的氧离子更均匀地渗入到背沟道区域,提高了TFT的EPM特性。
3、本发明的制作方法采用现有的化学气相沉积设备及等离子体化学气相沉积设备,对现有制作工艺改动小,成本低。
附图说明
图1为本发明的薄膜晶体管具体实施例的内部结构示意图;
图2为本发明的薄膜晶体管与导电薄膜连接的内部结构示意图;
图3为本发明的薄膜晶体管制作方法中在源漏电极上制作隔离层后的内部结构示意图,其主要展示了隔离层中含有氧离子;
图4为本发明的薄膜晶体管制作方法中在隔离层上沉积钝化层后的内部结构示意图,其主要展示了隔离层和钝化层中氧离子的浓度差异;
图5为本发明的薄膜晶体管制作方法中形成隔离层的流程示意图;
图6为实施例一中制作硅氧化合物的隔离层制作流程示意图;
图7为实施例一中包括N2O等离子处理步骤的应用流程示意图;
图8为实施例二中制作氧化铝的隔离层制作流程示意图;
图9为实施例二中包括制作钝化层和退火步骤的应用流程示意图;
图10为实施例三的应用流程示意图;
标号说明:
基板1,栅极2,栅介质层3,有源层4,源漏电极5,源极51,漏极52,隔离层6,钝化层7,导电薄膜8。
具体实施方式
下面将结合附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本发明提出一种薄膜晶体管,参照图1所示的具体实施例,包括栅极2、栅介质层3、有源层4、源漏电极5和钝化层7;在所述源漏电极5和钝化层7之间还设有隔离层6,所述隔离层6覆盖源漏电极5以及源漏电极5之间的沟道区。
在图示的实施例中,栅极2、栅介质层3、有源层4、源漏电极5、隔离层6和钝化层7依次设置于基板1上,隔离层6分别覆盖于源极51、漏极52、以及源极51与漏极52之间的沟道区上,使得后续沉积钝化层7时,源漏电极5不被氧化;尤其是提高钝化层薄膜的沉积温度时,隔离层6可保护源极51和漏极52不容易被氧化,进而使Oxide TFT的电学特性稳定。
在氧化物薄膜晶体管的背沟道刻蚀(BCE)结构中,钝化层薄膜的沉积温度对TFT的EPM特性影响很大,提高钝化层薄膜的沉积温度,能有效提高TFT的信赖性,故采用本发明的结构,可大幅优化钝化层薄膜的沉积温度,提高TFT的信赖性;同时,由于隔离层6的保护,采用导电率高的金属铜制作源漏电极时,铜易氧化的问题也大为改善。
为使钝化层7中的氧离子更均匀地渗入到背沟道区域,以提高TFT的EPM特性,所述隔离层6可采用低氧含量的硅氧化合物膜层或氧化铝膜层;具体为:所述隔离层6的材料包括硅与氧的摩尔比例为1:1.1-1.4的硅氧化合物或氧化铝。在本结构中,由于硅氧化合物或氧化铝中的氧离子较少,一般少于钝化层7中的氧离子浓度,致使钝化层7中自由态的氧离子向背沟道区域渗透,如图3和图4所示,从而使背沟道区域中的氧离子分布更均匀,减少界面区域的缺陷。
进了一步地,为优化氧离子的渗入均匀性,所述钝化层7可为高氧含量的硅氧化合物膜层;具体为:所述钝化层7包括硅与氧的摩尔比例为1:1.6-2的硅氧化合物。应用于具体实施例时,若基板1为整面玻璃,直接进行钝化层7的沉积时,由于沉积速率较快,受到等离子体化学气相沉积的作用不均匀,可能出现局部区域氧离子过多或过少;隔离层6可起到分散作用,并且配合沉积钝化层7之后的退火工艺,可使自由态的氧离子,缓慢扩散到背沟道区域,使界面缺陷更少,有利于提高TFT的特性。
根据薄膜晶体管的性能,所述隔离层6的厚度可为
Figure BDA0001352359390000041
更优选地,当隔离层6为低氧含量的硅氧化合物时,即硅与氧的摩尔比例为1:1.1-1.4的硅氧化合物时,隔离层6的厚度可为
Figure BDA0001352359390000042
当隔离层为氧化铝(Al2O3)时,隔离层6的厚度可为
Figure BDA0001352359390000043
本发明的结构可在完成源漏金属沟道区域的刻蚀后,先通过蒸镀设备蒸镀一层隔离层6;若隔离层6使用低氧含量的硅氧化合物膜层,可采用化学气相沉积设备,若隔离层6使用氧化铝膜层,可采用带有原子层沉积腔的设备;通过较低的蒸镀温度蒸镀隔离层6之后,再对隔离层6进行N2O等离子处理,然后进行钝化层薄膜的沉积;钝化层薄膜选用高氧含量的硅氧化合物膜层,且沉积温度较高;沉积完成后,再进行退火工艺。
本发明的结构,避免了源极51、漏极52、以及源极51与漏极52之间的沟道区直接暴露在钝化工艺的高温高氧氛围条件下,减少了氧化发生的可能;而且,在源极51与漏极52之间的沟道区域,由于低氧含量隔离层6的存在,可使钝化层薄膜中的氧离子更均匀地渗入到背沟道区域,提高了TFT的EPM特性。
根据上述薄膜晶体管的结构,本发明还提出一种阵列基板,所述阵列基板包括前述任一项所述的薄膜晶体管。如图2所示,所述薄膜晶体管的漏极52可与导电薄膜8电性连接,以作为导电薄膜8输入控制电压的开关。可以理解的是,导电薄膜8可以是阵列基板上的像素电极,其材料可以为氧化铟锡。
根据前述阵列基板的结构,本发明还提出一种显示装置,所述显示装置包括所述的薄膜晶体管或阵列基板。
根据所述薄膜晶体管的结构,本发明还提出一种薄膜晶体管的制作方法,如图5所示,在包括源漏电极5的衬底上,形成覆盖源漏电极5以及源漏电极5之间的沟道区的隔离层6;即:形成包括源漏电极5的衬底之后、沉积钝化层7之前,再形成覆盖源漏电极5以及源漏电极5之间的沟道区的隔离层6。
如前所述,所述隔离层6的材料包括硅与氧的摩尔比例为1:1.1-1.4的硅氧化合物或氧化铝,故本发明至少有两种制作隔离层6的工艺;根据钝化层7的沉积工艺及蒸镀隔离层6前后的等离子处理工艺,本发明的薄膜晶体管的制作方法具有多种组合实施方式。以下为提出的三种具体实施例:
实施例一:
如图6所示,所述形成覆盖源漏电极5以及源漏电极5之间的沟道区的隔离层6具体包括,在170℃-200℃的环境下,通入流量比率不小于1:40的SiH4和N2O,通过等离子增强化学气相沉积工艺形成包括厚度为
Figure BDA0001352359390000051
的硅氧化合物的隔离层。由于不同设备的性能差异,制备包括硅氧化合物的隔离层6的实际工艺参数有所差异。实际制备中,可采用PECVD设备,压力控制在70Pa-110Pa,功率控制在800W-1500W,反应温度为170℃-200℃,使SiH4与N2O反应,在样片表面沉积厚度为
Figure BDA0001352359390000052
的隔离层6;根据设备不同,沉积的速率差异很大,故反应气体的反应时间差异也较大,根据所述压强、功率、温度等参数,PECVD设备约需要1分钟-5分钟,化学气相沉积设备(CVD设备)需要的时间稍长,约为10分钟-30分钟;其中SiH4与N2O的反应式为:SiH4+4N2O→SiO2+2H2O+4N2
如图7所示,在背沟道区域刻蚀完成之后,可先对源漏电极以及源漏电极之间的沟道区进行N2O等离子处理(即N2O plasma处理);以完成对背沟道刻蚀的缺陷修复;然后选用低氧含量的硅氧化合物膜层作为隔离层6,并进行硅氧化合物膜层的制作;隔离层6的厚度控制在
Figure BDA0001352359390000061
之间,在
Figure BDA0001352359390000062
之间更佳。
实施例二:
如图8所示,所述形成覆盖源漏电极以及源漏电极之间的沟道区的隔离层具体包括,通过原子层沉积工艺或等离子增强的原子层沉积工艺,在180℃-220℃的环境下形成包括厚度为
Figure BDA0001352359390000063
的氧化铝的隔离层。氧化铝的反应气体为三甲基铝气体及其氧化剂,具体操作可为:先通入三甲基铝气体,再通过惰性气体净化,再通入H2O、H2O等离子体、O2等离子体、O3等氧化剂中任一项源气体进行蒸镀反应;可多次重复进行蒸镀反应。
蒸镀氧化铝膜层可使用原子层沉积腔体(ALD腔),由于采用ALD技术,致使沉积速率较慢,考虑到量产的效率,因此隔离层6的蒸镀厚度可较薄,在
Figure BDA0001352359390000064
之间;根据隔离层6的具体特性,蒸镀温度可控制在200℃左右,例如180℃-220℃。
为提高产能,可将等离子体化学气相沉积设备(PECVD设备)中的一个腔体作为为低温腔体(或搭载ALD腔),专门用来蒸镀低温的隔离层6。所有基板1先进入低温腔体进行氧化铝膜层的蒸镀,然后再进入各化学气相沉积室(CVD Chamber)进行钝化层沉积。
采用PECVD设备制备氧化铝作为隔离层6的具体操作为:先通入三甲基铝源气体,再通入H2O、H2O等离子体、O2等离子体或O3等氧化剂的源气体进行反应;再重复通入三甲基铝源气体,再通入H2O、H2O等离子体、O2等离子体、O3等氧化剂中任一项源气体进行蒸镀反应;可多次重复进行蒸镀反应,以便将氧化铝膜蒸镀到所需厚度。其中,在引入每个源气体反应之后,需引入用于净化的惰性气体,以净化反应后的气体,所述惰性气体可采用常规惰性气体,例如Ar等。
如图9所示,形成隔离层6后,可再进行较高温度的钝化层沉积,钝化层选用高氧含量的硅氧化合物,在240℃-280℃的环境下(视具体工艺而定),通入流量比率不大于1:90的SiH4和N2O,以在所述隔离层上形成厚度为
Figure BDA0001352359390000065
的钝化层。钝化层沉积完成后,进行退火工艺,退火温度为300℃左右,可在250℃-350℃之间。本实施例中的PVX1层可作为钝化层,为进一步提高钝化层7的稳定性,可继续进行后续PVX2层的沉积,以及导电薄膜8的沉积。
实施例三:
如图10所示,在完成有源层4和源漏电极5的沉积后,先对源漏电极5以及源漏电极5之间的沟道区进行N2Oplasma处理,然后采用CVD设备蒸镀一层隔离层6;隔离层6选用低温低氧含量的硅氧化合物,其反应气体包括SiH4和N2O,所述SiH4和N2O的比率不小于1:40,蒸镀温度为170℃-200℃。完成隔离层6的蒸镀后,对隔离层6进行第二次N2Oplasma处理。处理后再用较高的温度沉积高氧含量的硅氧化合物作为钝化层7,具体为:采用PECVD设备,在240℃-280℃的环境下,通入流量比率不大于1:90的SiH4和N2O,以在所述隔离层6上形成厚度为
Figure BDA0001352359390000071
的钝化层7,反应时间约持续2分钟-7分钟。
在上述各实施例中,隔离层6的蒸镀温度较钝化层7的钝化温度低,故源漏电极5的源漏金属在制作隔离层6的工艺中,比直接制作钝化层7的氧化情况明显改善;而且,由于隔离层6的隔离作用,使得后续沉积钝化层7的工艺自由度更高,从而使得在工艺范围内提高钝化层的沉积温度以提高钝化层7整体的信赖性成为可能;再次,由于隔离层6的氧含量较钝化层7低,如图3和图4所示,使钝化层中的氧离子渗入到背沟道区域,从而使背沟道区域中的氧离子分布更均匀,减少界面区域的缺陷。提高了TFT的EPM均一性。
在上述各实施例中,在包括源漏电极5的衬底上,形成覆盖源漏电极5以及源漏电极之间的沟道区的隔离层6之前,还包括对所述源漏电极5进行N2O等离子处理工艺;即:完成蚀刻源漏电极5的工艺之后,先进行N2O等离子处理工艺,以修复背沟道刻蚀的缺陷,再蒸镀所述隔离层6。在所述形成覆盖源漏电极5以及源漏电极5之间的沟道区的隔离层之后、在所述隔离层6上形成钝化层7之前,还包括对所述隔离层6进行N2O等离子处理;即:完成蒸镀所述隔离层6的工艺后,先进行N2O等离子处理工艺,以修复隔离层6的缺陷,再沉积钝化层7。所述钝化层7可为硅氧化合物膜层,其中,硅与氧的摩尔比例为1:1.6-2。
在上述各实施例中,在所述通过沉积工艺制作钝化层7或钝化层7的第一层薄膜之后,还包括进行250℃-350℃的退火,以增加各层之间的结合力。
以上所述仅为本发明的优选实施例,并非因此限制本发明的专利范围,凡是在本发明的发明构思下,利用本发明说明书及附图内容所作的等效结构变换,或直接/间接运用在其他相关的技术领域均包括在本发明的专利保护范围内。

Claims (11)

1.一种薄膜晶体管,包括栅极、栅介质层、有源层、源漏电极和钝化层;其特征在于:所述源漏电极和所述钝化层之间设有隔离层,所述隔离层覆盖所述源漏电极以及所述源漏电极之间的沟道区,所述隔离层的材料包括硅与氧的摩尔比例为1:1.1-1.4的硅氧化合物或氧化铝,所述钝化层包括硅与氧的摩尔比例为1:1.6-2的硅氧化合物。
2.根据权利要求1所述的薄膜晶体管,其特征在于,所述隔离层的厚度为
Figure FDA0002860173340000014
3.一种显示装置,其特征在于,所述显示装置包括权利要求1-2中任一项所述的薄膜晶体管。
4.一种薄膜晶体管的制作方法,其特征在于,包括:
在包括源漏电极的衬底上,形成覆盖所述源漏电极以及所述源漏电极之间的沟道区的隔离层,具体包括:在170℃-200℃的环境下,通入流量比率不小于1:40的SiH4和N2O,通过等离子增强化学气相沉积工艺形成包括硅氧化合物的隔离层;或者通过原子层沉积工艺或等离子增强的原子层沉积工艺,在180℃-220℃的环境下形成包括氧化铝的隔离层;
在240℃-280℃的环境下,通入流量比率不大于1:90的SiH4和N2O,以在所述隔离层上形成钝化层。
5.根据权利要求4所述的薄膜晶体管的制作方法,其特征在于,所述硅氧化合物的厚度为
Figure FDA0002860173340000011
6.根据权利要求4所述的薄膜晶体管的制作方法,其特征在于,所述氧化铝的厚度为
Figure FDA0002860173340000012
7.根据权利要求4-6任一项所述的薄膜晶体管的制作方法,其特征在于,所述钝化层的厚度为
Figure FDA0002860173340000013
8.根据权利要求7所述的薄膜晶体管的制作方法,其特征在于,在包括源漏电极的衬底上,形成覆盖所述源漏电极以及所述源漏电极之间的沟道区的隔离层之前,还包括对所述源漏电极进行N2O等离子处理。
9.根据权利要求7所述的薄膜晶体管的制作方法,其特征在于,在所述形成覆盖所述源漏电极以及所述源漏电极之间的沟道区的隔离层之后、在所述隔离层上形成钝化层之前,还包括对所述隔离层进行N2O等离子处理。
10.根据权利要求7所述的薄膜晶体管的制作方法,其特征在于,在形成所述钝化层之后,还包括进行250℃-350℃的退火。
11.根据权利要求9所述的薄膜晶体管的制作方法,其特征在于,在形成所述钝化层之后,还包括进行250℃-350℃的退火。
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