CN107039286A - 感测装置及其制造方法 - Google Patents

感测装置及其制造方法 Download PDF

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Publication number
CN107039286A
CN107039286A CN201610900645.XA CN201610900645A CN107039286A CN 107039286 A CN107039286 A CN 107039286A CN 201610900645 A CN201610900645 A CN 201610900645A CN 107039286 A CN107039286 A CN 107039286A
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China
Prior art keywords
substrate
device further
sensing device
cover plate
layer
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CN201610900645.XA
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English (en)
Inventor
刘沧宇
温英男
廖季昌
黄玉龙
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XinTec Inc
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XinTec Inc
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Publication of CN107039286A publication Critical patent/CN107039286A/zh
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Abstract

本发明提供一种感测装置及其制造方法，该制造方法包括：提供一第一基底，第一基底具有一第一表面及与其相对的一第二表面，且一感测区邻近于第一表面；在第一表面上提供一暂时性盖板，以覆盖感测区；在第二表面上形成一重布线层，重布线层电性连接至感测区；在形成重布线层之后，去除暂时性盖板；在去除暂时性盖板之后，将第一基底接合至一第二基底及一盖板，使得第一基底位于第二基底与盖板之间；重布线层电性连接至第二基底；在第二基底与盖板之间填入一封胶层，以环绕第一基底。本发明提供了简化的制程，可有效降低制造成本及缩小感测装置的尺寸，且有利于提供感测装置平坦的感测表面。

Description

感测装置及其制造方法
技术领域
本发明有关于一种感测装置及其制造方法，特别为有关于以晶圆级封装制程制作感测生物特征的感测装置。
背景技术
晶片封装制程是形成电子产品过程中的重要步骤。晶片封装体除了将晶片保护于其中，使其免受外界环境污染外，还提供晶片内部电子元件与外界的电性连接通路。具有感测功能的晶片封装体通常与其他电子构件一起接合于电路板上，进而形成感测装置，并进一步组合于电子产品内。
然而，传统的感测装置的制程繁复、良率低。感测装置通常凹陷于电子产品外壳内，而不利于使用者的操作，且一旦感测晶片或晶片封装体毁损或失效，整个感测装置即无法使用。
因此，有必要寻求一种新颖的感测装置及其制造方法，其能够解决或改善上述的问题。
发明内容
本发明实施例提供一种感测装置的制造方法，包括提供一第一基底。第一基底具有一第一表面及与其相对的一第二表面，且一感测区邻近于第一表面。在第一表面上提供一暂时性盖板，以覆盖感测区。在第二表面上形成一重布线层，重布线层电性连接至感测区。在形成重布线层之后，去除暂时性盖板。在去除暂时性盖板之后，将第一基底接合至一第二基底及一盖板，使得第一基底位于第二基底与盖板之间。重布线层电性连接至第二基底。在第二基底与盖板之间填入一封胶层，以环绕第一基底。
本发明实施例提供一种感测装置，包括一第一基底。第一基底位于一第二基底与一盖板之间。一感测区感测区邻近于第一基底面向盖板的表面。一重布线层位于第一基底与第二基底之间。重布线层电性连接至感测区及第二基底。一底胶层位于重布线层与第二基底之间。一封胶层环绕第一基底及底胶层。
本发明实施例提供一种感测装置，包括一基底。基底承载于一支撑基底上，且基底具有一第一表面及与其相对的一第二表面。多个感测区邻近于第一表面，且用以感测生物特征。多个导电结构位于第二表面，且电性连接至对应的该测区。导电结构彼此电性绝缘。一沟槽延伸于感测区之间及导电结构之间，且露出支撑基底。
本发明提供了简化的制程，可有效降低制造成本及缩小感测装置的尺寸，且有利于提供感测装置平坦的感测表面。
附图说明
图1A至1E及图1G至1I是绘示出根据本发明某些实施例的感测装置的制造方法的剖面示意图。
图1F是绘示出根据本发明某些实施例的感测装置的制造方法的平面示意图。
图2A至2C是绘示出根据本发明某些实施例的感测装置的制造方法的剖面示意图。
其中，附图中符号的简单说明如下：100：第一基底；100a：第一表面；100b：第二表面；110：感测区；120：晶片区；130：绝缘层；140：导电垫；165：暂时性粘着层；170：暂时性盖板；190：第一开口；200：第二开口；210：绝缘层；220：重布线层；230：保护层；240：孔洞；250：导电结构；260：第二基底；270A：框体；270B：切割胶带；280：底胶层；290：粘着层；300：盖板；310：封胶层；320、330：感测装置；A、B：子结构；SC：切割道；SC’：沟槽。
具体实施方式
以下将详细说明本发明实施例的制作与使用方式。然而应注意的是，本发明提供许多可供应用的发明概念，其可以多种特定型式实施。文中所举例讨论的特定实施例仅为制造与使用本发明的特定方式，非用以限制本发明的范围。此外，在不同实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本发明，不代表所讨论的不同实施例及/或结构之间具有任何关联性。再者，当述及一第一材料层位于一第二材料层上或之上时，包括第一材料层与第二材料层直接接触或间隔有一或更多其他材料层的情形。
本发明某些实施例的晶片封装体可用以封装微机电系统晶片。然其应用不限于此，例如在本发明的晶片封装体的实施例中，其可应用于各种包含有源元件或无源元件(active or passive elements)、数字电路或模拟电路(digital or analog circuits)等集成电路的电子元件(electronic components)，例如是有关于光电元件(optoelectronic devices)、微机电系统(Micro Electro Mechanical System，MEMS)、生物辨识元件(biometric device)、微流体系统(micro fluidic systems)、或利用热、光线、电容及压力等物理量变化来测量的物理感测器(Physical Sensor)。特别是可选择使用晶圆级封装(wafer scale package，WSP)制程对影像感测元件、发光二极管(light-emittingdiodes，LEDs)、太阳能电池(solar cells)、射频元件(RF circuits)、加速计(accelerators)、陀螺仪(gyroscopes)、指纹辨识器(fingerprint recognition device)、微制动器(micro actuators)、表面声波元件(surface acoustic wave devices)、压力感测器(process sensors)或喷墨头(ink printer heads)等半导体晶片进行封装。
其中上述晶圆级封装制程主要是指在晶圆阶段完成封装步骤后，再予以切割成独立的封装体，然而，在一特定实施例中，例如将已分离的半导体晶片重新分布在一承载晶圆上，再进行封装制程，亦可称之为晶圆级封装制程。另外，上述晶圆级封装制程亦适用于通过堆迭(stack)方式安排具有集成电路的多片晶圆，以形成多层电路(multi-layerintegrated circuit devices)的晶片封装体或系统级封装(System in Package，SIP)的晶片封装体。
以下配合图1A至1I说明本发明某些实施例的感测装置的制造方法，其中图1A至1E及图1G至1I是绘示出根据本发明某些实施例的感测装置的制造方法的剖面示意图，且图1F是绘示出根据本发明某些实施例的感测装置的制造方法的平面示意图。
请参照图1A，提供一第一基底100，其具有一第一表面100a及与其相对的一第二表面100b，且包括多个晶片区120。为简化图式，此处仅绘示出一完整的晶片区120及与其相邻的晶片区120的一部分。在某些实施例中，第一基底100可为一硅基底或其他半导体基底。在某些实施例中，第一基底100为一硅晶圆，以利于进行晶圆级封装制程。
第一基底100的第一表面100a上具有一绝缘层130。一般而言，绝缘层130可由层间介电层(interlayer dielectric，ILD)、金属间介电层(inter-metal dielectric，IMD)及覆盖的钝化层(passivation)组成。为简化图式，此处仅绘示出单层绝缘层130。在某些实施例中，绝缘层130可包括无机材料，例如氧化硅、氮化硅、氮氧化硅、金属氧化物或前述的组合或其他适合的绝缘材料。
在某些实施例中，每一晶片区120的绝缘层130内具有一个或一个以上的导电垫140。在某些实施例中，导电垫140可为单层导电层或具有多层的导电层结构。为简化图式，此处仅以单层导电层作为范例说明。在某些实施例中，每一晶片区120的绝缘层130内包括一个或一个以上的开口，露出对应的导电垫140，以通过露出的导电垫140进行预先检测。
在某些实施例中，每一晶片区120内具有一感测区110。感测区110可邻近于绝缘层130及第一基底100的第一表面100a，且可通过内连线结构(未绘示)与导电垫140电性连接。在某些实施例中，感测区110用以感测生物特征，且感测区110内可包括一指纹辨识元件(例如，一电容式指纹辨识元件)。
在某些实施例中，可依序进行半导体装置的前段(front end)制程(例如，在第一基底100内制作集成电路)及后段(back end)制程(例如，在第一基底100上制作绝缘层130、内连线结构及导电垫140)来提供前述结构。换句话说，以下感测装置的制造方法用于对完成后段制程的基底进行后续的封装制程。
接着，可通过一暂时性粘着层165将一暂时性盖板170接合至第一基底100，暂时性盖板170覆盖感测区110及导电垫140。暂时性盖板170用以在后续的制程期间提供保护及支撑的功能。在某些实施例中，暂时性盖板170可包括玻璃、半导体材料(例如，硅)或其他适合的基底材料。在某些实施例中，暂时性盖板170的尺寸(例如，宽度及/或长度)大致上等于第一基底100的尺寸。
在某些实施例中，暂时性粘着层165为双面胶材或其他适合的可移除式粘着材料。形成于暂时性盖板170与第一基底100之间的暂时性粘着层165完全覆盖第一基底100的第一表面100a，因此导电垫140及感测区110也被暂时性粘着层165所覆盖。
请参照图1B，以暂时性盖板170作为承载基板，对第一基底100的第二表面100b进行薄化制程(例如，蚀刻制程、铣削(milling)制程、磨削(grinding)制程或研磨(polishing)制程)，以减少第一基底100的厚度。在某些实施例中，第一基底100薄化后的厚度小于大约100μm(例如，大约85μm)。
接着，通过微影制程及蚀刻制程(例如，干蚀刻制程、湿蚀刻制程、电浆蚀刻制程、反应性离子蚀刻制程或其他适合的制程)，在每一晶片区120的第一基底100内同时形成多个第一开口190及第二开口200，第一开口190及第二开口200自第一基底100的第二表面100b露出绝缘层130。在其他实施例中，可分别通过刻痕(notching)制程以及微影及蚀刻制程形成第二开口200以及第一开口190。
在某些实施例中，第一开口190对应于导电垫140而贯穿第一基底100，且第一开口190邻近于第一表面100a的口径小于其邻近于第二表面100b的口径，因此第一开口190具有倾斜的侧壁，进而降低后续形成于第一开口190内的膜层的制程难度，并提高可靠度。举例来说，由于第一开口190邻近于第一表面100a的口径小于其邻近于第二表面100b的口径，因此后续形成于第一开口190内的膜层(例如，后续形成的绝缘层210及重布线层220)能够较轻易地沉积于第一开口190与绝缘层130之间的转角，以避免影响电性连接路径或产生漏电流的问题。
在某些实施例中，第二开口200沿着相邻晶片区120之间的切割道SC延伸且贯穿第一基底100，使得每一晶片区120内的第一基底100彼此分离。在某些实施例中，相邻两晶片区120内的多个第一开口190沿着第二开口200间隔排列，且第一开口190与第二开口200通过第一基底100的一部分(例如，侧壁部分)互相间隔且完全隔离。在某些实施例中，第二开口200可沿着晶片区120延伸而环绕第一开口190。
在某些其他实施例中，第一开口190与第二开口200连通。例如，第一开口190邻近于第二表面100b的部分与第二开口200邻近于第二表面100b的部分彼此连通，使得第一基底100具有一侧壁部分低于第二表面100b。由于第一开口190与第二开口200彼此连通，而并非通过第一基底100的一部分完全隔离，因此能够防止应力累积于第一开口190与第二开口200之间的第一基底100，且可通过第二开口200缓和及释放应力，进而避免第一基底100的侧壁部分出现破裂。
请参照图1C，可通过沉积制程(例如，涂布制程、物理气相沉积制程、化学气相沉积制程或其他适合的制程)，在第一基底100的第二表面100b上形成一绝缘层210，绝缘层210顺应性沉积于第一开口190及第二开口200的侧壁及底部上。在某些实施例中，绝缘层210可包括环氧树脂、无机材料(例如，氧化硅、氮化硅、氮氧化硅、金属氧化物或前述的组合)、有机高分子材料(例如，聚酰亚胺树脂、苯环丁烯、聚对二甲苯、萘聚合物、氟碳化物、丙烯酸酯)或其他适合的绝缘材料。
接着，可通过微影制程及蚀刻制程，去除第一开口190底部的绝缘层210及其下方的绝缘层130，使得第一开口190延伸至绝缘层130内而露出对应的导电垫140。
可通过沉积制程(例如，涂布制程、物理气相沉积制程、化学气相沉积制程、电镀制程、无电镀制程或其他适合的制程)、微影制程及蚀刻制程，在绝缘层210上形成图案化的重布线层220。重布线层220顺应性延伸至第一开口190的侧壁及底部，而未延伸至第二开口200内，且重布线层220延伸至第一开口190与第二开口200之间的第二表面100b上。
在某些实施例中，重布线层220可通过绝缘层210与第一基底100电性隔离，且可经由第一开口190直接电性接触或间接电性连接露出的导电垫140。因此，第一开口190内的重布线层220也称为硅通孔电极(through silicon via，TSV)。在其他实施例中，重布线层220也可能以T型接触(T-contact)或其他适合的方式电性连接至对应的导电垫140。在某些实施例中，重布线层220可包括铝、铜、金、铂、镍、锡、前述的组合、导电高分子材料、导电陶瓷材料(例如，氧化铟锡或氧化铟锌)或其他适合的导电材料。
请参照图1D，可通过沉积制程，在第一基底100的第二表面100b上形成一保护层230，且填入第一开口190及第二开口200，以覆盖重布线层220。在某些实施例中，保护层230可包括环氧树脂、绿漆、无机材料(例如，氧化硅、氮化硅、氮氧化硅、金属氧化物或前述的组合)、有机高分子材料(例如，聚酰亚胺树脂、苯环丁烯、聚对二甲苯、萘聚合物、氟碳化物、丙烯酸酯)或其他适合的绝缘材料。
在某些实施例中，保护层230仅部分填充第一开口190而未填满第一开口190，使得一孔洞240形成于第一开口190内的重布线层220与保护层230之间。由于保护层230部分填充于第一开口190而留下孔洞240，因此后续制程中遭遇热循环(Thermal Cycle)时，孔洞240能够作为保护层230与重布线层220之间的缓冲，以降低保护层230与重布线层220之间由于热膨胀系数不匹配所引发不必要的应力，且防止外界温度或压力剧烈变化时保护层230会过度拉扯重布线层220，进而可避免靠近导电垫结构的重布线层220剥离甚至断路的问题。在某些实施例中，孔洞240与保护层230之间的界面具有拱形轮廓。在某些实施例中，重布线层220的末端可位于孔洞240内。在某些其他实施例中，保护层230亦可填满第一开口190。
接着，可通过微影制程及蚀刻制程，在第一基底100的第二表面100b上的保护层230内形成开口，以露出图案化的重布线层220的一部分。接着，可通过电镀制程、网版印刷制程或其他适合的制程，在保护层230的开口内填入导电结构250(例如，焊球、凸块或导电柱)，以与露出的重布线层220电性连接。在某些实施例中，导电结构250可包括锡、铅、铜、金、镍、或前述的组合。
请参照图1E，在形成导电结构250之后，将暂时性粘着层165及暂时性盖板170去除，且露出绝缘层130。在某些实施例中，经由加热来消除暂时性粘着层165的黏性，进而将暂时性盖板170分离及移除(debond)。例如，可利用紫外光(ultraviolet，UV)来进行加热。
接着，将第一基底100承载于一支撑基底上。在某些实施例中，支撑基底可包括框体270A及由框体270A围绕的切割胶带270B，如图1F所示。之后，沿着切割道SC(等同于沿着第二开口200)切割保护层230及绝缘层130，进而形成多个独立的子结构A。举例来说，可使用切割刀具或激光进行切割制程，其中使用激光切割制程可以避免上下膜层发生位移。
在某些实施例中，第一基底100为晶圆级尺寸的基底，且可切割出多个晶片级尺寸(chip level)的子结构A，多个子结构A之间彼此电性绝缘。在某些实施例中，分离的第一基底100及切割后的绝缘层130可共同视为晶片/晶粒。在某些实施例中，进行切割制程之后，沿着切割道SC形成一沟槽SC’，沟槽SC’延伸于多个感测区110之间及多个导电结构250之间，且露出一部分的支撑基底(例如，切割胶带270B)，如图1F所示。
在某些实施例中，可利用支撑基底承载切割后的子结构A而直接运送多个子结构A。在某些实施例中，在运送的过程中，支撑基底上的多个子结构A上方贴附有一保护胶带，使得所有的感测区110皆能够避免受到污染或破坏而影响感测性能。之后，可移除保护胶带，且将各个子结构A自支撑基底取起，并继续对子结构A进行后续的制程。
请参照图1G，提供一第二基底260。在某些实施例中，第二基底260可包括一电路板、一陶瓷基底或其他适合的基底材料。接着，将子结构A接合至第二基底260上，且导电垫140通过第一基底100的第二表面100b上的重布线层220及导电结构250而与第二基底260电性连接。举例来说，导电结构250可由焊料(solder)所构成，将子结构A自支撑基底取起且放置于第二基底260上后，可进行回焊(reflow)制程，以通过焊球将子结构A接合至第二基底260上。
在某些实施例中，在将子结构A接合至第二基底260上之前，可通过表面粘着技术(surface mount technology，SMT)将所需的无源元件(例如，电感、电容、电阻或其他电子部件)形成于第二基底260上。如此一来，可尽可能防止子结构A受到外界环境的污染。在某些其他实施例中，可能通过同一回焊制程将子结构A及上述无源元件同时接合至第二基底260上，或者也可能在将子结构A接合至第二基底260上之后，通过表面粘着技术将上述无源元件形成于已接合子结构A的第二基底260上。
接着，可通过点胶(dispensing)制程或其他适合制程，将一底胶层280填入保护层230与第二基底260之间。底胶层280连续地环绕导电结构250，以保护导电结构250。在某些实施例中，底胶层280与重布线层220因保护层230而互相分离。在某些实施例中，底胶层280由具有高扩散性及流动性且可加热固化的材料所构成。在某些实施例中，底胶层280包括树脂或其他适合的材料。
在某些实施例中，加热固化后的底胶层280的侧壁可能由于毛细现象而具有曲形表面。在某些实施例中，底胶层280完全填满子结构A与第二基底260之间的空间。再者，底胶层280延伸超出子结构A的边缘，且露出第二基底260的上表面的一部分。在某些其他实施例中，底胶层280可完全覆盖第二基底260的上表面。
请参照图1H，通过一粘着层290将一盖板300接合于子结构A上，使得子结构A位于盖板300与第二基底260之间。在某些实施例中，在形成底胶层280之后，可先对已接合子结构A的第二基底260进行检测，而仅对品质良好的封装构件进行后续制程(例如，接合高品质及高成本的盖板300)，因此能够确保感测装置的品质，并有效节省制造成本。
在某些实施例中，粘着层290包括粘着胶或其他具有粘性的材料。在某些实施例中，位于子结构A与盖板300之间的粘着层290包括高介电常数(K)材料，以增加感测装置的感测灵敏度。在某些实施例中，盖板300包括蓝宝石(sapphire)材料或其他适合的材料，以提供耐磨、防刮及高可靠度的平坦表面，进而避免在使用感测装置的感测功能的过程中感测装置受到污染或破坏。再者，盖板300具有遮蔽性，例如盖板300由具有色彩且非透明的材料所构成。
在某些实施例中，盖板300的尺寸(例如，宽度及/或长度)大于子结构A的尺寸。在某些实施例中，盖板300的尺寸(例如，宽度及/或长度)大致上等于第二基底260的尺寸。在某些其他实施例中，盖板300的尺寸可大于第二基底260的尺寸。盖板300的尺寸不小于第二基底260的尺寸可确保感测装置能够容纳于电子产品内预定提供给感测装置的空间，以使感测装置后续可顺利组合于电子产品之中。
接着，可通过点胶制程、模塑成型(molding)制程或其他适合制程，将一封胶层310填入盖板300与第二基底260所围成的空间，且将封胶层310加热固化，进而完成感测装置320的制作。封胶层310连续地环绕位于盖板300与第二基底260之间的子结构A，以保护子结构A。在某些实施例中，封胶层310进一步连续地环绕粘着层290及底胶层280，且封胶层310与底胶层280共同完全填满盖板300与第二基底260之间的空间。
在某些实施例中，封胶层310由具有高扩散性及流动性且可加热固化的材料所构成。在某些实施例中，封胶层310包括底胶材料、模塑成型材料或其他适合的材料(例如，树脂)。在某些实施例中，加热固化后的封胶层310的侧壁由于毛细现象而具有曲形表面。在某些实施例中，封胶层310可能延伸至第二基底260的侧壁。
在某些实施例中，底胶层280及封胶层310可包括相同或不同材料。在某些实施例中，底胶层280与封胶层310之间具有一可视界面。在某些其他实施例中，底胶层280与封胶层310之间可能没有可视界面。
以下配合图2A至2C说明本发明某些实施例的感测装置的制造方法。图2A至2C是绘示出根据本发明某些实施例的感测装置的制造方法的剖面示意图，其中相同于图1A至1I中的部件使用相同的标号并省略其说明。
请参照图2A，可通过与图1A相同或相似的步骤，通过暂时性粘着层165将暂时性盖板170接合至第一基底100。接着，通过与图1B相同或相似的步骤，对第一基底100进行薄化制程，且在第一基底100内形成第一开口190及第二开口200。接着，通过与图1C相同或相似的步骤，在基底100的第二表面100b上形成绝缘层210及重布线层220。
之后，通过与图1E相同或相似的步骤，将暂时性粘着层165及暂时性盖板170去除。接着，通过与图1F相同或相似的步骤，沿着切割道SC(等同于沿着第二开口200)进行切割制程，进而形成多个独立的子结构B。在某些实施例中，子结构B中的第一基底100的第二表面100b上不具有保护层，因而完全露出重布线层220。在某些其他实施例中，也可选择性在第一基底100的第二表面100b上形成保护层(例如，保护层230)，且在保护层内形成露出重布线层220的开口。
请参照图2B，将子结构B接合至第二基底260上，且通过重布线层220与第二基底260之间的多个导电结构250而与第二基底260电性连接。在某些实施例中，可使用浸焊(dipping flow)技术形成导电结构250。举例来说，在将子结构B接合至第二基底260上之前，预先在第二基底260上形成由焊料所构成的导电结构250，接着进行回焊制程，以通过焊料凸块或焊垫将子结构B接合至第二基底260上。如此一来，可降低导电结构250的高度，进而有利于缩小感测装置的整体尺寸。再者，子结构B具有露出的重布线层220，有利于子结构B顺利地电性连接至形成于第二基底260上的导电结构250。
在某些其他实施例中，导电结构250可为导电胶或其他具有粘性的导电材料，以将子结构B粘贴至第二基底260上，且通过导电结构250作为电性连接路径。如此一来，可更进一步降低导电结构250的高度，且无须使用可能造成污染问题的回焊制程或浸焊技术。再者，可在将感测装置B接合至第二基底260上之前，通过表面粘着技术将所需的无源元件(例如，电感、电容、电阻或其他电子部件)形成于第二基底260上。如此一来，可尽可能防止子结构B受到外界环境的污染。
在某些其他实施例中，可能通过同一回焊制程将子结构B及上述无源元件同时接合至第二基底260上，或者也可能在将子结构B接合至第二基底260上之后，通过表面粘着技术将上述无源元件形成于已接合子结构B的第二基底260上。
请参照图2C，可通过点胶制程或其他适合制程，将底胶层280填入重布线层220与第二基底260之间。底胶层280连续地环绕导电结构250，以保护导电结构250。在某些实施例中，底胶层280直接接触重布线层220。在某些实施例中，底胶层280全部填满第一开口190及/或第二开口200。在某些实施例中，底胶层280局部填入第一开口190及/或第二开口200内。在某些其他实施例中，底胶层280未填入第一开口190及/或第二开口200内。
接着，可通过与图1H相同或相似的步骤，利用粘着层290将盖板300接合于子结构B上，使得子结构B位于盖板300与第二基底260之间。接着，可通过与第1I图相同或相似的步骤，将封胶层310填入盖板300与第二基底260所围成的空间，进而完成感测装置330的制作。
根据本发明的上述实施例，提供了简化的制程，能够将感测晶片及所需的无源元件整合于同一感测装置中，且由于以硅通孔电极作为感测装置的外部电性连接路径，而不需进行打线接合制程来形成焊线，因此可有效降低制造成本及缩小感测装置的尺寸，还有利于提供感测装置平坦的感测表面。
再者，在制作感测装置的过程中，暂时性盖板提供保护及支撑的功能，有效防止感测区受到污染而影响感测性能，也避免第一基底产生弯曲或翘曲的问题，以提供有利于使用感测功能的平坦表面。再者，在进行切割制程之前(即，在晶圆级制程期间)而非在进行切割制程之后将暂时性盖板去除，不仅有利于简化制程步骤，还能够降低移除暂时性盖板的制程难度以及进行切割制程的难度。
以上所述仅为本发明较佳实施例，然其并非用以限定本发明的范围，任何熟悉本项技术的人员，在不脱离本发明的精神和范围内，可在此基础上做进一步的改进和变化，因此本发明的保护范围当以本申请的权利要求书所界定的范围为准。

Claims (20)

1.一种感测装置的制造方法，其特征在于，包括：
提供第一基底，其中该第一基底具有第一表面及与该第一表面相对的第二表面，且感测区邻近于该第一表面；
在该第一表面上提供暂时性盖板，以覆盖该感测区；
在该第二表面上形成重布线层，其中该重布线层电性连接至该感测区；
在形成该重布线层之后，去除该暂时性盖板；
在去除该暂时性盖板之后，将该第一基底接合至第二基底及盖板，使得该第一基底位于该第二基底与该盖板之间，其中该重布线层电性连接至该第二基底；以及
在该第二基底与该盖板之间填入封胶层，以环绕该第一基底。
2.根据权利要求1所述的感测装置的制造方法，其特征在于，还包括在形成该重布线层之前，自该第二表面对该第一基底进行薄化制程。
3.根据权利要求1所述的感测装置的制造方法，其特征在于，还包括在去除该暂时性盖板之后进行切割制程。
4.根据权利要求1所述的感测装置的制造方法，其特征在于，还包括形成导电结构，其中该导电结构位于该重布线层与该第二基底之间，且通过该导电结构将该第一基底接合至该第二基底。
5.根据权利要求4所述的感测装置的制造方法，其特征在于，在将该第一基底接合至该第二基底之前，在该重布线层上形成该导电结构。
6.根据权利要求4所述的感测装置的制造方法，其特征在于，在将该第一基底接合至该第二基底之前，在该第二基底上形成该导电结构。
7.根据权利要求1所述的感测装置的制造方法，其特征在于，还包括在将该第一基底接合至该第二基底之后以及在将该第一基底接合至该盖板之前，在该第一基底与该第二基底之间填入底胶层。
8.根据权利要求7所述的感测装置的制造方法，其特征在于，该封胶层还环绕该底胶层。
9.根据权利要求1所述的感测装置的制造方法，其特征在于，通过粘着层将该第一基底接合至该盖板。
10.根据权利要求1所述的感测装置的制造方法，其特征在于，该感测区用以感测生物特征。
11.根据权利要求1所述的感测装置的制造方法，其特征在于，该感测区用于指纹辨识。
12.一种感测装置，其特征在于，包括：
第一基底及第二基底；
盖板，其中该第一基底位于该第二基底与该盖板之间；
感测区，其中该感测区邻近于该第一基底面向该盖板的表面；
重布线层，其中该重布线层位于该第一基底与该第二基底之间，且该重布线层电性连接至该感测区及该第二基底；
底胶层，其中该底胶层位于该重布线层与该第二基底之间；以及
封胶层，其中该封胶层环绕该第一基底及该底胶层。
13.根据权利要求12所述的感测装置，其特征在于，该盖板为非透明的。
14.根据权利要求12所述的感测装置，其特征在于，该盖板包括蓝宝石材料。
15.根据权利要求12所述的感测装置，其特征在于，还包括导电结构，其中该导电结构位于该重布线层与该第二基底之间，且被该底胶层所环绕。
16.根据权利要求12所述的感测装置，其特征在于，还包括粘着层，其中该粘着层位于该第一基底与该盖板之间，且该粘着层包括高介电常数材料。
17.根据权利要求16所述的感测装置，其特征在于，该封胶层还环绕该粘着层。
18.根据权利要求12所述的感测装置，其特征在于，该感测区包括感测生物特征的元件。
19.根据权利要求12所述的感测装置，其特征在于，该感测区包括指纹辨识元件。
20.一种感测装置，其特征在于，包括：
基底，其中该基底具有第一表面及与该第一表面相对的第二表面；
支撑基底，其中该基底承载于该支撑基底上；
多个感测区，其中该多个感测区邻近于该第一表面，且用以感测生物特征；
多个导电结构，其中该多个导电结构位于该第二表面，且电性连接至对应的该多个感测区，且该多个导电结构彼此电性绝缘；以及
沟槽，其中该沟槽延伸于该多个感测区之间及该多个导电结构之间，且露出该支撑基底。
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