CN106449757A - 一种SiC基沟槽型场效应晶体管及其制备方法 - Google Patents
一种SiC基沟槽型场效应晶体管及其制备方法 Download PDFInfo
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- CN106449757A CN106449757A CN201610859254.8A CN201610859254A CN106449757A CN 106449757 A CN106449757 A CN 106449757A CN 201610859254 A CN201610859254 A CN 201610859254A CN 106449757 A CN106449757 A CN 106449757A
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- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
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Priority Applications (1)
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CN201610859254.8A CN106449757B (zh) | 2016-09-28 | 2016-09-28 | 一种SiC基沟槽型场效应晶体管及其制备方法 |
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CN201610859254.8A CN106449757B (zh) | 2016-09-28 | 2016-09-28 | 一种SiC基沟槽型场效应晶体管及其制备方法 |
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109119462A (zh) * | 2018-08-29 | 2019-01-01 | 电子科技大学 | 一种碳化硅沟槽mos器件 |
CN109698237A (zh) * | 2017-10-23 | 2019-04-30 | 株洲中车时代电气股份有限公司 | 一种沟槽栅碳化硅mosfet器件及其制造方法 |
CN110047932A (zh) * | 2019-04-16 | 2019-07-23 | 西安电子科技大学 | 具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管及其制作方法 |
CN110047931A (zh) * | 2019-04-16 | 2019-07-23 | 西安电子科技大学 | 碳化硅平面垂直型场效应晶体管及其制作方法 |
CN108417617B (zh) * | 2018-02-27 | 2020-12-15 | 中国科学院半导体研究所 | 碳化硅沟槽型MOSFETs及其制备方法 |
CN114188213A (zh) * | 2021-12-06 | 2022-03-15 | 上海稷以科技有限公司 | 一种解决碳化硅晶圆传送失效的方法 |
WO2022111160A1 (zh) * | 2020-11-27 | 2022-06-02 | 株洲中车时代半导体有限公司 | 碳化硅器件的元胞结构、其制备方法及碳化硅器件 |
CN116110957A (zh) * | 2023-04-17 | 2023-05-12 | 深圳平创半导体有限公司 | 一种SiC多级阶梯分裂栅沟槽MOSFET器件及其制作方法 |
CN116387348A (zh) * | 2023-04-27 | 2023-07-04 | 南京第三代半导体技术创新中心有限公司 | 一种精确控制短沟道的平面型SiC MOSFET及其制造方法 |
WO2023130798A1 (zh) * | 2022-01-04 | 2023-07-13 | 湖北九峰山实验室 | 碳化硅mosfet器件及其制作方法 |
Citations (2)
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JP2004363498A (ja) * | 2003-06-06 | 2004-12-24 | Toyota Motor Corp | 電力用半導体装置およびその製造方法 |
CN101093856A (zh) * | 2003-08-05 | 2007-12-26 | 株式会社东芝 | 半导体器件及其制造方法 |
-
2016
- 2016-09-28 CN CN201610859254.8A patent/CN106449757B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2004363498A (ja) * | 2003-06-06 | 2004-12-24 | Toyota Motor Corp | 電力用半導体装置およびその製造方法 |
CN101093856A (zh) * | 2003-08-05 | 2007-12-26 | 株式会社东芝 | 半导体器件及其制造方法 |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109698237A (zh) * | 2017-10-23 | 2019-04-30 | 株洲中车时代电气股份有限公司 | 一种沟槽栅碳化硅mosfet器件及其制造方法 |
CN108417617B (zh) * | 2018-02-27 | 2020-12-15 | 中国科学院半导体研究所 | 碳化硅沟槽型MOSFETs及其制备方法 |
CN109119462A (zh) * | 2018-08-29 | 2019-01-01 | 电子科技大学 | 一种碳化硅沟槽mos器件 |
CN109119462B (zh) * | 2018-08-29 | 2021-10-08 | 电子科技大学 | 一种碳化硅沟槽mos器件 |
CN110047932A (zh) * | 2019-04-16 | 2019-07-23 | 西安电子科技大学 | 具有电荷补偿层和低阻通道的纵向双扩散金属氧化物半导体场效应晶体管及其制作方法 |
CN110047931A (zh) * | 2019-04-16 | 2019-07-23 | 西安电子科技大学 | 碳化硅平面垂直型场效应晶体管及其制作方法 |
WO2022111160A1 (zh) * | 2020-11-27 | 2022-06-02 | 株洲中车时代半导体有限公司 | 碳化硅器件的元胞结构、其制备方法及碳化硅器件 |
CN114188213A (zh) * | 2021-12-06 | 2022-03-15 | 上海稷以科技有限公司 | 一种解决碳化硅晶圆传送失效的方法 |
WO2023130798A1 (zh) * | 2022-01-04 | 2023-07-13 | 湖北九峰山实验室 | 碳化硅mosfet器件及其制作方法 |
CN116110957A (zh) * | 2023-04-17 | 2023-05-12 | 深圳平创半导体有限公司 | 一种SiC多级阶梯分裂栅沟槽MOSFET器件及其制作方法 |
CN116387348A (zh) * | 2023-04-27 | 2023-07-04 | 南京第三代半导体技术创新中心有限公司 | 一种精确控制短沟道的平面型SiC MOSFET及其制造方法 |
CN116387348B (zh) * | 2023-04-27 | 2023-10-27 | 南京第三代半导体技术创新中心有限公司 | 一种精确控制短沟道的平面型SiC MOSFET及其制造方法 |
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