CN105977231A - 复合焊球、半导体封装、半导体装置及制造方法 - Google Patents

复合焊球、半导体封装、半导体装置及制造方法 Download PDF

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Publication number
CN105977231A
CN105977231A CN201510918380.1A CN201510918380A CN105977231A CN 105977231 A CN105977231 A CN 105977231A CN 201510918380 A CN201510918380 A CN 201510918380A CN 105977231 A CN105977231 A CN 105977231A
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China
Prior art keywords
substrate
core
semiconductor
soldered ball
compound
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CN201510918380.1A
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English (en)
Inventor
郑道
许文松
林世钦
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MediaTek Inc
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MediaTek Inc
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Publication of CN105977231A publication Critical patent/CN105977231A/zh
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244—Powders, particles or spheres; Preforms made therefrom
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
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    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262—Sn as the principal constituent
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
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    • B23K35/264—Bi as the principal constituent
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Abstract

本发明实施例提供了一种复合焊球、半导体封装、半导体装置及制造方法，能够防止复合焊球的变形。其中该复合焊球包含：核心，包封层以及阻挡层，该阻挡层设置在该核心与该包封层之间；其中，该阻挡层的熔点高于该核心的熔点，该核心的熔点高于该包封层的熔点。

Description

复合焊球、半导体封装、半导体装置及制造方法
技术领域
本发明涉及半导体领域，尤其涉及一种复合焊球，使用该复合焊球的半导体封装，使用该复合焊球的半导体装置以及该半导体封装的制造方法。
背景技术
在电子工业中，具有高性能的高集成度和多功能成为新产品的基本。与此同时，由于制造成本正比于产品的尺寸，因此高集成度可能导致更高的制造成本。因此，对集成电路(Integrated Circuit，IC)封装的小型化的需求已变得越来越关键。
由于封装上封装(Package-on-Package，PoP)是单个封装中的高密度系统集成的划算的解决方案，因此封装上封装是目前发展最快的半导体封装技术。在封装上封装结构中，各种各样的封装集成在单个半导体封装中以降低尺寸。相应地，存在提供一种半导体封装来克服或者至少降低上述问题的需要。
因此，在增加3D图形处理电路的性能的同时，降低电子功率的消耗以及延长移动设备的运行时间是重要的。
发明内容
有鉴于此，本发明实施例提供了一种复合焊球、半导体封装、半导体装置及制造方法，能够防止该复合焊球变形。
本发明提供了一种复合焊球，包含：核心；包封层；以及阻挡层，设置在该核心与该包封层之间；其中，该阻挡层的熔点高于该核心的熔点，该核心的熔点高于该包封层的熔点。
其中，该包封层的外径的长度介于120μm～130μm之间。
其中，该核心由锡、铋或者它们的组合制成。
其中，该核心由不含铜的材料制成。
其中，该包封层由含锡、银和铜中的至少两种的合金材料制成。
本发明提供了一种半导体封装，包含：第一基底；第二基底；如上所述的复合焊球，该复合焊球设置在该第一基底和该第二基底之间，用以电性连接该第一基底和该第二基底；以及第一半导体组件，设置在该第一基底和该第二基底之间。
其中，该第二基底为插入层。
本发明提供了一种半导体装置，包含：如上所述的半导体封装；以及第二半导体组件，设置在该半导体封装中的该第二基底之上。
其中，该第二基底为插入层。
其中，该第二半导体组件为内存装置。
本发明提供了一种半导体封装的制造方法，包含：提供第一基底；在该第一基底上设置第一半导体组件；提供第二基底；在该第二基底上设置多个如上所述的复合焊球；以该复合焊球面向该第一基底的方式，连接该第一基底和该第二基底，其中，该复合焊球设置在该第一基底和该第二基底之间。
其中，该第二基底为插入层。
本发明实施例的有益效果是：
本发明实施例的复合焊球，其中核心的熔点高于包封层的熔点，而阻挡层的熔点又高于该核心的熔点。因此可以在回流工艺期间，阻止核心熔化和变形，从而防止复合焊球变形。
附图说明
图1示出了根据本发明实施例的半导体封装的示意图。
图2示出了根据本发明另一实施例的半导体封装的示意图。
图3示出了根据本发明另一实施例的半导体装置的示意图。
图4A至图4F示出了图1的半导体封装的制造过程的示意图。
图5示出了图2的半导体封装的制造过程的示意图。
具体实施方式
为了使本发明所解决的技术问题、技术方案及有益效果更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
在本申请说明书及权利要求当中使用了某些词汇来指称特定的组件。本领域技术人员应可理解，硬件制造商可能会用不同的名词来称呼同一个组件。本说明书及权利要求并不以名称的差异作为区分组件的方式，而是以组件在功能上的差异作为区分的准则。在通篇说明书及权利要求当中所提及的“包括”、“包含”为一开放式的用语，故应解释成“包括(含)但不限定于”。另外，“耦接”一词在此为包括任何直接及间接的电气连接手段。因此，若文中描述第一装置耦接于第二装置，则代表该第一装置可直接电气连接至该第二装置，或透过其它装置或连接手段间接地电气连接至该第二装置。
图1示出了根据本发明实施例的半导体封装100的示意图。该半导体封装100包括：第一基底110、第二基底120、第一半导体组件130、多个复合焊球(composite solder ball)140、封装体150和多个导电接触结构(conductive contact)160。
第一基底110例如为多层无核心基底。该第一基底110包括：多个接垫111，用于电性连接至复合焊球140。该第二基底120例如为插入层。
该第一半导体组件130可以通过导电接触结构131设置在第一基底110之上并电性连接至第一基底110。第二基底120可以通过复合焊球140和第一基底110电性连接至第一半导体组件130。
在本实施例中，第一半导体组件130以面向下(face-down)的方向耦接至第一基底110的上表面110u并且经由多个导电接触结构131电性连接至第一基底110。此种配置有时被称为“倒装芯片”。导电接触结构131可以是焊球、导电柱，等等。
在其他实施例中，第一半导体组件130以面向上(face-up)的方向耦接至第一基底110，并经由多个导电接合线(未示出)电性连接至第一基底110。第一半导体组件130可以是主动芯片或者被动组件，例如电阻器、电感器或电容器。在另一实施例中，第一半导体组件130的数量可以是几个。
每个复合焊球140包括：核心141、阻挡层(barrier layer)142和包封层(encapsulating layer)143。阻挡层142设置在核心141和包封层143之间。例如，阻挡层142直接或间接地包覆核心141，以及包封层143直接或间接地包覆阻挡层142。
核心141的熔点可以高于包封层143的熔点，如此可以在回流(reflow)工艺期间，阻止核心141熔化和变形，从而防止复合焊球140变形。如此，可能阻止核心141的外径D1扩大，以及相应地相邻两个复合焊球140之间的最小间隔P1不会变窄，如此相邻两个复合焊球140可以避免互相电性短路，并且可以增加复合焊球140的密度。
在一个实施例中，核心141可以由含锡、铋或者它们的组合的材料制成。在另一个实施例中，核心141可以由不含铜的材料制成。因此，核心141的外径D1可以降低，从而包封核心141的包封层143的外径D2可以降低以及/或半导体封装100的厚度可以降低。在一个实施例中，在回流之后，包封层143具有介于120μm～130μm之间的外径D2。
另外，阻挡层142的熔点可以高于核心141的熔点，从而阻挡层142可以限制核心141的外径D1，以及相应地可以阻止核心141在回流工艺期间过变形(over-deforming)。另外，由于阻挡层142可以限制核心141的外径D1，因此核心141可以由硬度(hardness)和/或强度(strength)低于阻挡层142的硬度和/或强度的材料制成。例如，阻挡层142可以由含镍的材料制成，其中该含镍的材料之硬度和/或强度大于核心141的硬度和/或强度。
另外，包封层143可以是预焊接。在如此设计下，半导体封装100可以省略额外的预应用在第一基底110和/或第二基底120上的预焊接。在一个实施例中，包封层143可以由含锡、银和铜中至少两者的合金材料制成。
封装体150形成在第一基底110和第二基底120之间，并且包封第一半导体组件130和复合焊球140。
封装体150例如可以包括：酚醛基树脂(Novolac-based resin)、环氧基树脂(epoxy-based resin)、硅基树脂(silicone-based resin)或者另一合适的包封材料。合适的填充物也可以被包含，例如粉状的SiO2。
导电接触结构160可以设置在第一基底110的底面110b之上。半导体封装100设置在外部电路上并且电性连接至该外部电路，例如电路板。导电接触结构160可以是焊球、导电柱，等等。
图2示出了根据本发明另一实施例的半导体封装200的结构示意图。半导体封装200包括：第一基底110、第二基底120、第一半导体组件130、复合焊球140、底部填充物250和多个导电接触结构160。
底部填充物250形成在第一半导体组件130和第一基底110之间，并且包封第一半导体组件130的多个导电接触结构131。
在本发明中，半导体封装200省略了封装体150。在另一实施例中，半导体封装200可以进一步包括：封装体150，用于包封第一半导体组件130、复合焊球140和底部填充物250。
图3示出了根据本发明另一实施例的半导体装置300的示意图。该半导体装置300包括：半导体封装100以及第二半导组件360。第二半导体组件360例如是内存、非内存的半导体组件、另一半导体封装、主动组件、被动组件，等等。第二半导体组件360通过多个导电接触结构361设置在半导体封装100的第二基底120之上，并且电性连接至该第二基底120。导电接触结构361可以是焊球、柱，等等。
图4A至图4F示出了图1的半导体封装100的制造过程的示意图。
参考图4A，提供了第一基底110。
参考图4B，例如使用表面安装技术(surface mount technology，SMT)将第一半导体组件130设置在第一基底110上。
参考图4C，提供了第二基底120。
参考图4D，例如使用球安装技术(ball mounting technology)将多个复合焊球140设置在第二基底120上。每个复合焊球140包括：核心141、阻挡层142和包封层143。阻挡层142设置在核心141和包封层143之间。例如，阻挡层142直接或间接包封核心141，以及包封层143直接或间接地包封阻挡层142。
参考图4E，通过复合焊球140面向第一基底110的方式将第一基底110连接至第二基底120，其中复合焊球140设置在第一基底110和第二基底120之间，以电性连接第一基底110和第二基底120。
在回流工艺之后，复合焊球140的包封层143熔化以与第一基底110的接垫111焊接。由于核心141的熔点高于包封层143的熔点，所以回流温度可以足够高。例如，回流温度可以达到245℃或者更高，从而包封层143可以牢固地形成在第一基底110的接垫111之上，并且可以阻止核心141熔化和/或过变形。在另一实施例中，回流温度可以接近或超过核心141的熔点。
另外，阻挡层142的熔点大于核心141的熔点，如此，在回流工艺期间，阻挡层142可以限制核心141的外径D1并且相应地阻止核心141过变形。
参考图4F，封装体150设置在第一基底110的上表面110u上并且包封第一半导体组件130。封装体150可以由各种各样的封装技术所形成，例如压缩成型(compression molding)、射出成型(injection molding)、注塑成型(transfermolding)或者点胶技术。
然后，图1的导电接触结构160可以设置在图1的第一基底110的底面110b，以便于形成图1所示的半导体封装100。
图5示出了图2的半导体封装200的制造过程的示意图。底部填充物250例如使用点胶技术形成于第一基底110和第一半导体组件130之间，并且包封导电接触结构131。另外，半导体封装200的其它形成步骤类似于图1的半导体封装100的对应步骤，并且不再重复类似的步骤。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (12)

1.一种复合焊球，其特征在于，包含：
核心；
包封层；以及
阻挡层，设置在该核心与该包封层之间；
其中，该阻挡层的熔点高于该核心的熔点，该核心的熔点高于该包封层的熔点。
2.如权利要求1所述的复合焊球，其特征在于，该包封层的外径的长度介于120μm～130μm之间。
3.如权利要求1所述的复合焊球，其特征在于，该核心由锡、铋或者它们的组合制成。
4.如权利要求1所述的复合焊球，其特征在于，该核心由不含铜的材料制成。
5.如权利要求1所述的复合焊球，其特征在于，该包封层由含锡、银和铜中的至少两种的合金材料制成。
6.一种半导体封装，其特征在于，包含：
第一基底；
第二基底；
如权利要求1～5中任一项所述的复合焊球，该复合焊球设置在该第一基底和该第二基底之间，用以电性连接该第一基底和该第二基底；以及
第一半导体组件，设置在该第一基底和该第二基底之间。
7.如权利要求6所述的半导体封装，其特征在于，该第二基底为插入层。
8.一种半导体装置，其特征在于，包含：
如权利要求6所述的半导体封装；以及
第二半导体组件，设置在该半导体封装中的该第二基底之上。
9.如权利要求8所述的半导体装置，其特征在于，该第二基底为插入层。
10.如权利要求8所述的半导体装置，其特征在于，该第二半导体组件为内存装置。
11.一种半导体封装的制造方法，其特征在于，包含：
提供第一基底；
在该第一基底上设置第一半导体组件；
提供第二基底；
在该第二基底上设置多个如权利要求1～5中任一项所述的复合焊球；
以该复合焊球面向该第一基底的方式，连接该第一基底和该第二基底，其中，该复合焊球设置在该第一基底和该第二基底之间。
12.如权利要求11所述的制造方法，其特征在于，该第二基底为插入层。
CN201510918380.1A 2015-03-13 2015-12-10 复合焊球、半导体封装、半导体装置及制造方法 Pending CN105977231A (zh)

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