CN105930287B - A kind of microcontroller super large data external memory expansion system and its control method - Google Patents
A kind of microcontroller super large data external memory expansion system and its control method Download PDFInfo
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- CN105930287B CN105930287B CN201610254749.8A CN201610254749A CN105930287B CN 105930287 B CN105930287 B CN 105930287B CN 201610254749 A CN201610254749 A CN 201610254749A CN 105930287 B CN105930287 B CN 105930287B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
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Abstract
The invention discloses a kind of microcontroller super large data external memory expansion system and its control methods, system includes 1 microcontroller, multiple first decoders, multiple expansion I/O mouth chips, multiple second decoders and multiple memories, each memory with the address of microcontroller, data and control bus is connected, the address bus of the input terminal connection microcontroller of each first decoder, the output end of first decoder connects the Enable Pin of each expansion I/O mouth chip, the input terminal of each expansion I/O mouth chip is connected with the data/address bus of microcontroller, each expansion I/O mouth chip is corresponded with each second decoder, the input terminal of each second decoder is connected with the output end of corresponding expansion I/O mouth chip, the output end of each second decoder is connected with the chip select terminal mouth of each memory respectively.The present invention breaches the capacity limit of conventional Extension method, meets the real time access demand of vast capacity.
Description
Technical field
The invention belongs to microcontroller technical field of memory, more particularly to a kind of microcontroller super large data external memory expansion system
And its control method.
Background technology
With becoming increasingly popular for computer network communication, the structure of computer data memory capacity is more and more important.And MCU
Address pins number but limit the access capability of memory.Therefore, the memory of MCU how is more extended to answer
The storage demand for paying vast capacity, becomes the fervent problem to be solved of people of the technical field.
Existing MCU storages extended method is roughly divided into two kinds at present：
One, access capability is extended by P1, P3 pin of microcontroller, but this method is limited by P1, P3 mouthfuls of quantity
System, the capacity of extension are extremely limited such as common MCS51 microcontrollers, can only at most extend 256*256 memory
（Fully decoded）；And occupy I/O mouthfuls of P1, P3 pins；
Two, by serial ports expansion, such as turn simultaneously chip 74LS164 using string and serial data is converted into parallel port data, even
Meet the CS of each memory（Piece selects）Pin, to realize extension, but the drawbacks of this method is the more of extension, serial ports hair
The time sent is longer, and real-time is bad, and occupies the serial ports of MCU, increases difficulty and cost..
Invention content
In order to solve the technical issues of above-mentioned background technology proposes, the present invention is intended to provide outside a kind of microcontroller super large data
Expansion system and its control method are deposited, the capacity limit of conventional Extension method is broken through, meets the real time access demand of vast capacity.
In order to achieve the above technical purposes, the technical scheme is that：
A kind of microcontroller super large data external memory expansion system, including 1 microcontroller, multiple first decoders, multiple extensions
I/O mouthfuls of chips, multiple second decoders and multiple memories, each memory are total with the address of microcontroller, data and control
Line is connected, and the address bus of the input terminal connection microcontroller of each first decoder, the output end of the first decoder connects each extension
The input terminal of the Enable Pin of I/O mouthfuls of chips, each expansion I/O mouth chip is connected with the data/address bus of microcontroller, each expansion I/O mouth core
Piece is corresponded with each second decoder, the output end phase of the input terminal of each second decoder and corresponding expansion I/O mouth chip
Even, the output end of each second decoder is connected with the chip select terminal mouth of each memory respectively.
Wherein, the expansion I/O mouth chip uses 74LS373 chips.
Wherein, first decoder, the second decoder are all made of 74LS138 chips.
Wherein, the memory can be ROM, or RAM.
The invention also includes the control methods based on above-mentioned microcontroller super large data external memory expansion system, including following step
Suddenly：
（1）Microcontroller enables each expansion I/O mouth chip by the first decoder；
（2）Data are written to enabled expansion I/O mouth chip in microcontroller；
（3）It, will after the second decoder carries out fully decoded using the output data of expansion I/O mouth chip as high address
The output data of expansion I/O mouth chip is converted into the chip selection signal of each memory, to gate respective memory；
（4）The instruction that microcontroller accesses external memory by standard carries out data access to the memory of gating；
（5）In next storage cycle, if the memory into line access is constant, step is directly executed（4）, stored when changing
When device, then return to step（1）Again expansion I/O mouth chip is enabled.
The advantageous effect brought using above-mentioned technical proposal：
（1）The present invention is determined by increasing I/O mouthfuls of extended chips come extension storage capacity according to the I/O of extension mouth quantity
The memory capacity of extension breaches the capacity limit being extended using the P1 mouths of common 51 microcontroller（256）；
（2）The present invention need not occupy the serial ports of microcontroller compared with serial ports expansion, and the real-time of serial ports expansion can be with
The increase of extension and reduce, and the present invention switches selected memory by write instruction, when memory is constant, does not need
Write instruction selects memory again, is directly accessed, improves the efficiency of access；
（3）External memory extended method using the present invention, the I/O address of extension and each memory are overlappings, are being selected
In each extend I/O when, all choose the appropriate address of each memory simultaneously.If memory is RAM, overlapping space is just not
Data can be used to store, waste point space, and whole memory space is discontinuous；It is only if memory is ROM
Read, and extend I/O only write, be mutually independent of each other, this space that partly overlaps is can to use, can't wasting space,
But whole memory space is still discontinuous.The theory of the present invention is exactly to sacrifice few overlapping space, and exchange for huge
Memory space, be particularly suitable for not needing Coutinuous store space but to the very high field of storage capacity requirement and occasion.
Description of the drawings
Fig. 1 is the block diagram of system of the present invention.
Specific implementation mode
Below with reference to attached drawing, technical scheme of the present invention is described in detail.
The block diagram of system of the present invention as shown in Figure 1, a kind of microcontroller super large data external memory expansion system, including 1
Microcontroller, multiple first decoders, multiple expansion I/O mouth chips, multiple second decoders and multiple memories, each memory
It is connected with the address of microcontroller, data and control bus, the address bus of the input terminal connection microcontroller of each first decoder,
The output end of first decoder connects the Enable Pin of each expansion I/O mouth chip, the input terminal and microcontroller of each expansion I/O mouth chip
Data/address bus be connected, each expansion I/O mouth chip and each second decoder correspond, the input terminal of each second decoder with it is right
The output end of the expansion I/O mouth chip answered is connected, the output end of each second decoder respectively with the chip select terminal mouth phase of each memory
Even.
In the present embodiment, the expansion I/O mouth chip uses 74LS373 chips.
In the present embodiment, first decoder, the second decoder are all made of 74LS138 chips.Wherein first decoding
Device is I/O mouthfuls multiple for extending, and determines the address of the I/O of extension, the data for the I/O mouths output that the second decoder is used to extend
Fully decoded is carried out, realizes the piece choosing of memory.
In the present embodiment, the memory can be ROM, or RAM.
The invention also includes the control methods based on above-mentioned microcontroller super large data external memory expansion system, including following step
Suddenly：
（1）Microcontroller enables each expansion I/O mouth chip by the first decoder；
（2）Data are written to enabled expansion I/O mouth chip in microcontroller；
（3）It, will after the second decoder carries out fully decoded using the output data of expansion I/O mouth chip as high address
The output data of expansion I/O mouth chip is converted into the chip selection signal of each memory, to gate respective memory；
（4）The instruction that microcontroller accesses external memory by standard carries out data access to the memory of gating；
（5）In next storage cycle, if the memory into line access is constant, step is directly executed（4）, stored when changing
When device, then return to step（1）Again expansion I/O mouth chip is enabled.
Above example is merely illustrative of the invention's technical idea, and protection scope of the present invention cannot be limited with this, every
According to technological thought proposed by the present invention, any change done on the basis of technical solution each falls within the scope of the present invention
Within.
Claims (4)
1. a kind of microcontroller super large data external memory expansion system, it is characterised in that：Including 1 microcontroller, multiple first decoders,
Multiple expansion I/O mouth chips, multiple second decoders and multiple memories, each memory with the address of microcontroller, data
It is connected with controlling bus, the address bus of the input terminal connection microcontroller of each first decoder, the output end of the first decoder connects
The Enable Pin of each expansion I/O mouth chip is connect, the input terminal of each expansion I/O mouth chip is connected with the data/address bus of microcontroller, each to expand
I/O mouthfuls of chips of exhibition are corresponded with each second decoder, the input terminal of each second decoder and corresponding expansion I/O mouth chip
Output end is connected, and the output end of each second decoder is connected with the chip select terminal mouth of each memory respectively；The microcontroller super large data
The control method of external memory expansion system includes the following steps：
(1) microcontroller enables each expansion I/O mouth chip by the first decoder；
(2) data are written to enabled expansion I/O mouth chip in microcontroller；
(3) it will be extended after the second decoder carries out fully decoded using the output data of expansion I/O mouth chip as high address
The output data of I/O mouthfuls of chips is converted into the chip selection signal of each memory, to gate respective memory；
(4) microcontroller carries out data access by the instruction of standard access external memory to the memory of gating；
(5) in next storage cycle, if the memory into line access is constant, step (4) is directly executed, when change memory
When, then return to step (1) enables expansion I/O mouth chip again；
The I/O address of extension is Chong Die with each memory, when choosing the I/O of each extension, is all chosen simultaneously each
The appropriate address of memory, when memory is read-only, and the I/O extended only writes, and is mutually independent of each other, overlapping space energy
Enough it is utilized.
2. a kind of microcontroller super large data external memory expansion system according to claim 1, it is characterised in that：The expansion I/O
Mouth chip uses 74LS373 chips.
3. a kind of microcontroller super large data external memory expansion system according to claim 1, it is characterised in that：First decoding
Device, the second decoder are all made of 74LS138 chips.
4. a kind of microcontroller super large data external memory expansion system according to claim 1, it is characterised in that：The memory
Type is ROM or RAM.
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| CN201610254749.8A CN105930287B (en) | 2016-04-22 | 2016-04-22 | A kind of microcontroller super large data external memory expansion system and its control method |
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| CN105930287B true CN105930287B (en) | 2018-07-24 |
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| CN110989942B (en) * | 2019-12-30 | 2024-05-14 | 南京信息工程大学滨江学院 | Data storage expansion interface system and control method thereof |
| CN111444127B (en) * | 2020-02-26 | 2021-11-26 | 中国电子科技集团公司第二十八研究所 | Data external memory expansion interface |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2189763Y (en) * | 1994-03-22 | 1995-02-15 | 张家跃 | Fire alarm monitored by monolithic processor |
| CN1289984A (en) * | 2000-11-08 | 2001-04-04 | 叶建华 | Bank CPU card POS |
| CN2873718Y (en) * | 2006-02-14 | 2007-02-28 | 中国矿业大学 | Anti-falling device brake performance detector |
-
2016
- 2016-04-22 CN CN201610254749.8A patent/CN105930287B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2189763Y (en) * | 1994-03-22 | 1995-02-15 | 张家跃 | Fire alarm monitored by monolithic processor |
| CN1289984A (en) * | 2000-11-08 | 2001-04-04 | 叶建华 | Bank CPU card POS |
| CN2873718Y (en) * | 2006-02-14 | 2007-02-28 | 中国矿业大学 | Anti-falling device brake performance detector |
Non-Patent Citations (3)
| Title |
|---|
| 8031单片机I/O接口的扩展方法;马巨峰等;《工业仪表与自动化装置》;19910302(第1期);第27-29页 * |
| MCS-51单片机扩展大量高速并行接口的低成本实现;邹燕秋等;《中国科技信息》;20081015(第20期);第128-129页 * |
| 单片机多I/O口线的实用扩展电路;麻伟忠等;《电子世界》;19971231(第12期);第18-19页 * |
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