CN103309626A - Method for realizing multi-read-write port memorizer of network chip and corresponding memorizer - Google Patents
Method for realizing multi-read-write port memorizer of network chip and corresponding memorizer Download PDFInfo
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Abstract
The invention discloses a method for realizing a multi-read-write port memorizer of a network chip and a corresponding memorizer. The method comprises the following steps: a memory array is configured for each write port, wherein the memory array comprises at least one basic memory unit; the basic memory unit is composed of two single-port memorizers; the single-port memorizers are configured as follows: at the same time, one of the single-port memorizers is used for performing read operation, and the other single-port memorizer is used for performing write operation; at least one write data indication unit is configured to record the memory location of the valid data written in the basic memory unit by the write port. The method can flexibly build the multi-read-write port memorizer based on the single-port memorizer; the usage method is flexile; the memorizer is suitable for application scenarios of different multi-port memorizers. The signal-port memorizer of high density and low power dissipation is utilized to replace a decentralized register, so that the advantages of low power dissipation and smaller area of the chip are achieved.
Description
Technical field
The present invention relates to network communication field, relate in particular to a kind of method and corresponding mutiread write port storer of realizing network chip mutiread write port storer.
Background technology
In present chip, often to use storer and come store various kinds of data; And in the high bandwidth network chip design, then need to use mutiread write port storer to satisfy the performance requirement of tabling look-up of high bandwidth network flow.
The tradition multiport memory uses register to build out, and each bit of storer needs a register to preserve data, and corresponding is a large amount of read-write steering logics with it, is illustrated in fig. 1 shown below, and is the synoptic diagram of traditional multiport memory.Along with the increase of memory span, the also corresponding increase of the register quantity of use; Along with the increase of read-write interface quantity, the read-write steering logic of coupling is corresponding increasing also.The multiport memory area of Shi Xianing is big like this, the power consumption height.Storer is as an important component part of chip, and this can increase power consumption and the cost of chip greatly.
Summary of the invention
The object of the present invention is to provide a kind of method that realizes network chip mutiread write port storer.
Correspondingly, the present invention also aims to provide a kind of network chip mutiread write port storer corresponding with said method.
One of for achieving the above object, the technical solution used in the present invention is as follows:
A kind of method that realizes network chip mutiread write port storer, this method comprises the steps: to dispose a storage array for each write port, wherein, described storage array comprises at least one basic unit of storage, described basic unit of storage is made up of two one-port memories, two one-port memories are configured to: at synchronization, one of them is used for carrying out read operation, and another is used for carrying out write operation;
Dispose at least one and effectively write the data indicating member, write the memory location of the valid data of basic unit of storage with record by write port.
As a further improvement on the present invention, the method for described realization network chip mutiread write port storer also comprises:
Receive read memory request;
Utilize the allocation index of reading of read memory request effectively to write the data indicating member, determine the one-port memory at the valid data place corresponding with reading the address;
Read the valid data in the one-port memory.
As a further improvement on the present invention, the quantity of described basic unit of storage is: the quantity M of the quantity N * read port of write port.
As a further improvement on the present invention, the method for described realization network chip mutiread write port storer also comprises: receive the memory write request from a write port, M basic unit of storage of described write port coupling;
With each basic unit of storage of described write port coupling in carry out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address.
As a further improvement on the present invention, described " carry out write operation in each basic unit of storage, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address " step specifically comprises:
Whether one of them of the one-port memory in each basic unit of storage of inspection current time is just carrying out read operation;
If then another one-port memory in each basic unit of storage is carried out write operation;
If not, then from two one-port memories of each basic unit of storage, select an one-port memory to carry out write operation at random, and, be index with the write address, the numbering of carrying out the one-port memory of write operation is updated to effectively writes the data indicating member.
As a further improvement on the present invention, the method for described realization network chip mutiread write port storer also comprises:
Receive read memory request from a certain read port, N basic unit of storage of described read port coupling;
Carrying out read operation with N basic unit of storage of described read port coupling simultaneously;
Be index to read the address, from effectively writing the numbering under the valid data that the data indicating member obtains to read the address;
With the index that is numbered that obtains, from N basic unit of storage, select final result.
Correspondingly, for realizing above-mentioned another invention order, the technical solution used in the present invention is as follows: described mutiread write port storer comprises:
The storage array that cooperates with each write port; Described storage array comprises at least one basic unit of storage, and described basic unit of storage is made up of two one-port memories, and two one-port memories are used for: at synchronization, one of them is used for carrying out read operation, and another is used for carrying out write operation;
At least one effectively writes the data indicating member, is used for record is write the valid data of basic unit of storage by write port memory location.
As a further improvement on the present invention, the quantity of described basic unit of storage is: the quantity M of the quantity N * read port of write port.
As a further improvement on the present invention, described storer is used for: receive the memory write request from a write port, M basic unit of storage of described write port coupling;
With each basic unit of storage of described write port coupling in carry out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address.
As a further improvement on the present invention, described storer is used for:
Receive read memory request from a certain read port, N basic unit of storage of described read port coupling;
Carrying out read operation with N basic unit of storage of described read port coupling simultaneously;
Be index to read the address, from effectively writing the numbering under the valid data that the data indicating member obtains to read the address;
With the index that is numbered that obtains, from N basic unit of storage, select final result.
Compared with prior art, the invention has the beneficial effects as follows that the present invention is based on the storer that one-port memory can make up the mutiread write port flexibly, using method is flexible, adapts to different multiport memory application scenarioss.Utilize high density, the one-port memory of low-power consumption substitutes the register that disperses, and has low-power consumption, more can save the advantage of area of chip.
Description of drawings
Fig. 1 is the structural representation of existing high broadband network chip;
Fig. 2 is the particular flow sheet of method one embodiment of realization network chip mutiread write port storer of the present invention;
Fig. 3 is the structural representation of basic unit of storage one embodiment of network chip mutiread write port storer of the present invention;
Fig. 4 is the structural representation of network chip mutiread write port storer one embodiment of the present invention.
Embodiment
Describe the present invention below with reference to embodiment shown in the drawings.But these embodiments do not limit the present invention, and the conversion on the structure that those of ordinary skill in the art makes according to these embodiments, method or the function all is included in protection scope of the present invention.
Extremely shown in Figure 4 as Fig. 2, the method for realization mutiread write port storer of the present invention, this method comprises the steps:
For each write port disposes a storage array, wherein, described storage array comprises at least one basic unit of storage, described basic unit of storage is made up of two one-port memories, two one-port memories are configured to: at synchronization, one of them is used for carrying out read operation, and another is used for carrying out write operation;
Dispose at least one and effectively write the data indicating member, write the memory location of the valid data of basic unit of storage with record by write port.
Above-mentioned one-port memory is the one-port memory of high density, low-power consumption.The basic unit of storage that is made up by two one-port memories has a write port and a read port, when needs write data, the data of write port are write in the one-port memory that does not have the read operation visit, and when reading, then from 2 one-port memories, select valid data according to indication, thereby realize that 1 reads 1 storer of writing.Comprise the steps: when particularly, carrying out read operation
(1) receives read memory request;
(2) utilize the allocation index of reading of read memory request effectively to write the data indicating member, determine the one-port memory at the valid data place corresponding with reading the address;
(3) read valid data in the one-port memory.Namely according to the result of step (2), the one-port memory of storage valid data is carried out read operation according to the read operation request, thereby obtains the result of read request.
Comprise the steps: when further, carrying out write operation
(1 ') receives the memory write request from a write port, M basic unit of storage of described write port coupling;
(2 ') with each basic unit of storage of described write port coupling in carry out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address.
About step (2 '), particularly, whether one of them of the one-port memory in each basic unit of storage of inspection current time is just carrying out read operation;
If then another one-port memory in each basic unit of storage is carried out write operation;
If not, then from two one-port memories of each basic unit of storage, select an one-port memory to carry out write operation at random, and, be index with the write address, the numbering of carrying out the one-port memory of write operation is updated to effectively writes the data indicating member.
The multiport memory that makes up comprises N write port and M read port, and the quantity that is used for the basic unit of storage of structure multiport storehouse memorizer is: the quantity M of the quantity N * read port of write port, remember that arbitrary basic unit of storage is i_j, 1_1 then,, 1_2 ... N_M forms a matrix, thereby the summation of element is the number of basic unit of storage in the matrix.
Above-mentioned each write port is corresponding with M basic unit of storage, i.e. write port 1 and 1_1, and 1_2 ..., the represented basic unit of storage of 1_M is corresponding; Write port i and i_1, i_2 ..., the represented basic unit of storage of i_M is corresponding; Write port N and N_1, N_2 ..., the represented basic unit of storage of N_M is corresponding.
Above-mentioned each read port is corresponding with N basic unit of storage, i.e. read port 1 and 1_1, ..., N_1, represented basic unit of storage is corresponding; Read port j and 1_j ..., the represented basic unit of storage of N_j is corresponding; Read port M and 1_M ..., the represented basic unit of storage of N_M is corresponding.
Further, when write port receives the memory write request, the M corresponding with a write port basic unit of storage is all carried out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address, in order to carry out index during follow-up execution read operation.
The method that realizes network chip mutiread write port storer also comprises:
Receive read memory request from a certain read port, N basic unit of storage of described read port coupling;
Carrying out read operation with N basic unit of storage of described read port coupling simultaneously;
Be index to read the address, from effectively writing the numbering under the valid data that the data indicating member obtains to read the address;
With the index that is numbered that obtains, from N basic unit of storage, select final result.
Above-mentioned each basic unit of storage has unique numbering, obtaining the corresponding numbering of valid data by the above-mentioned data indicating member of effectively writing, can determine the corresponding basic unit of storage of corresponding numbering, thereby from corresponding basic unit of storage, select final result.
The present invention also provides the method for a kind of and above-mentioned realization mutiread write port storer the corresponding a little port stores of mutiread, and this storer comprises: the storage array that cooperates with each write port; Described storage array comprises at least one basic unit of storage, and described basic unit of storage is made up of two one-port memories, and two one-port memories are used for: at synchronization, one of them is used for carrying out read operation, and another is used for carrying out write operation.
At least one effectively writes the data indicating member, is used for record is write the valid data of basic unit of storage by write port memory location.
Above-mentioned one-port memory is the one-port memory of high density, low-power consumption, the basic unit of storage that is fundamental construction with two one-port memories has a write port and a read port, when needs write data, the data of write port are write in the one-port memory that does not have the read operation visit, and when reading, then from 2 one-port memories, select valid data according to indication, thereby realize that 1 reads 1 storer of writing.Be that fundamental construction 1 is read 1 storer of writing with two one-port memories, guaranteed that 1 reads 1 storer of writing and has less area, saved the space.
As shown in Figure 4, the quantity of basic unit of storage is: the quantity M of the quantity N * read port of write port.
M * N basic unit of storage is respectively the 1_1 basic unit of storage ..., the 1_M basic unit of storage ..., the N_1 basic unit of storage ..., the N_M basic unit of storage.Thereby, 1_1 ..., 1_M ..., N_1 ..., N_M constitutes a matrix.
Wherein, the storage array that cooperates with write port 1 comprises: the 1_1 basic unit of storage, and the 1_2 basic unit of storage ..., the 1_M basic unit of storage; The storage array that cooperates with write port N comprises: the N_1 basic unit of storage, and the N_2 basic unit of storage ..., the N_M basic unit of storage.Thereby mutiread write port storer has N write port.
Similarly, the storage array that cooperates with read port 1 comprises: the 1_1 basic unit of storage ..., the N_1 basic unit of storage; The storage array that cooperates with read port M comprises: the 1_M basic unit of storage ..., the N_M basic unit of storage.Thereby mutiread write port storer has M read port.
Further, the write operation of storer comprises the steps: to receive the memory write request from a write port, M basic unit of storage of described write port coupling;
With each basic unit of storage of described write port coupling in carry out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address.
The read operation of storer comprises the steps: to receive read memory request from a certain read port, N basic unit of storage of described read port coupling;
Carrying out read operation with N basic unit of storage of described read port coupling simultaneously;
Be index to read the address, from effectively writing the numbering under the valid data that the data indicating member obtains to read the address;
With the index that is numbered that obtains, from N basic unit of storage, select final result.
In sum, the invention has the beneficial effects as follows that the present invention is based on the storer that one-port memory can make up the mutiread write port flexibly, using method is flexible, adapts to different multiport memory application scenarioss.Utilize high density, the one-port memory of low-power consumption substitutes the register that disperses, and has low-power consumption, more can save the advantage of area of chip.
Be to be understood that, though this instructions is described according to embodiment, but be not that each embodiment only comprises an independently technical scheme, this narrating mode of instructions only is for clarity sake, those skilled in the art should make instructions as a whole, technical scheme in each embodiment also can form other embodiments that it will be appreciated by those skilled in the art that through appropriate combination.
Above listed a series of detailed description only is specifying at feasibility embodiment of the present invention; they are not in order to limiting protection scope of the present invention, allly do not break away from equivalent embodiment or the change that skill spirit of the present invention does and all should be included within protection scope of the present invention.
Claims (10)
1. a method that realizes network chip mutiread write port storer is characterized in that this method comprises the steps:
For each write port disposes a storage array, wherein, described storage array comprises at least one basic unit of storage, described basic unit of storage is made up of two one-port memories, two one-port memories are configured to: at synchronization, one of them is used for carrying out read operation, and another is used for carrying out write operation;
Dispose at least one and effectively write the data indicating member, write the memory location of the valid data of basic unit of storage with record by write port.
2. the method for realization network chip mutiread write port storer according to claim 1 is characterized in that, the method for described realization network chip mutiread write port storer also comprises:
Receive read memory request;
Utilize the allocation index of reading of read memory request effectively to write the data indicating member, determine the one-port memory at the valid data place corresponding with reading the address;
Read the valid data in the one-port memory.
3. the method for realization network chip mutiread write port storer according to claim 1 is characterized in that the quantity of described basic unit of storage is: the quantity M of the quantity N * read port of write port.
4. the method for realization network chip mutiread write port storer according to claim 3 is characterized in that, the method for described realization network chip mutiread write port storer also comprises:
Receive the memory write request from a write port, M basic unit of storage of described write port coupling;
With each basic unit of storage of described write port coupling in carry out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address.
5. the method for realization network chip mutiread write port storer according to claim 4, it is characterized in that, described " carry out write operation in each basic unit of storage; and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address " step specifically comprises:
Whether one of them of the one-port memory in each basic unit of storage of inspection current time is just carrying out read operation;
If then another one-port memory in each basic unit of storage is carried out write operation;
If not, then from two one-port memories of each basic unit of storage, select an one-port memory to carry out write operation at random, and, be index with the write address, the numbering of carrying out the one-port memory of write operation is updated to effectively writes the data indicating member.
6. the method for realization network chip mutiread write port storer according to claim 3 is characterized in that, the method for described realization network chip mutiread write port storer also comprises:
Receive read memory request from a certain read port, N basic unit of storage of described read port coupling;
Carrying out read operation with N basic unit of storage of described read port coupling simultaneously;
Be index to read the address, from effectively writing the numbering under the valid data that the data indicating member obtains to read the address;
With the index that is numbered that obtains, from N basic unit of storage, select final result.
7. a network chip mutiread write port storer is characterized in that, described mutiread write port storer comprises:
The storage array that cooperates with each write port; Described storage array comprises at least one basic unit of storage, and described basic unit of storage is made up of two one-port memories, and two one-port memories are used for: at synchronization, one of them is used for carrying out read operation, and another is used for carrying out write operation;
At least one effectively writes the data indicating member, is used for record is write the valid data of basic unit of storage by write port memory location.
8. network chip mutiread write port storer according to claim 7 is characterized in that the quantity of described basic unit of storage is: the quantity M of the quantity N * read port of write port.
9. network chip mutiread write port storer according to claim 8 is characterized in that described storer is used for: receive the memory write request from a write port, M basic unit of storage of described write port coupling;
With each basic unit of storage of described write port coupling in carry out write operation, and be index with the write address, the port numbering of carrying out write operation is updated to effectively writes in the data indicating member corresponding address.
10. a little port stores of network chip mutiread according to claim 8, described storer is used for:
Receive read memory request from a certain read port, N basic unit of storage of described read port coupling;
Carrying out read operation with N basic unit of storage of described read port coupling simultaneously;
Be index to read the address, from effectively writing the numbering under the valid data that the data indicating member obtains to read the address;
With the index that is numbered that obtains, from N basic unit of storage, select final result.
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| CN104409098A (en) * | 2014-12-05 | 2015-03-11 | 盛科网络（苏州）有限公司 | Chip internal table item with double capacity and implementation method thereof |
| CN104484129A (en) * | 2014-12-05 | 2015-04-01 | 盛科网络（苏州）有限公司 | One-read and one-write memory, multi-read and multi-write memory and read and write methods for memories |
| CN104484128A (en) * | 2014-11-27 | 2015-04-01 | 盛科网络（苏州）有限公司 | Read-once and write-once storage based read-more and write more storage and implementation method thereof |
| CN106297861A (en) * | 2016-07-28 | 2017-01-04 | 盛科网络（苏州）有限公司 | The data processing method of extendible multiport memory and data handling system |
| CN106375249A (en) * | 2016-09-22 | 2017-02-01 | 盛科网络（苏州）有限公司 | Switching chip data structure, control method and control system thereof |
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| CN104484129A (en) * | 2014-12-05 | 2015-04-01 | 盛科网络（苏州）有限公司 | One-read and one-write memory, multi-read and multi-write memory and read and write methods for memories |
| CN104409098A (en) * | 2014-12-05 | 2015-03-11 | 盛科网络（苏州）有限公司 | Chip internal table item with double capacity and implementation method thereof |
| CN106445831A (en) * | 2015-08-11 | 2017-02-22 | 深圳市中兴微电子技术有限公司 | Storage unit and processing system |
| WO2018018875A1 (en) * | 2016-07-28 | 2018-02-01 | 盛科网络（苏州）有限公司 | Data processing method and data processing system for extensible multi-port memory |
| CN106297861A (en) * | 2016-07-28 | 2017-01-04 | 盛科网络（苏州）有限公司 | The data processing method of extendible multiport memory and data handling system |
| CN106297861B (en) * | 2016-07-28 | 2019-02-22 | 盛科网络（苏州）有限公司 | The data processing method and data processing system of expansible multiport memory |
| US10754584B2 (en) | 2016-07-28 | 2020-08-25 | Centec Networks (Su Zhou) Co., Ltd. | Data processing method and system for 2R1W memory |
| US10818325B2 (en) | 2016-07-28 | 2020-10-27 | Centec Networks (Su Zhou) Co., Ltd. | Data processing method and data processing system for scalable multi-port memory |
| CN106375249A (en) * | 2016-09-22 | 2017-02-01 | 盛科网络（苏州）有限公司 | Switching chip data structure, control method and control system thereof |
| CN106375249B (en) * | 2016-09-22 | 2019-10-01 | 盛科网络（苏州）有限公司 | The control method and control system of exchange chip |
| CN109446127A (en) * | 2018-02-27 | 2019-03-08 | 上海安路信息科技有限公司 | A kind of physics BRAM matching process |
| CN109446127B (en) * | 2018-02-27 | 2020-03-24 | 上海安路信息科技有限公司 | Physical BRAM matching method |
| CN115561622A (en) * | 2022-10-14 | 2023-01-03 | 安测半导体技术(江苏)有限公司 | Method and system for writing unique ID in chip test |
| CN115561622B (en) * | 2022-10-14 | 2023-10-03 | 安测半导体技术(江苏)有限公司 | Method and system for writing unique ID in chip test |
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Application publication date: 20130918 |