CN102789424B - External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA - Google Patents
External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA Download PDFInfo
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- CN102789424B CN102789424B CN201210244513.8A CN201210244513A CN102789424B CN 102789424 B CN102789424 B CN 102789424B CN 201210244513 A CN201210244513 A CN 201210244513A CN 102789424 B CN102789424 B CN 102789424B
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CN201210244513.8A CN102789424B (en) | 2012-07-16 | 2012-07-16 | External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA |
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CN102789424B true CN102789424B (en) | 2014-12-10 |
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Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN108777774A (en) * | 2018-06-13 | 2018-11-09 | 贵州大学 | A kind of four-way video conversion circuit and conversion method based on FPGA |
CN108958800B (en) * | 2018-06-15 | 2020-09-15 | 中国电子科技集团公司第五十二研究所 | DDR management control system based on FPGA hardware acceleration |
CN109446134A (en) * | 2018-09-18 | 2019-03-08 | 天津大学 | A kind of USB high-speed interface based on FPGA |
JP2020198577A (en) * | 2019-06-04 | 2020-12-10 | キオクシア株式会社 | Memory system |
CN110347621B (en) * | 2019-06-24 | 2020-09-29 | 广东高云半导体科技股份有限公司 | FPGA connected with PSRAM memory and storage system |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN1870593A (en) * | 2006-04-12 | 2006-11-29 | 杭州华为三康技术有限公司 | Method and device of read-write buffer storage location based on field programable logical array |
CN102012791A (en) * | 2010-10-15 | 2011-04-13 | 中国人民解放军国防科学技术大学 | Flash based PCIE (peripheral component interface express) board for data storage |
CN102053936A (en) * | 2010-12-15 | 2011-05-11 | 北京北方烽火科技有限公司 | Method and device for FPGA (field programmable gate array) to communicate with DSP (digital signal processor) via DDR2 (double data rate 2) interface |
CN102141971A (en) * | 2011-01-13 | 2011-08-03 | 哈尔滨工业大学 | 1553B hardware timed communication module with high-capacity storage function |
CN102567944A (en) * | 2012-03-09 | 2012-07-11 | 中国人民解放军信息工程大学 | Computed tomography (CT) image reconstruction hardware accelerating method based on field programmable gate array (FPGA) |
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JP2008541217A (en) * | 2005-05-04 | 2008-11-20 | エヌエックスピー ビー ヴィ | Memory controller, memory access control method, and system including memory controller |
CN101185580A (en) * | 2006-11-15 | 2008-05-28 | 深圳迈瑞生物医疗电子股份有限公司 | Method and apparatus for gathering ultrasonic diagnosis system high-speed radio-frequency echo wave data |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN1870593A (en) * | 2006-04-12 | 2006-11-29 | 杭州华为三康技术有限公司 | Method and device of read-write buffer storage location based on field programable logical array |
CN102012791A (en) * | 2010-10-15 | 2011-04-13 | 中国人民解放军国防科学技术大学 | Flash based PCIE (peripheral component interface express) board for data storage |
CN102053936A (en) * | 2010-12-15 | 2011-05-11 | 北京北方烽火科技有限公司 | Method and device for FPGA (field programmable gate array) to communicate with DSP (digital signal processor) via DDR2 (double data rate 2) interface |
CN102141971A (en) * | 2011-01-13 | 2011-08-03 | 哈尔滨工业大学 | 1553B hardware timed communication module with high-capacity storage function |
CN102567944A (en) * | 2012-03-09 | 2012-07-11 | 中国人民解放军信息工程大学 | Computed tomography (CT) image reconstruction hardware accelerating method based on field programmable gate array (FPGA) |
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Denomination of invention: The read and write method of external DDR2 based on FPGA and external DDR2 granular memory based on FPGA Effective date of registration: 20230106 Granted publication date: 20141210 Pledgee: Industrial Bank Co.,Ltd. Harbin Branch Pledgor: Harbin nuoxin measurement and Control Technology Co.,Ltd. Registration number: Y2023230000007 |
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Denomination of invention: FPGA based read and write method for external expansion DDR2 and FPGA based external expansion DDR2 granular memory Granted publication date: 20141210 Pledgee: Industrial Bank Co.,Ltd. Harbin Branch Pledgor: Harbin nuoxin measurement and Control Technology Co.,Ltd. Registration number: Y2024230000016 |
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