CN101866695B - Method for Nandflash USB controller to read and write Norflash memory - Google Patents
Method for Nandflash USB controller to read and write Norflash memory Download PDFInfo
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- CN101866695B CN101866695B CN 201010204002 CN201010204002A CN101866695B CN 101866695 B CN101866695 B CN 101866695B CN 201010204002 CN201010204002 CN 201010204002 CN 201010204002 A CN201010204002 A CN 201010204002A CN 101866695 B CN101866695 B CN 101866695B
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Abstract
The invention relates to a method for a Nandflash USB controller to read and write a Norflash memory, which is characterized in that: using the hardware design of a traditional Nandflash USB controller, for the two situations of the multiplex design and the separated design of an address line and a data line in the Norflash memory, realizing the reading and the writing operation of the Nandflash USB controller to the Norflash memory by re-defining an original connecting port of the Nandflash USB controller and the memory and by adding a software driving program meeting the reading and writing operation time sequence requirements of the Norflash memory. The invention has the beneficial effects that the hardware of the USB controller does not need to be re-designed, the hardware resources of the traditional Nandflash USB controller can be utilized, the reading and the writing to the Norflash memory are realized through software design, thereby not only saving the hardware development cost and time, but also meeting the market demand and achieving very good economy.
Description
Technical field
The present invention relates to the USB flash disk technical field, particularly a kind of method of Nandflash USB flash disk controller to read and write Norflash memory.
Background technology
As everyone knows, USB flash disk is large take its small and exquisite portable, memory capacity as movable storage device, low price, dependable performance be as characteristics, is widely used by people at present.Common U disk is comprised of USB interface, USB flash disk controller and Flash storer three parts usually.In the market in the common USB flash disk, storer adopts Nandflash type storer (being the Nandflash storer), and USB flash disk controller that should the design of storer characteristics is called Nandflash USB flash disk controller.As shown in Figure 1, at present the Nandflash USB flash disk controller port that is used for connecting the Nandflash storer is comprised of data and address multiplex port, control signal port and universal input and output port (GPIO) three parts usually.Wherein, data/address multiplex port only has 8 and 16 two kinds at present, is used to provide input and output and the address access of data; The control signal port provides the control signal that the Nandflash storer is operated, and comprises written allowance signal (WE), read enable signal (RE), write protect signal (WP) etc.; Universal input and output port (GPIO) provides one group of general GPIO to support to different Nandflash types or different clients' needs.
Above Nandflash USB flash disk controller and port design thereof are all only supported the Nandflash storer is read and write usually, do not support the Norflash storer is read and write.When needs are read and write the Norflash storer, often to redesign USB flash disk controller and port thereof.Doing like this needs to increase many costs, therefore considers the factors such as the market demand and cost, how to utilize existing Nandflash USB flash disk controller to read and write the problem that the Norflash storer just becomes the present invention's research.
Summary of the invention
The invention provides a kind of method of Nandflash USB flash disk controller to read and write Norflash memory, purpose is to utilize existing common Nandflash USB flash disk controller to read and write the Norflash storer, make Nandflash USB flash disk controller can support read-write to the Norflash storer, thereby solve the economy problems between the market demand and the cost of development.
For achieving the above object, the first technical scheme that the present invention adopts is: a kind of method of Nandflash USB flash disk controller to read and write Norflash memory, separate the Norflash storer of design for address wire and data line, with the original data of Nandflash USB flash disk controller and the address multiplex port FPDP as the Norflash storer; With the written allowance signal of the Nandflash written allowance signal in the original control signal port of Nandflash USB flash disk controller as the Norflash storer, the Nandflash read enable signal allows signal as the output of Norflash storer; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding address signal of level requirement simulation generation of Norflash memory address signal.
The read-write sequence requirement that provides according to the Norflash storer, in Nandflash USB flash disk controller, add the software driver of Norflash storer, make the original data of Nandflash USB flash disk controller and address multiplex port, control signal port and universal input and output port produce the Norflash memory read/write and operate needed sequential.
For achieving the above object, the second technical scheme that the present invention adopts is: a kind of method of Nandflash USB flash disk controller to read and write Norflash memory, for the Norflash storer of address wire and data line reuse plan, with the original data of Nandflash USB flash disk controller and address multiplex port FPDP and the low order address port as the Norflash storer; With the written allowance signal of the Nandflash written allowance signal in the original control signal port of Nandflash USB flash disk controller as the Norflash storer, the Nandflash read enable signal allows signal as the output of Norflash storer; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding high-order address signal of level requirement simulation generation of Norflash storer high-order address signal; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding address latch control signal of level requirement simulation generation of Norflash storage address latch control signal.
The read-write sequence requirement that provides according to the Norflash storer, in Nandflash USB flash disk controller, add the software driver of Norflash storer, make the original data of Nandflash USB flash disk controller and address multiplex port, control signal port and universal input and output port produce the Norflash memory read/write and operate needed sequential.
In a word, the present invention utilizes the hardware design of existing Nandflash USB flash disk controller, for address wire in the Norflash storer with the data line reuse plan with separate and design both of these case, the former ports having that is connected with storer by redefining Nandflash USB flash disk controller, and add the software driver that meets the requirement of Norflash memory read/write time sequential routine, just can realize that Nandflash USB flash disk controller is to the read-write operation of Norflash storer.The invention has the beneficial effects as follows: do not need to redesign the USB flash disk controller hardware, can utilize the hardware resource of existing Nandflash USB flash disk controller, realize read-write to the Norflash storer by Software for Design, therefore both saved hardware development cost and time, satisfy again the market demand, had good economy.
Description of drawings
Accompanying drawing 1 is the structure principle chart of existing Nandflash USB flash disk controller.
Accompanying drawing 2 is the embodiment of the invention 1 structure principle chart.
Accompanying drawing 3 is the embodiment of the invention 2 structure principle charts.
Accompanying drawing 4 is write the flow process sequential chart for the embodiment of the invention 1.
Accompanying drawing 5 is read the flow process sequential chart for the embodiment of the invention 1.
Accompanying drawing 6 is write the flow process sequential chart for the embodiment of the invention 2.
Accompanying drawing 7 is read the flow process sequential chart for the embodiment of the invention 2.
Accompanying drawing 8 is write process flow diagram for Norflash of the present invention.
Accompanying drawing 9 is read process flow diagram for Norflash of the present invention.
Embodiment
The invention will be further described below in conjunction with drawings and Examples:
Embodiment 1: a kind of method of Nandflash USB flash disk controller to read and write Norflash memory (the Norflash storer that separates design for address wire and data line)
As shown in Figure 2, the port of existing Nandflash USB flash disk controller is comprised of data and address multiplex port, control signal port and universal input and output port (GPIO) three parts.Wherein, data/address multiplex port only has 8 and 16 two kinds at present, is used to provide input and output and the address access of data; The control signal port provides the control signal that the Nandflash storer is operated, and comprises written allowance signal (WE), read enable signal (RE), write protect signal (WP) etc.; Universal input and output port (GPIO) provides one group of general GPIO to support to different Nandflash types or different clients' needs.
The Norflash storer is selected the MX29LV160 of MXIC.MX29LV160 is the Norflash storer that a kind of address wire and data line separate design.
In order to make existing Nandflash USB flash disk controller can read and write MX29LV160 type Norflash storer, with the original data of Nandflash USB flash disk controller and address multiplex port as the FPDP DATA0 of MX29LV160 type Norflash storer～DATA15; With the written allowance signal WE of the Nandflash written allowance signal in the original control signal port of Nandflash USB flash disk controller as MX29LV160 type Norflash storer, the Nandflash read enable signal allows signal RE as the output of MX29LV160 type Norflash storer; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding address signal ADD0～ADD19 of level requirement simulation generation of MX29LV160 type Norflash memory address signal.
Fig. 4 and Fig. 5 are respectively the MX29LV160 type Norflash memory write flow process sequential chart that production firm provides and read the flow process sequential chart.Among Fig. 4, Address represents address signal, CE represents sheet selected control signal processed (horizontal line of CE top represents Low level effective), OE represents that output allows signal (horizontal line of OE top represents Low level effective), WE represents written allowance signal (horizontal line of WE top represents Low level effective), Data represents data-signal, RY/BY represents state return signal (horizontal line of BY top represents Low level effective), VCC represents power supply, 555h represents the write order address of MX29LV160 type Norflash storer, PA represents that the data address of programming, PD represent the data of programming, and DOUT represents to export the actual value of programming address.As can be seen from Figure 4, the program command order is two cycles, and the read states data are two cycles.Among Fig. 5, Addresses represents address signal, CE represents sheet selected control signal processed (horizontal line of CE top represents Low level effective), WE represents written allowance signal (horizontal line of WE top represents Low level effective), OE represents that output allows signal (horizontal line of OE top represents Low level effective), Outputs represents data-signal, and RESET represents reset signal (horizontal line of RESET top represents Low level effective).
The read-write sequence requirement that provides according to MX29LV160 type Norflash storer, in the NandflashU disk controller, add the software driver of Norflash storer, make the original data of Nandflash USB flash disk controller and address multiplex port, control signal port and universal input and output port produce the Norflash memory read/write and operate needed sequential.Those of ordinary skills just can work out by the complete independently software driver under the enlightenment of technique scheme, realize existing Nandflash USB flash disk controller read-write MX29LV160 type Norflash storer.Present embodiment can correctly be read and write MX29LV160 type Norflash storer after tested.
In addition, adopt the original universal input and output port of Nandflash USB flash disk controller, sequential and level according to MX29LV160 type Norflash memory chip selected control signal processed require to simulate generation corresponding sheet selected control signal CE processed (seeing Fig. 2), are used for the control strip choosing.Adopt the original universal input and output port of Nandflash USB flash disk controller, select the sequential of control signal and level to require to simulate generation corresponding FPDP model selection control signal BYTE (seeing Fig. 2) according to MX29LV160 type Norflash memory data port mode, be used for control FPDP pattern, namely select 8 bit data port modes, still select 16 bit data port modes to transmit data.Adopt the original universal input and output port of Nandflash USB flash disk controller; sequential and level according to MX29LV160 type Norflash memory write guard signal require to simulate generation corresponding write protect signal (Fig. 2 does not draw), are used for the control write-protect.
Present embodiment is also supported the M58 series of ST and INTEL, the 29LV series of SPANSION and MXIC, 29LW series of SPANSION etc. Norflash storer.Here describe in detail no longer one by one.
Embodiment 2: a kind of method of Nandflash USB flash disk controller to read and write Norflash memory (for the Norflash storer of address wire and data line reuse plan)
As shown in Figure 3, the port of existing Nandflash USB flash disk controller is comprised of data and address multiplex port, control signal port and universal input and output port (GPIO) three parts.Wherein, data/address multiplex port only has 8 and 16 two kinds at present, is used to provide input and output and the address access of data; The control signal port provides the control signal that the Nandflash storer is operated, and comprises written allowance signal (WE), read enable signal (RE), write protect signal (WP) etc.; Universal input and output port (GPIO) provides one group of general GPIO to support to different Nandflash types or different clients' needs.
The Norflash storer is selected the S29NS128 of Spansion.S29NS128 is the Norflash storer of a kind of address wire and data line reuse plan.
In order to make existing Nandflash USB flash disk controller can read and write S29NS128 type Norflash storer, with the original data of Nandflash USB flash disk controller and address multiplex port FPDP and the low order address port A/DQ0～A/DQ15 as S29NS128 type Norflash storer; With the written allowance signal WE of the Nandflash written allowance signal in the original control signal port of Nandflash USB flash disk controller as S29NS128 type Norflash storer, the Nandflash read enable signal allows signal RE as the output of S29NS128 type Norflash storer; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding high-order address signal ADD16～ADD22 of level requirement simulation generation of S29NS128 type Norflash storer high-order address signal; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding address latch control signal AVD of level requirement simulation generation of S29NS128 type Norflash storage address latch control signal.Low 16 bit address lines and the data line of S29NS128 are multiplexing, come latch address by an address latch control signal AVD.
Fig. 6 and Fig. 7 are respectively the S29NS128 type Norflash memory write flow process sequential chart that production firm provides and read the flow process sequential chart.Among Fig. 6, CLK represents clock signal, AVD represents address latch control signal, Amax-A16 represents high-order address signal, A/DQ0～A/DQ15 represents low address signal and data-signal, CE represents sheet selected control signal processed, OE represents that output allows signal, WE represents written allowance signal, 555h represents the write order address of S29NS128 type Norflash storer, PA represents that the data address of programming, PD represent the data of programming, and VA represents to inquire about the effective address of programming operation mode bit, In progress represents the well afoot of programming, Complete represents that programming finishes, and current programming is to carry out or finished according to the state representation of programming operation, and the CLK signal can be high level or low level.As can be seen from Figure 6, the program command order is two cycles, and the read states data are two cycles.Among Fig. 7, CE represents sheet selected control signal processed, OE represents that output allows signal, WE represents written allowance signal, A/DQ0～A/DQ15 represents low address signal and data-signal, and Amax-A16 represents high-order address signal, and AVD represents address latch control signal, RA represents the address of sense data, and RD represents the data of reading.
The read-write sequence requirement that provides according to S29NS128 type Norflash storer, in Nandflash USB flash disk controller, add the software driver of Norflash storer, make the original data of Nandflash USB flash disk controller and address multiplex port, control signal port and universal input and output port produce S29NS128 type Norflash memory read/write and operate needed sequential.Those of ordinary skills just can work out by the complete independently software driver under the enlightenment of technique scheme, realize existing Nandflash USB flash disk controller read-write S29NS128 type Norflash storer.Present embodiment can correctly be read and write S29NS128 type Norflash storer after tested.
In addition, adopt the original universal input and output port of Nandflash USB flash disk controller, sequential and level according to S29NS128 type Norflash memory chip selected control signal processed require to simulate generation corresponding sheet selected control signal CE processed (seeing Fig. 3), are used for the control strip choosing.Adopt the original universal input and output port of Nandflash USB flash disk controller, select the sequential of control signal and level to require to simulate generation corresponding FPDP model selection control signal BYTE (Fig. 3 does not draw) according to S29NS128 type Norflash memory data port mode, be used for control FPDP pattern, namely select 8 bit data port modes, still select 16 bit data port modes to transmit data.Adopt the original universal input and output port of Nandflash USB flash disk controller, can simulate generation corresponding write protect signal WP (seeing Fig. 3) according to sequential and the level requirement of S29NS128 type Norflash memory write guard signal, be used for the control write-protect.
Present embodiment can be supported the whole series of Spansion 29NS, comprises S29NS256, S29NS512 etc. Norflash storer.Here describe in detail no longer one by one.
Fig. 8 is the Norflash memory write process flow diagram that embodiment 1 and embodiment 2 share.Fig. 9 is that the Norflash storer that embodiment 1 and embodiment 2 share is read process flow diagram.Before Fig. 8 and Fig. 9 begin, need the sequential (only need join once and get final product) of configuration operation Norflash storer control port signal and FPDP signal, then operate according to Fig. 8 or Fig. 9 flow process.
Above-described embodiment only is explanation technical conceive of the present invention and characteristics, allows those skilled in the art can understand content of the present invention and according to this enforcement, does not limit protection scope of the present invention with this.All equivalences that Spirit Essence is done according to the present invention change or modify, and all should be encompassed within protection scope of the present invention.
Claims (8)
1. the method for a Nandflash USB flash disk controller to read and write Norflash memory, it is characterized in that: separate the Norflash storer of design for address wire and data line, with the original data of Nandflash USB flash disk controller and the address multiplex port FPDP as the Norflash storer; With the written allowance signal of the Nandflash written allowance signal in the original control signal port of Nandflash USB flash disk controller as the Norflash storer, the Nandflash read enable signal allows signal as the output of Norflash storer; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding address signal of level requirement simulation generation of Norflash memory address signal;
The read-write sequence requirement that provides according to the Norflash storer, in Nandflash USB flash disk controller, add the software driver of Norflash storer, make the original data of Nandflash USB flash disk controller and address multiplex port, control signal port and universal input and output port produce the Norflash memory read/write and operate needed sequential.
2. method according to claim 1 is characterized in that: adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the level requirement simulation corresponding sheet selected control of the generation signal processed of Norflash memory chip selected control signal processed.
3. method according to claim 1, it is characterized in that: adopt the original universal input and output port of Nandflash USB flash disk controller, select the sequential of control signal and level to require simulation to produce corresponding FPDP model selection control signal according to Norflash memory data port mode.
4. method according to claim 1 is characterized in that: adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding write protect signal of level requirement simulation generation of Norflash memory write guard signal.
5. the method for a Nandflash USB flash disk controller to read and write Norflash memory, it is characterized in that: for the Norflash storer of address wire and data line reuse plan, with the original data of Nandflash USB flash disk controller and address multiplex port FPDP and the low order address port as the Norflash storer; With the written allowance signal of the Nandflash written allowance signal in the original control signal port of Nandflash USB flash disk controller as the Norflash storer, the Nandflash read enable signal allows signal as the output of Norflash storer; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding high-order address signal of level requirement simulation generation of Norflash storer high-order address signal; Adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding address latch control signal of level requirement simulation generation of Norflash storage address latch control signal;
The read-write sequence requirement that provides according to the Norflash storer, in Nandflash USB flash disk controller, add the software driver of Norflash storer, make the original data of Nandflash USB flash disk controller and address multiplex port, control signal port and universal input and output port produce the Norflash memory read/write and operate needed sequential.
6. method according to claim 5 is characterized in that: adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the level requirement simulation corresponding sheet selected control of the generation signal processed of Norflash memory chip selected control signal processed.
7. method according to claim 5, it is characterized in that: adopt the original universal input and output port of Nandflash USB flash disk controller, select the sequential of control signal and level to require simulation to produce corresponding FPDP model selection control signal according to Norflash memory data port mode.
8. method according to claim 5 is characterized in that: adopt the original universal input and output port of Nandflash USB flash disk controller, according to sequential and the corresponding write protect signal of level requirement simulation generation of Norflash memory write guard signal.
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| CN102820048B (en) * | 2012-08-09 | 2014-09-03 | 郑州信大捷安信息技术股份有限公司 | USB flash disk having write-protection function and implementation method thereof |
| CN103150272B (en) * | 2013-03-21 | 2017-05-24 | 珠海市杰理科技股份有限公司 | SDRAM (synchronous dynamic random access memory) data access circuit and SDRAM data access system |
| CN107025073B (en) * | 2017-04-19 | 2019-12-10 | 浪潮集团有限公司 | NAND FLASH array Mapping information storage method |
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| CN1642000A (en) * | 2004-01-12 | 2005-07-20 | 因芬尼昂技术股份公司 | Amplifier circuit |
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| CN101329902A (en) * | 2007-06-21 | 2008-12-24 | 索尼株式会社 | Semiconductor memory device and method for operating semiconductor memory device |
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| JP3871853B2 (en) * | 2000-05-26 | 2007-01-24 | 株式会社ルネサステクノロジ | Semiconductor device and operation method thereof |
| JP2006155650A (en) * | 2006-02-06 | 2006-06-15 | Renesas Technology Corp | Apparatus of semiconductor integrated circuit |
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|---|---|---|---|---|
| CN1642000A (en) * | 2004-01-12 | 2005-07-20 | 因芬尼昂技术股份公司 | Amplifier circuit |
| CN101329902A (en) * | 2007-06-21 | 2008-12-24 | 索尼株式会社 | Semiconductor memory device and method for operating semiconductor memory device |
| CN101276297A (en) * | 2008-05-14 | 2008-10-01 | 北京星网锐捷网络技术有限公司 | Processor system, equipment as well as fault handling method |
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Address after: Room C2031, Suzhou Pioneer Park, 209 Zhuyuan Road, Suzhou High-tech Zone, Jiangsu Province Patentee after: Suzhou Guoxin Technology Co., Ltd. Address before: Room C2031, Suzhou Pioneer Park, 209 Zhuyuan Road, Suzhou High-tech Zone, Jiangsu Province Patentee before: C*Core Technology (Suzhou) Co., Ltd. |