CN105894789B - The Automatic meter reading system of tap water supply pipe network - Google Patents
The Automatic meter reading system of tap water supply pipe network Download PDFInfo
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- CN105894789B CN105894789B CN201610454655.5A CN201610454655A CN105894789B CN 105894789 B CN105894789 B CN 105894789B CN 201610454655 A CN201610454655 A CN 201610454655A CN 105894789 B CN105894789 B CN 105894789B
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- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
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Abstract
The present invention relates to a kind of Automatic meter reading system of tap water supply pipe network, are made of more water meters, controller, intelligent telephone set, small, dedicated computer and main controller.Each water meter sends measurement data to controller and main controller by power line communication, when there is water meter failure or power outage, issues the voice signal solidified in the chips to administrator through intelligent telephone set from main controller, so as to on-call maintenance or starts backup power source.
Description
(1) technical field:
The present invention relates to a kind of Automatic meter reading system of tap water supply pipe network, by more water meters, controller, smart phones
Machine, small, dedicated computer and main controller are constituted.Each water meter sends measurement data to controller and master control by power line communication
Device is issued to administrator through intelligent telephone set from main controller and is solidified in the chips when there is water meter failure or power outage
Audio alert signal so as to on-call maintenance or starts backup power source.
(2) background technique:
The control system of power supply is provided by power network, each electronic equipment or intermodule are communicated by special circuit,
The timing time of each electronic equipment or electronic module is corrected, reaches synchronous operation purpose.Due to being made using special circuit communication
Wiring complicates and increases cost, if timing time is not corrected by line traffic, due to traditional timing error, runs number
After hour, accumulation timing error can make system control action inconsistent, may cause system crash, set in some frequent changes
Meter, its products application of the big occasion of wiring installation amount are restricted.
(3) summary of the invention:
The present invention relates to the Automatic meter reading system of tap water supply pipe network, for recording user's water consumption.The system is by more
Number of elements is constituted according to the water meter of output, controller, intelligent telephone set, small, dedicated computer and main controller, intelligent telephone set and master control
Device is placed in the cabinet of building bottom wall, and small, dedicated computer can be loaded in cabinet and also be carried by administrator.Each water meter will
Measurement data sends controller to by half wave communication of power line, and user's water usage data of acquisition is passed through electric power by each controller
Half wave communication of line sends main controller to.When there is water meter failure or power outage, from main controller through intelligent telephone set to management
Member issues the audio alert signal solidified in the chips, so as to on-call maintenance or starts backup power source.The water meter example of data output
Such as: pulse exports water meter, ultrasonic water meter, electromagnetic flowmeter, so that every water meter is equipped with toggle switch, is both provided with volume
Number, controller timing is scanned registration to each water meter controlled, finds failure or is artificially moved away from system, which is remembered
It records and alarms to administrator.Each water meter and each controller and main controller are respectively mounted cycle discriminator circuit in device, for generating
The synchronization time of system keeps system acting consistent, while communications electronics switch, a switch are respectively installed in its telecommunication circuit
Drive module.Above-mentioned apparatus is connected on same electric power cable and is arranged master switch, and master switch is followed by rectifier diode, by city
The rectified diode of electricity is sent into system, and system is in minus half wave communication positive half-wave power supply state.Each water meter, controller and main controller
Communications electronics switch is connected in setting call duration time, conversely, main controller first sends switching command to each water meter and its controller,
Turn off communications electronics switch.
Each water meter and each controller and main controller, communication is by being controlled synchronization time to keep communication operation permanent one therebetween
It causes, the switch driving circuit of communications electronics switch is just connect diode and be further isolated from electric power cable after resistance is depressured
After the negative half-wave of cycle, it is connected to comparator input terminal, reference voltage is 100Mv to 200Mv, using diode drop through resistance
Partial pressure obtains, therefore the output end of comparator is square-wave signal, it produces corresponding power network after the isolating diode just connect
The positive square-wave signal of the negative half-wave of cycle, is connected to the I/O mouth of respective single-chip microcontroller, executes communication when single-chip microcontroller scanning is to positive square-wave signal
Operation, the positive square-wave signal are also used to that communications electronics is driven to switch, therefore communications electronics switch is turned off in cycle positive half-wave, week
It is connected when the negative half-wave of wave.Communications electronics switch is connected to single-chip microcontroller corresponding port according to used communication mode, and carries out signal condition,
When sign off under main controller control, make driving circuit shutdown communications electronics switch.
Cabinet installs an intelligent telephone set, main controller and small, dedicated computer.Main controller transmits alert data through I2C
To intelligent telephone set nonvolatile storage, intelligent telephone set is to pass through telephone network to send the voice solidified in the chips to administrator
Signal.Meter reading data is also sent to small, dedicated computer through RS232 by main controller, then from small, dedicated computer through internet to from
Water water supply administrative center summarizes.
The present invention utilizes the positive half cycle ascent stage of power network cycle, and three examination point realizations is taken to sentence the identification of cycle signal
It is fixed, recycle the cycle time to establish synchronization time, the synchronous operation of main controller and each water meter, each controller in realization system.
Main controller and each water meter, each controller cycle discriminator circuit structural schematic diagram as shown in Fig. 2, by two using stagnant
The voltage comparator composition of comparator is returned, includes filter circuit, the benchmark electricity of voltage comparator in each voltage comparator
Pressure is provided by voltage regulator circuit.Clock timer and synchrotimer is arranged in system.If detecting two adjacent cycle signals
It is very, then to take out the clock timer timing time between two adjacent cycle signal zero passages, when being sequentially stored in cycle
Between in storage unit, which can store 100 cycle times, the one cycle time of every deposit when being filled with,
The cycle time being stored at first is first removed, and calculates the average value Tz of the cycle time of deposit and saves, utilizes Tz value
Identify cycle signal to be identified, to reduce the influence of power network frequency fluctuation, while reducing erroneous judgement using three examination points may
Property.
Two comparators are respectively used to screen point 1, screen point 2, as shown in Figure 1.In the cycle of cycle positive half cycle ascent stage
At zero passage, that is, screen point 0 setting a voltage zero-cross detection module, it using cycle positive half-wave signal through electric resistance partial pressure, diode into
The clock end CLK of feeding d type flip flop after negative half period, signal condition is isolated in one step, and the Q of d type flip flop terminates single-chip microcontroller external interrupt
Mouthful, which is arranged to level triggers, the end the D ground connection of d type flip flop, and S terminates single-chip processor i/o mouth, usually sets for the I/O mouthfuls
1.When cycle positive half-wave zero cross signal arrives, cycle signal rising edge immediately after makes the end d type flip flop Q 0, outside single-chip microcontroller
Fracture low level in portion executes instruction in the interrupt service program to generate interruption: setting the 0, Central Shanxi Plain for described I/O mouthfuls and breaks, counts
When, described I/O mouthfuls set 1, open interruption.Remaining two comparator is separately positioned on the cycle positive half cycle ascent stage, crest voltage
The examination point 2 of the examination point 1 and 50% to 70% place at 35% to 50% place.
Cycle signal determining: for single-chip microcontroller after setting time opens interruption, clock timer resets and starts timing, works as cycle
When voltage zero-cross, the output voltage jump that d type flip flop in the voltage zero-cross inspection survey mould block ﹙ V0 ﹚ for screen point 0 is arranged in is become zero, and is produced
It is raw to interrupt, record its zero crossing break period Th0；Hereafter, the output electricity of electricity pressure comparator ﹙ V1 ﹚ at point 1 is screened in single-chip microcontroller scanning
Pressure, when all wave voltages reach to ﹙ V1 ﹚ threshold voltage when, output voltage jumps from high to low, scanning record its bound-time Th1；
Same scanning record screens electricity at point 2 and presses comparator ﹙ V2 ﹚ output voltage bound-time Th2, and Th0 and voltage zero-cross are detected mould
The output voltage bound-time setting value Ts0 of Kuai ﹙ V0 ﹚ makes comparisons；The output voltage bound-time of Th1 and electricity pressure comparator ﹙ V1 ﹚
Setting value Ts1 and Th2 makes comparisons respectively with the output voltage bound-time setting value Ts2 of electricity pressure comparator ﹙ V2 ﹚, if
Within the scope of allowable error, then otherwise it is false that the discriminator signal detected, which is true,.When above-mentioned judgement discriminator signal is true, calculate
When clock timer timing between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true
Between Tzu, it is made comparisons with the average value Tz of cycle time, if be no more than setting cycle time error Tzv if cycle signal
It is very, at this moment to save Tzu and 20ms is taken to be added with synchrotimer timing time, in the value deposit synchrotimer that will add up.
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens the break period between 18.5ms
Open interruption when setting value Tk, the Central Shanxi Plain is disconnected when clock timer timing to 25ms is to pass break period setting value Tn between 27ms.
After system boot, clock timer starts timing, and when detecting first cycle voltage zero-cross, setting is being screened
The output voltage jump that the voltage zero-cross Jian of point 0 surveys Mo Kuai ﹙ V0 ﹚ takes out the time of cycle voltage over zero to generate interruption
T0 is saved, and clock timer is reset to and started timing, and at this moment cycle time voltage crosses zero Th0 is 0, while single-chip microcontroller is by above-mentioned
Method scans and determines discriminator signal.What it is due to detection is first cycle, and clock timer is opened in cycle voltage zero-cross
Beginning timing, the value of Th0, Th1 and Th2 must subtract open the difference of break period setting value Tk plus cycle time 20ms, such as
Three discriminator signals of fruit are that very, the time T0 of the cycle voltage over zero of taking-up is stored in synchrotimer as initial time,
I.e. opening the break period for the first time takes Tk next time.It otherwise is fictitious time, the clock timer time must add T0 at this time, continue to test.
When detecting first and adjacent second cycle voltage zero-cross, due to not saving the cycle time of detection,
Therefore the clock timer timing time twice between cycle signal zero passage is made comparisons with cycle time 20ms, determines cycle signal
Then it is that the difference for taking 20ms to subtract Th0 is added with synchrotimer timing time when being true, i.e., saves the standard cycle time for the first time
20ms need to deduct its Th0 value, this is because when hereafter detecting that cycle signal is true every time, when opening interruption by clock meter
When device reset after restart timing, and be that the standard cycle time is included in synchrotimer when opening interruption, open interruption
Clock timer is reset afterwards, otherwise determines that cycle signal is fictitious time, and the clock timer time must add T1=T0+Tk at this time, after
It is continuous to detect first cycle again according to the above method.After detecting first cycle signal is very, restore above-described cycle
Signal determining.
As shown in Figure 1, if detect cycle signal be it is false, open the break period next time and open the break period at this
Afterwards, open interruptions when average value Tz through the cycle time that is delayed, and open interrupt after be delayed Tns when the Central Shanxi Plain it is disconnected, when the setting Central Shanxi Plain is broken
Between be when cycle signal screen point 0 when do not generate interruption, at this moment must be in the setting time point more than Ts0 allowable error range
Start to scan, and when scanning examination point 1 and examination point 2, voltage comparator output voltage does not generate jump, all breaks in the Central Shanxi Plain
The time Tns Central Shanxi Plain is disconnected and stops scanning, Tns are as follows:
Tns=Tn-Tk
If detecting that cycle signal is very, next cycle opens break period Tks are as follows:
Tks=Tk+Th0
I.e. from being opened after the break period takes Tk for the first time, clock timer is that timing to Tks opens interruption, and weight after resetting
New to start timing, the Central Shanxi Plain is broken when Tns is arrived in timing, to make the synchrotimer time by the correction of cycle time voltage crosses zero.
It repeats the above process.If the upper cycle signal detected is that very, when this cycle determines, discriminator signal is
Vacation, or the cycle time detected is more than setting cycle time error Tzv or clock meter compared with the average value Tz of cycle time
When device timing to when closing break period setting value Tns, voltage zero-cross inspection is surveyed mould block ﹙ V0 ﹚ output voltage and is not jumped, does not generate
Disconnected, then when Tns is arrived in clock timer timing, the Central Shanxi Plain is disconnected, at this moment remembers and does not count cycle N 1 and to store, when opening interruption next time
Between be to open the break period in last time to open interruption after Tz, hereafter every time determine the cycle signal true and false, if false or this detection
Though discriminator signal is true but last time is vacation, then N is taken, will be restored after N+1 in memory, clock timer not reset after opening interruption
Continue timing, at this moment, next cycle of setting opens the break period and temporarily uses out break period interim setting value Tkz instead:
Tkz=(N+1) × Tz
Meanwhile next cycle pass break period temporarily uses instead and closes break period interim setting value Tnz:
Tnz=Tkz+Tns
When clock timer to after Tkz, the time that point is screened in scanning can be obtained by simple computation.If at this moment examined
Measuring cycle signal is very, then to take out N in memory and save, and by N zero setting in memory, make clock timer clocking value Ts
Are as follows: at this moment (Ts-Tkz) → Ts takes the value of (N+1) × 20ms to be added in synchrotimer, and restore using setting value Tks with
Tns, recovered clock timer are reset after opening interruption.
System synchronization time is the time of synchrotimer, along with currently just in the time of the clock timer of timing.
When determining to screen the point signal true and false, Th0, Th1, Th2 are by setting with voltage comparator output voltage bound-time
Definite value Ts0, Ts1, Ts2 make comparisons see it is whether overproof, come determine screen point a signal true and false, can choose: Th0, Th1, Th2 are
It is true that the cycle discriminator signal, which is true or Th0, when true, while when one of Th1, Th2 are true or when Th1, Th2 are true, should
Cycle discriminator signal is very, depending on to determining that cycle signal true and false difference requires.
If system fault, when N be greater than 25 to 70 between a setting value when, due to main controller in system and each water
Table, each controller, the Tz value and N value of detection may be different, and at this moment, power network frequency accumulated error may cause synchronometer
When the device time corrected when can not be by detecting true cycle signal, when it is true for detecting cycle signal, using clock
Clocking value of the timer at Tkz is directly added in synchrotimer, and to reduce the asynchronous time of system, power network is normally transported
N is much smaller than 25 in the case of battalion.
The cycle time error Tzv of permission and the flip-flop transition setting value of voltage comparator output voltage, by test assessment
Its average value is taken to obtain.
(4) Detailed description of the invention:
Fig. 1 is that cycle screens data relationship schematic diagram；
Fig. 2 is cycle discriminator circuit structural schematic diagram；
Fig. 3 is the circuit structure block diagram of the Automatic meter reading system of tap water supply pipe network.
(5) specific embodiment:
Fig. 3 is that the Automatic meter reading system circuit structure block diagram of tap water supply pipe network includes: 10 ﹚ of Zhu Kong Qi ﹙, communication electricity
11 ﹚ of sub- Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙, 13 ﹚ of small, dedicated electricity Nao ﹙, 15 ﹚ of Shui Biao ﹙, cycle screen 14 ﹚ of electricity Lu ﹙, intelligence electricity
16 ﹚ of Hua Ji ﹙, 17 ﹚ of Kong Qi ﹙.Wherein 11 ﹚ of communications electronics Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙, cycle screen 16 ﹚ of electricity Lu ﹙ and
List piece machine ﹙ U0 ﹚ is separately contained in 15 ﹚ of water table ﹙, control 17 ﹚ of device ﹙ and main 10 ﹚ of control device ﹙ processed in Fig. 2, and communications electronics, which are opened, closes 11 ﹚ of ﹙
Use bidirectional triode thyristor as switch.
Fig. 2 is the structural schematic diagram that cycle screens 14 ﹚ of electricity Lu ﹙, by: Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian and surveys Mo Kuai ﹙
V0 ﹚, electricity pressure comparator ﹙ V1 ﹚ and electricity pressure comparator ﹙ V2 ﹚ are constituted.Dan Pian Ji ﹙ U0 ﹚ refers to 15 ﹚ of Shui Biao ﹙, 17 ﹚ of Kong Qi ﹙ and master
Single-chip microcontroller in 10 ﹚ of Kong Qi ﹙.Shu enters electricity Lu ﹙ S0 ﹚ for mains AC voltage to be passed through to the partial pressure of resistance and diode, turns
It is changed to the suitably stable input voltage of voltage comparator.Dan Pian Ji ﹙ U0 ﹚ uses 89C55WD.Electricity pressure comparator ﹙ V1 ﹚, voltage
Bi compare Qi ﹙ V2 ﹚ uses dedicated voltage comparator LM339, and reference voltage is stablized using the voltage regulator circuit of voltage-stabiliser tube
The threshold voltage of voltage comparator.
When mains AC voltage cycle signal zero passage, voltage zero-cross Jian surveys the output voltage jump of Mo Kuai ﹙ V0 ﹚, single
Pian Ji ﹙ U0 ﹚ generates interruption, records the break period, while Dan Pian Ji ﹙ U0 ﹚ is also used to scanning voltage Bi compare Qi ﹙ V1 ﹚ and voltage ratio
The output voltage of compare Qi ﹙ V2 ﹚ records bound-time when output voltage jump, produces for determining power network cycle signal
Raw synchronization time.
Single-chip microcontroller in 16 ﹚ of smart phone Ji ﹙ is equipped with I2C serial communication module, for being led between master controller
Alert data is sent to intelligent telephone set nonvolatile storage through I2C by letter, main controller, intelligent telephone set pass through telephone network to
Administrator sends the voice signal solidified in the chips.
Claims (2)
1. a kind of Automatic meter reading system of tap water supply pipe network, characterized in that intelligent telephone set and main controller are placed in building bottom
In the cabinet of layer wall, each water meter sends measurement data to controller by half wave communication of power line, and each controller will acquire
User's water usage data send main controller to also by half wave communication of power line, when there is water meter failure or power outage,
The audio alert signal solidified in the chips is issued to administrator through intelligent telephone set from main controller, so as to on-call maintenance or starting
Backup power source；Every water meter is equipped with toggle switch, is both provided with number, and each water meter controlled is swept in controller timing
Retouch registration, find failure or be artificially moved away from system, alarm by the accident record and to administrator, each water meter and each controller and
Main controller is respectively mounted cycle discriminator circuit in device, respectively pacifies for the synchronization time of generation system, while in telecommunication circuit
Communications electronics switch, a switch drive module are filled, the rectified diode of alternating current is sent into system, and system is being in minus half wave communication just
Half-wave power supply state；
The switch driving circuit of communications electronics switch is just being connect diode from electric power cable after resistance is depressured further is isolated
After the negative half-wave of cycle, it is connected to comparator input terminal, reference voltage is 100Mv to 200Mv, using diode drop through resistance
Partial pressure obtains, therefore the output end of comparator is square-wave signal, and corresponding electric power net week is produced after the isolating diode just connect
The positive square-wave signal of the negative half-wave of wave, is connected to the I/O mouth of respective single-chip microcontroller, executes communication behaviour when single-chip microcontroller scanning is to positive square-wave signal
Make, which is also used to that communications electronics is driven to switch, and alert data is sent to intelligent telephone set through I2C by main controller,
Intelligent telephone set is to pass through telephone network to send the voice signal solidified in the chips to administrator, and main controller also passes through meter reading data
RS232 is sent to small, dedicated computer, then is summarized from small, dedicated computer through internet to tap water supply administrative center；
Cycle discriminator circuit is the positive half cycle ascent stage using power network cycle, takes three to screen knowledge of the point realization to cycle signal
Do not determine, recycle the cycle time to establish synchronization time, clock timer and synchrotimer is arranged in system, if detecting phase
Two adjacent cycle signals are very, then when taking out the clock timer timing between two adjacent cycle signal zero passages
Between, it is sequentially stored in cycle time memory cell, is filled with the one cycle time of every deposit when 100 cycle time, first removes
The cycle time being stored at first, and the average value Tz of the cycle time of deposit is calculated, identify cycle to be identified using Tz value
Signal；
Two comparators are respectively used to screen point 1, screen point 2, at the cycle zero passage of cycle positive half cycle ascent stage, that is, screen point
0 setting voltage zero-cross detection module, it using cycle positive half-wave signal through electric resistance partial pressure, diode be further isolated negative half period,
The clock end CLK of d type flip flop is sent into after signal condition, when cycle positive half-wave zero cross signal arrives, cycle immediately after is believed
Number rising edge makes the end d type flip flop Q 0, single-chip microcontroller external interrupt mouth low level, so that interruption is generated, remaining two comparator point
It She Zhi not be in cycle positive half cycle ascent stage, the examination of the examination point 1 and 50% to 70% place at 35% to 50% place of crest voltage
Point 2；
Cycle signal determining process: for single-chip microcontroller after setting time opens interruption, clock timer resets and starts timing, works as cycle
When voltage zero-cross, the output voltage jump that d type flip flop in the voltage zero-cross detection module for screening point 0 is arranged in is become zero, in generation
It is disconnected, record zero crossing break period Th0；Hereafter, the output electricity of first voltage Bi compare Qi ﹙ V1 ﹚ at point 1 is screened in single-chip microcontroller scanning
Pressure, when all wave voltages reach first voltage than threshold voltage compared with device ﹙ V1 ﹚, output voltage jumps from high to low, scanning record
Bound-time Th1；Same scanning record screens second voltage Bi compare Qi ﹙ V2 ﹚ output voltage bound-time Th2 at point 2, the jump
If becoming the time within the scope of allowable error, otherwise it is vacation that the discriminator signal detected, which is true, above-mentioned judgement discriminator signal is
When true, the clock timing between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true is calculated
Device timing time Tzu makes comparisons with the average value Tz of cycle time, and cycle is believed if being no more than setting cycle time error Tzv
Number be it is true, at this moment save Tzu and 20ms taken to be added with synchrotimer timing time, the value that will add up is stored in synchrotimer
In；
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens break period setting between 18.5ms
Open interruption when value Tk, the Central Shanxi Plain is disconnected when clock timer timing to 25ms is to pass break period setting value Tn between 27ms；
When detecting first cycle voltage zero-cross, the output voltage jump for screening the voltage zero-cross detection module of point 0 is set
Become, to generate interruption, time T0 for taking out cycle voltage over zero is saved, clock timer is reset to and is started timing, this
When week wave voltage zero crossing break period Th0 be 0, single-chip microcontroller scans and determines discriminator signal, and the value of Th0, Th1 and Th2 are equal
The difference of break period setting value Tk must be subtracted open plus cycle time 20ms, if three discriminator signals are true, the week of taking-up
The time T0 of wave voltage zero crossing opens the break period next time for the first time and takes as in initial time deposit synchrotimer
Tk, otherwise having a discriminator signal is fictitious time, and the clock timer time must add T0 at this time, is continued to test；
It is then that 20ms is taken to subtract when determining that cycle signal is true when detecting first and second adjacent cycle voltage zero-cross
The difference of Th0 is added with synchrotimer timing time, and clock timer is reset after opening interruption, otherwise determines that cycle signal is false
When, the clock timer time must add T1=T0+Tk at this time, first cycle be detected again, when first cycle signal of detection
Be very after, restore above-described cycle signal determining；
If detecting that cycle signal is vacation, the break period is opened next time after this opens the break period, when through delay cycle
Between average value Tz when open interruption, and open interrupt after be delayed Tns when the Central Shanxi Plain it is disconnected, it is when cycle signal is discriminated that the break period is closed in setting
Not Wei fictitious time, closing, the Central Shanxi Plain break period Tns is disconnected and stop scanning, Tns are as follows:
Tns=Tn-Tk；
If detecting that cycle signal is very, next cycle opens break period Tks are as follows:
Tks=Tk+Th0
I.e. from being opened after the break period takes Tk for the first time, clock timer is that timing to Tks opens interruption, and opens again after resetting
Beginning timing, the Central Shanxi Plain is disconnected when timing is to Tns；
Above-mentioned cycle signal determining process is repeated, if the upper cycle signal detected is very, when this cycle determines, to discriminate
Level signal be it is false, then when Tns is arrived in clock timer timing, the Central Shanxi Plain is disconnected, remember cycle N at this moment 1 and to store, and opens next time
The disconnected time is to open the break period in last time to open interruption after Tz, hereafter every time determine the cycle signal true and false, if false or this
Though detection discriminator signal be true last time be it is false, then take N, will be restored after N+1 in memory, clock timer open interrupt after not
It resets and continues timing, at this moment, next cycle of setting opens the break period and temporarily uses out break period interim setting value Tkz instead:
Tkz=(N+1) × Tz
Meanwhile next cycle pass break period temporarily uses instead and closes break period interim setting value Tnz:
Tnz=Tkz+Tns
When clock timer to after Tkz, if at this moment detect cycle signal be it is true, take out N in memory and save, and
By N zero setting in memory, make clock timer clocking value Ts are as follows: Ts-Tkz, then with calculate results modification Ts value, at this moment take
(N+1) × 20ms value is added in synchrotimer, and is restored using setting value Tks and Tns, and recovered clock timer is in opening
It has no progeny clearing；
System synchronization time is the time of synchrotimer, along with currently just in the time of the clock timer of timing；
Determine screen point the signal true and false when, select: when Th0, Th1, Th2 are true the cycle signal be true or Th0 be very,
When one of Th1, Th2 are true simultaneously or when Th1, Th2 are true, the cycle signal be it is true, view to the judgement cycle signal true and false not
With require depending on, if N be greater than 25 to 70 between a setting value when, it is direct using clocking value of the clock timer at Tkz
It is added in synchrotimer.
2. the Automatic meter reading system of tap water supply pipe network according to claim 1, it is characterised in that include:
10 ﹚ of Zhu Kong Qi ﹙, 11 ﹚ of communications electronics Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙, 13 ﹚ of small, dedicated electricity Nao ﹙, 15 ﹚ of Shui Biao ﹙, week
Wave screens 14 ﹚ of electricity Lu ﹙, 16 ﹚ of smart phone Ji ﹙, 17 ﹚ of Kong Qi ﹙, wherein 15 ﹚ of Shui Biao ﹙, 17 ﹚ and Zhu Kong Qi ﹙ of Kong Qi ﹙, 10 ﹚
In 11 ﹚ of Dan Pian Ji ﹙ U0 ﹚ and communications electronics Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙ and cycle are all set screen 14 ﹚ of electricity Lu ﹙；
Cycle screen 14 ﹚ of electricity Lu ﹙ by: Shu enter electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian survey Mo Kuai ﹙ V0 ﹚, first voltage Bi compare Qi ﹙ V1 ﹚ and
Second voltage Bi compare Qi ﹙ V2 ﹚ is constituted, and Shu enters electricity Lu ﹙ S0 ﹚ for point by mains AC voltage by resistance and diode
Pressure, is converted to the suitably stable input voltage of voltage comparator；
Single-chip microcontroller in 16 ﹚ of smart phone Ji ﹙ is equipped with I2C serial communication module, for being communicated between master controller.
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| CN201610454655.5A CN105894789B (en) | 2016-06-20 | 2016-06-20 | The Automatic meter reading system of tap water supply pipe network |
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| CN107272506A (en) * | 2017-07-27 | 2017-10-20 | 福州台江区超人电子有限公司 | A kind of shared electric bicycle system for parking registration in order |
| CN110007138B (en) * | 2018-06-10 | 2021-10-01 | 福州准点信息科技有限公司 | Electric energy metering system of residential quarter |
| CN108877191A (en) * | 2018-06-10 | 2018-11-23 | 福州准点信息科技有限公司 | A kind of residential area Water-flowmeter auto-recording |
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| CN105894789A (en) | 2016-08-24 |
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