CN106023570B - Automatic meter reading system for tap water supply pipe network - Google Patents
Automatic meter reading system for tap water supply pipe network Download PDFInfo
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- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
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Abstract
The invention relates to an automatic meter reading system for a tap water supply pipe network, which comprises a plurality of water meters, a controller and a main controller, wherein each water meter transmits measurement data to the controller through power line communication, and each controller scans and registers each water meter at regular time and gives an alarm to a management center when a fault is found. All the water meters, the controllers and the main controller thereof keep the system action consistent by adopting step time.
Description
(1) technical field：
The present invention relates to a kind of tap water supply pipe network Automatic meter reading system, the system include more water meters and controller and
Main controller, each water meter send measurement data to controller by power line communication, and each water meter is swept in each controller timing
Registration is retouched, discovery failure is alarmed to administrative center.Each water meter and its controller and main controller, which are all made of, keeps system synchronization time
Keep strokes.
(2) background technique：
The control system of power supply is provided by power network, each electronic equipment or intermodule are communicated by special circuit,
The timing time of each electronic equipment or electronic module is corrected, reaches synchronous operation purpose.Due to being made using special circuit communication
Wiring complicates and increases cost, if timing time is not corrected by line traffic, due to traditional timing error, runs number
After hour, accumulation timing error can make system control action inconsistent, may cause system crash, set in some frequent changes
Meter, its products application of the big occasion of wiring installation amount are restricted.
(3) summary of the invention：
A kind of tap water supply pipe network Automatic meter reading system, for recording user's water consumption.The system includes more number of elements evidences
The water meter and controller and main controller of output, each water meter send measurement data to controller by half wave communication of power line, respectively
Controller sends user's water usage data of acquisition to main controller also by half wave communication of power line, and main controller is periodically by user
Water usage data summarizes through GSM net to tap water supply administrative center.The water meter of data output is for example：Pulse exports water meter, surpasses
Sound wave water meter, electromagnetic flowmeter etc., every water meter are equipped with toggle switch, are both provided with number, each controller timing is to each water
Table is scanned registration, finds failure or is artificially moved away from system, alarms by the accident record and to administrative center.Each water meter and
Its controller and main controller are respectively mounted cycle discriminator circuit in device, and the synchronization time for generation system keeps system dynamic
Make unanimously, while communications electronics switch, a switch drive module being respectively installed in its telecommunication circuit.Above-mentioned apparatus is connected to together
On one electric power cable and master switch is set, is sent into system through diode after master switch, system is in the confession of half wave communication half-wave
Electricity condition.When communication, i.e., connection communications electronics switch closes conversely, main controller sends switching command to each water meter and its controller
Open close letter electronic switch.
Communication is by being controlled synchronization time to keep keeping strokes, and the communications electronics of main controller and each water meter, controller are opened
The switch drive module of pass is the end CLK for being followed by d type flip flop through resistance decompression, partial pressure from electric power cable, the Q termination of d type flip flop
The external interrupt mouth (INT0 or INT1) of single-chip microcontroller, the external interrupt mouth are set as level triggers.The end D of d type flip flop is grounded,
The end S connects with the I/O of single-chip microcontroller mouth, and original state S sets 1 in end.When the positive square-wave signal at the end CLK arrives, rising edge touches D
Hair device sets 0, and external interrupt mouth low level generates interruption, and so that the end S is set 0 in the interrupt service program makes d type flip flop set the 1 i.e. end Q
For 1, the Central Shanxi Plain is disconnected, is then communicated, and communications electronics switch is connected to single-chip microcontroller corresponding port according to used communication mode, goes forward side by side
Row signal condition, the end S, which sets 1, before sign off makes out the communication of the lower cycle of interrupt latency, so realizes that half-wave is logical in cycles
Letter.
SMS R-T unit is installed in system, using GSM network, is communicated with receiving and dispatching short message mode, at present
The SMS messaging service of GSM is still that a kind of highest SMS of short message service GSM of domestic popularity rate itself has data transmission function
Can, the transmission of a message just constitutes primary communication, and the transmission of message is by the SMS service center outside GSM
(SMSC) it is relayed, it does not have to dialing and can establish connection by the SMS service SMS of GSM, and user adds the information to be sent out
Stay of two nights data are sent to short message service center, are then forwarded to the final stay of two nights after short message service center completes storage.So
When GSM terminal is not switched on, information will not lose.
The present invention utilizes the positive half cycle ascent stage of power network cycle, and three examination point realizations is taken to sentence the identification of cycle signal
It is fixed, recycle the cycle time to establish synchronization time, the synchronous operation of each water meter and its controller and main controller in realization system.
The cycle discriminator circuit structural schematic diagram of each water meter and its controller and main controller by three as shown in Fig. 2, used
The voltage comparator of hysteresis loop comparator forms, and includes filter circuit, the benchmark of voltage comparator in each voltage comparator
Voltage is provided by voltage regulator circuit.Clock timer and synchrotimer is arranged in system.If detecting adjacent two cycles letter
Number be it is true, then take out the clock timer timing time between two adjacent cycle signal zero passages, be sequentially stored in cycle
In time memory cell, which can store 100 cycle times, when being filled with when one cycle of every deposit
Between, the cycle time being stored at first is first removed, and calculate the average value Tz of the cycle time of deposit and save, utilizes Tz
Value identifies cycle signal to be identified, and to reduce the influence of power network frequency fluctuation, while reducing erroneous judgement using three examination points can
It can property.
Three comparators are respectively used to three examination points, that is, screen point 0, screen point 1, screen point 2, as shown in Figure 1.In week
At the cycle zero passage of wave positive half cycle ascent stage, that is, 0 setting voltage zero-crossing comparator of point is screened, due to power network cycle negative half period quilt
Rectifier diode isolation, in order to improve detection accuracy, in the signal input part series diode isolation again of voltage zero-crossing comparator
Negative half period, reference voltage is increased to 10mv to 100mv from zero, and depending on the offset voltage of comparator, which can benefit
It is obtained with diode drop through electric resistance partial pressure.Remaining two comparator is separately positioned on cycle positive half cycle ascent stage, crest voltage
35% to 50% place examination point 1 and 50% to 70% place examination point 2.
Cycle signal determining：For single-chip microcontroller after setting time opens interruption, clock timer resets and starts timing, works as cycle
When voltage zero-cross, the output voltage overturning for screening the voltage Zero-cross comparator Qi ﹙ V0 ﹚ of point 0 is set, is generated in its voltage failing edge
It interrupts, records its zero crossing break period Th0 and the Central Shanxi Plain is disconnected；Hereafter, electricity pressure comparator ﹙ V1 ﹚ at point 1 is screened in single-chip microcontroller scanning
Output voltage, when all wave voltages are reached to the threshold voltage of ﹙ V1 ﹚, output voltage is overturn from high to low, and scanning is when recording its overturning
Between Th1；Same scanning record screens electricity at point 2 and presses comparator ﹙ V2 ﹚ output voltage flip-flop transition Th2.By Th0 and voltage zero-cross
The output voltage flip-flop transition setting value Ts0 of Bi compare Qi ﹙ V0 ﹚ makes comparisons；The output voltage of Th1 and electricity pressure comparator ﹙ V1 ﹚ are overturn
Time setting value Ts1 and Th2 makes comparisons respectively with the output voltage flip-flop transition setting value Ts2 of electricity pressure comparator ﹙ V2 ﹚, such as
For fruit within the scope of allowable error, then otherwise it is false that the discriminator signal detected, which is true,.When above-mentioned judgement discriminator signal is true,
Calculate the clock timer meter between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true
When time Tzu, it is made comparisons with the average value Tz of cycle time, if be no more than setting cycle time error Tzv if cycle
Signal is very, at this moment to save Tzu and 20ms is taken to be added with synchrotimer timing time, the value deposit synchrotimer that will add up
In.
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens the break period between 18.5ms
Open interruption when setting value Tk, the Central Shanxi Plain is disconnected when clock timer timing to 25ms is to pass break period setting value Tn between 27ms.
After system boot, clock timer starts timing, and when detecting first cycle voltage zero-cross, setting is being screened
The output voltage overturning of the voltage Zero-cross comparator Qi ﹙ V0 ﹚ of point 0 takes out the time T0 of cycle voltage over zero to generate interruption
It saves, clock timer is reset to and started timing, at this moment cycle time voltage crosses zero Th0 is 0, while single-chip microcontroller presses above-mentioned side
Method scans and determines discriminator signal.What it is due to detection is first cycle, and clock timer is started in cycle voltage zero-cross
Timing, the value of Th0, Th1 and Th2 must subtract open the difference of break period setting value Tk plus cycle time 20ms, if
Three discriminator signals are that very, the time T0 of the cycle voltage over zero of taking-up is stored in synchrotimer as initial time, under
It is primary to open the break period for the first time and take Tk.It otherwise is fictitious time, the clock timer time must add T0 at this time, continue to test.
When detecting first and adjacent second cycle voltage zero-cross, due to not saving the cycle time of detection,
Therefore the clock timer timing time twice between cycle signal zero passage is made comparisons with cycle time 20ms, determines cycle signal
Then it is that the difference for taking 20ms to subtract Th0 is added with synchrotimer timing time when being true, i.e., saves the standard cycle time for the first time
20ms need to deduct its Th0 value, this is because when hereafter detecting that cycle signal is true every time, when opening interruption by clock meter
When device reset after restart timing, and be that the standard cycle time is included in synchrotimer when opening interruption, open interruption
Clock timer is reset afterwards, otherwise determines that cycle signal is fictitious time, and the clock timer time must add T1=T0+Tk at this time, after
It is continuous to detect first cycle again according to the above method.After detecting first cycle signal is very, restore above-described cycle
Signal determining.
As shown in Figure 1, if detect cycle signal be it is false, open the break period next time and open the break period at this
Afterwards, open interruptions when average value Tz through the cycle time that is delayed, and open interrupt after be delayed Tns when the Central Shanxi Plain it is disconnected, when the setting Central Shanxi Plain is broken
Between be when cycle signal screen point 0 when do not generate interruption, at this moment must be in the setting time point more than Ts0 allowable error range
Start to scan, and when scanning examination point 1 and examination point 2, voltage comparator output voltage does not generate overturning, all breaks in the Central Shanxi Plain
The time Tns Central Shanxi Plain is disconnected and stops scanning, and Tns is:
Tns=Tn-Tk
If detecting that cycle signal is very, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from being opened after the break period takes Tk for the first time, clock timer is that timing to Tks opens interruption, and weight after resetting
New to start timing, the Central Shanxi Plain is broken when Tns is arrived in timing, to make the synchrotimer time by the correction of cycle time voltage crosses zero.
It repeats the above process.If the upper cycle signal detected is that very, when this cycle determines, discriminator signal is
Vacation, or the cycle time detected is more than setting cycle time error Tzv or clock meter compared with the average value Tz of cycle time
When device timing to when closing break period setting value Tns, voltage Zero-cross comparator device ﹙ V0 ﹚ output voltage do not overturn, does not generate
Disconnected, then when Tns is arrived in clock timer timing, the Central Shanxi Plain is disconnected, at this moment remembers and does not count cycle N 1 and to store, when opening interruption next time
Between be to open the break period in last time to open interruption after Tz, clock timer open interrupt after reset and timing, when timing is to Tns
The Central Shanxi Plain is disconnected, hereafter determines the cycle signal true and false every time, though if false or this detection discriminator signal be true last time be it is false, then take
N will be restored in memory after N+1.
When it is true for detecting cycle signal, then takes out N in memory and save, and by N zero setting in memory, and restore to make
With setting value Tks, the value of (N+1) × 20ms is at this moment taken to be added in synchrotimer.
System synchronization time is the time of synchrotimer, along with currently just in the time of the clock timer of timing.
When determining to screen the point signal true and false, Th0, Th1, Th2 are by setting with voltage comparator output voltage flip-flop transition
Definite value Ts0, Ts1, Ts2 make comparisons see it is whether overproof, come determine screen point a signal true and false, can choose：Th0, Th1, Th2 are
It is true that the cycle discriminator signal, which is true or Th0, when true, while when one of Th1, Th2 are true or when Th1, Th2 are true, should
Cycle discriminator signal is very, depending on to determining that cycle signal true and false difference requires.
If system fault, when N be greater than 25 to 70 between a setting value when, due to water meter each in system and its control
Device and main controller, the Tz value and N value of detection may be different, and at this moment, power network frequency accumulated error may cause time synchronisation
The device time is corrected when can not be by detecting true cycle signal, when it is true for detecting cycle signal, when at this moment using
The accumulative clocking value of clock timer is directly added in synchrotimer, and to reduce the asynchronous time of system, adding up clocking value is N
×Tz+20ms.N is much smaller than 25 in the case of power network normal operation.
The cycle time error Tzv of permission and the flip-flop transition setting value of voltage comparator output voltage, by test assessment
Its average value is taken to obtain.
(4) Detailed description of the invention：
Fig. 1 is that cycle screens data relationship schematic diagram；
Fig. 2 is cycle discriminator circuit structural schematic diagram；
Fig. 3 is a kind of circuit structure block diagram of tap water supply pipe network Automatic meter reading system.
(5) specific embodiment：
Fig. 3 is a kind of circuit structure block diagram of tap water supply pipe network Automatic meter reading system, including:10 ﹚ of Zhu Kong Qi ﹙,
Communications electronics open close 11 ﹚ of ﹙, switch drives 12 ﹚ of dynamic model block ﹙, SMS receives 13 ﹚, SIM card ﹙ of transmitting apparatus ﹙, 14 ﹚, control 15 ﹚ of device ﹙ processed,
Cycle screens 16 ﹚ of electricity Lu ﹙, 17 ﹚ of Shui Biao ﹙.Wherein 11 ﹚ of communications electronics Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙, cycle screen electricity Lu ﹙
List piece machine ﹙ U0 ﹚ is separately contained in 17 ﹚ of water table ﹙, control 15 ﹚ of device ﹙ and main 10 ﹚ of control device ﹙ processed in 16 ﹚ and Fig. 2.Wherein communication electricity
11 ﹚ of sub- Kai Guan ﹙ uses bidirectional triode thyristor as switch.
Fig. 2 is the structural schematic diagram that cycle screens 16 ﹚ of electricity Lu ﹙, by：Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian and surveys Mo Kuai ﹙
V0 ﹚, electricity pressure comparator ﹙ V1 ﹚ and electricity pressure comparator ﹙ V2 ﹚ are constituted.Dan Pian Ji ﹙ U0 ﹚ refers to 17 ﹚ of Shui Biao ﹙, 15 ﹚ of Kong Qi ﹙ and master
Single-chip microcontroller in 10 ﹚ of Kong Qi ﹙.Shu enters electricity Lu ﹙ S0 ﹚ for mains AC voltage to be passed through to the partial pressure of resistance and diode, turns
It is changed to the suitably stable input voltage of voltage comparator.Dan Pian Ji ﹙ U0 ﹚ uses 89C55WD, voltage zero-cross Jian to survey Mo Kuai ﹙
V0 ﹚, electricity pressure comparator ﹙ V1 ﹚, electricity pressure comparator ﹙ V2 ﹚ use dedicated voltage comparator LM339, and reference voltage is to use
The voltage regulator circuit of voltage-stabiliser tube carrys out the threshold voltage of burning voltage comparator.
When mains AC voltage cycle signal zero passage, voltage zero-cross Jian surveys the output voltage jump of Mo Kuai ﹙ V0 ﹚, single
Pian Ji ﹙ U0 ﹚ generates interruption, records the break period, while Dan Pian Ji ﹙ U0 ﹚ is also used to scanning voltage Bi compare Qi ﹙ V1 ﹚ and voltage ratio
The output voltage of compare Qi ﹙ V2 ﹚ records bound-time when output voltage jump, produces for determining power network cycle signal
Raw synchronization time.
Single chip computer89C51 realizes serial communication, the single-chip microcontroller by I2C bus and main controller in SMS R-T unit
89C51 also passes through serial line interface integrated circuit MAX232 and connect progress data exchange, gsm module chip with gsm module TC35i
TC35i is RS232 data port, supports AT Command Set, wherein contain the control to SMS, single chip computer89C51 is by GSM mould
Block sends a series of AT instructions, completes the initialization and receiving short message to gsm module.The transmitting-receiving of SMS uses TEXT mode,
TEXT mode is a kind of tactic pattern based on ASCII character.
Claims (2)
1. a kind of tap water supply pipe network Automatic meter reading system, characterized in that measurement data is passed through power line half-wave by each water meter
Communication sends controller to, and each controller sends user's water usage data of acquisition to master control also by half wave communication of power line
Device, main controller periodically summarize user's water usage data through GSM net to tap water supply administrative center, and each controller timing is to each
Water meter is scanned registration, finds failure or is artificially moved away from system, alarms by the accident record and to administrative center, each water meter
And its controller and main controller, cycle discriminator circuit is respectively mounted in device, for the synchronization time of generation system, while at it
One communications electronics switch, switch drive module are respectively installed, power network is to send after master switch through diode in telecommunication circuit
Enter system, communication is the switch drive module of main controller and each water meter, controller by being controlled synchronization time to keep keeping strokes
It is the end CLK for being followed by d type flip flop through resistance decompression, partial pressure from electric power cable, the external interrupt of the Q termination single-chip microcontroller of d type flip flop
Mouthful, when the positive square-wave signal at the end CLK arrives, rising edge makes d type flip flop set 0, and external interrupt mouth low level generates interruption, into
Row communicates, and is equipped with SMS R-T unit in system, using GSM network, is communicated with receiving and dispatching short message mode；
Cycle discriminator circuit is the positive half cycle ascent stage using power network cycle, takes three to screen knowledge of the point realization to cycle signal
Do not determine, recycle the cycle time to establish synchronization time, clock timer and synchrotimer is arranged in system, if detecting phase
Two adjacent cycle signals are very, then to take out the clock timer timing time between two adjacent cycle signal zero passages
That is the cycle time is sequentially stored in cycle time memory cell, is filled with the one cycle time of every deposit when 100 cycle time,
The cycle time being stored at first is first removed, and calculates the average value Tz of the cycle time of deposit and saves, utilizes Tz value
Identify cycle signal to be identified；
Three comparators are respectively used to three examination points, that is, screen point 0, screen point 1, screen point 2, in the cycle positive half cycle ascent stage
Cycle zero passage at, that is, screen point 0 setting a voltage zero-crossing comparator, concatenate two again in the signal input part of voltage zero-crossing comparator
Negative half period is isolated in pole pipe, and reference voltage is 10mv to 100mv, and depending on the offset voltage of comparator, which is utilized
Diode drop is obtained through electric resistance partial pressure, remaining two comparator is separately positioned on the cycle positive half cycle ascent stage, crest voltage
The examination point 2 of the examination point 1 and 50% to 70% place at 35% to 50% place；
Cycle signal determining process：For single-chip microcontroller after setting time opens interruption, clock timer resets and starts timing, works as cycle
When voltage zero-cross, the output voltage overturning for the voltage zero-crossing comparator for screening point 0 is set, in the generation of its voltage failing edge
It is disconnected, it records its cycle time voltage crosses zero Th0 and the Central Shanxi Plain is disconnected；Hereafter, first voltage Bi compare Qi ﹙ at point 1 is screened in single-chip microcontroller scanning
The output voltage of V1 ﹚, when all wave voltages reach first voltage than threshold voltage compared with device ﹙ V1 ﹚, output voltage turns over from high to low
Turn, scanning records its flip-flop transition Th1；Second voltage Bi compare Qi ﹙ V2 ﹚ output voltage turns at same scanning record examination point 2
Turn time Th2, if the flip-flop transition Th1 and Th2 within the scope of allowable error, the discriminator signal detected be it is true, it is no
Then be it is false, when above-mentioned judgement discriminator signal is true, when to calculate this cycle signal zero passage and an adjacent preceding discriminator signal be true
Cycle signal zero passage between clock timer timing time Tzu, it is made comparisons with the average value Tz of cycle time, if not
More than set cycle time error Tzv then cycle signal be it is true, at this moment save and Tzu and take 20ms and synchrotimer timing time
It is added, in the value deposit synchrotimer that will add up；
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens break period setting between 18.5ms
Open interruption when value Tk, the Central Shanxi Plain is disconnected when clock timer timing to 25ms is to pass break period setting value Tn between 27ms；
When detecting first cycle voltage zero-cross, the output voltage overturning for the voltage zero-crossing comparator for screening point 0 is set,
To generate interruption, time T0 for taking out cycle voltage over zero is saved, and clock timer is reset to and started timing, at this moment all
Wave voltage zero-crossing timing Th0 is 0, and single-chip microcontroller scans and determine discriminator signal, and the value of Th0, Th1 and Th2 must add cycle
Time 20ms subtracts out the difference of break period setting value Tk, if three discriminator signals are true, the cycle voltage zero-cross of taking-up
As in initial time deposit synchrotimer, the break period of opening for detecting cycle voltage over zero next time takes the time T0 of point
Tk, otherwise having a discriminator signal is fictitious time, and the clock timer time must add T0 at this time, is continued to test；
It is then that 20ms is taken to subtract when determining that cycle signal is true when detecting first and second adjacent cycle voltage zero-cross
The difference of Th0 is added with synchrotimer timing time, and clock timer is reset after opening interruption, otherwise determines that cycle signal is false
When, the clock timer time must add T1, T1=T0+Tk at this time, first cycle be detected again, when first cycle letter of detection
Number be very after, restore above-described cycle signal determining；
If detecting that cycle signal is vacation, the break period is opened next time after this opens the break period, when through delay cycle
Between average value Tz when open interruption, and open interrupt after be delayed Tns when the Central Shanxi Plain it is disconnected, it is when cycle signal is discriminated that the break period is closed in setting
Not Wei fictitious time the Central Shanxi Plain break period Tns is disconnected and stop scanning, and Tns is closing:
Tns=Tn-Tk
If detecting that cycle signal is very, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from being opened after the break period takes Tk for the first time, clock timer is that timing to Tks opens interruption, and opens again after resetting
Beginning timing, the Central Shanxi Plain is disconnected when timing is to Tns, repeats above-mentioned cycle signal determining process, if the upper cycle letter detected
Number be it is true, when this cycle determines, discriminator signal be it is false, then when Tns is arrived in clock timer timing, the Central Shanxi Plain is broken, and at this moment remembers cycle
N is 1 and stores that opening the break period next time is to open the break period in last time to open interruption after Tz, and clock timer is in opening
It has no progeny clearing and timing, the Central Shanxi Plain is disconnected when Tns is arrived in timing, hereafter determines the cycle signal true and false every time, if false or this detection Zhen
Though level signal is true but last time is vacation, then stored N is taken out, and will restore in the memory of storage N after N+1；
It when it is true for detecting cycle signal, then takes out in memory N and saves, and by N zero setting in memory, and restore using setting
At this moment definite value Tks takes the value of (N+1) × 20ms to be added in synchrotimer；
System synchronization time is the time of synchrotimer, along with currently just in the time of the clock timer of timing；
And it selects：Cycle signal is true when Th0, Th1, Th2 are true or Th0 is true, while when one of Th1, Th2 are true,
Or Th1, Th2 be when being true, cycle signal be it is true, if N be greater than 25 to 70 between a setting value when, using clock timer
Accumulative clocking value be directly added in synchrotimer, add up clocking value be N × Tz+20ms.
2. a kind of tap water supply pipe network Automatic meter reading system according to claim 1, it is characterised in that including:
Main 10 ﹚ of control device ﹙, communications electronics, which are opened, closes 11 ﹚ of ﹙, switch drive 12 ﹚ of dynamic model block ﹙, SMS receipts 13 ﹚, SIM card ﹙ of transmitting apparatus ﹙
14 ﹚, 15 ﹚ of Kong Qi ﹙, cycle screen 16 ﹚ of electricity Lu ﹙, 17 ﹚ of Shui Biao ﹙, wherein 11 ﹚ of Dan Pian Ji ﹙ U0 ﹚ and communications electronics Kai Guan ﹙, open
It closes drive 12 ﹚ of dynamic model block ﹙ and cycle screens 16 ﹚ of electricity road ﹙ and is separately contained in 17 ﹚ of water table ﹙, control 15 ﹚ of device ﹙ and main 10 ﹚ of control device ﹙ processed
In；
Cycle screens 16 ﹚ of electricity Lu ﹙, by：Shu enter electricity Lu ﹙ S0 ﹚, voltage Zero-cross comparator Qi ﹙ V0 ﹚, screen point 1 at first voltage compare
Qi ﹙ V1 ﹚ is constituted with second voltage Bi compare Qi ﹙ V2 ﹚ at point 2 is screened, and Shu enters electricity Lu ﹙ S0 ﹚ for passing through mains AC voltage
The partial pressure of resistance and diode is converted to the suitably stable input voltage of voltage comparator；
Single chip computer89C51 realizes serial communication, the single-chip microcontroller by I2C bus and main controller in SMS R-T unit
89C51 also passes through serial port MAX232 and connect progress data exchange with gsm module TC35i.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2230929Y (en) * | 1994-10-06 | 1996-07-10 | 吴子方 | Electric meter |
| JP2001256583A (en) * | 2000-03-08 | 2001-09-21 | Toyo Keiki Co Ltd | Automatic meter reading system |
| CN101256210A (en) * | 2008-03-26 | 2008-09-03 | 首都师范大学 | Three-phase electric energy meter based on NIOS II microprocessor |
| JP2011250300A (en) * | 2010-05-28 | 2011-12-08 | Panasonic Electric Works Co Ltd | Remote meter reading system |
| JP2015186388A (en) * | 2014-03-25 | 2015-10-22 | 株式会社東芝 | Watt-hour meter for automatic meter reading system and power failure monitoring system |
-
2016
- 2016-06-20 CN CN201610447926.4A patent/CN106023570B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2230929Y (en) * | 1994-10-06 | 1996-07-10 | 吴子方 | Electric meter |
| JP2001256583A (en) * | 2000-03-08 | 2001-09-21 | Toyo Keiki Co Ltd | Automatic meter reading system |
| CN101256210A (en) * | 2008-03-26 | 2008-09-03 | 首都师范大学 | Three-phase electric energy meter based on NIOS II microprocessor |
| JP2011250300A (en) * | 2010-05-28 | 2011-12-08 | Panasonic Electric Works Co Ltd | Remote meter reading system |
| JP2015186388A (en) * | 2014-03-25 | 2015-10-22 | 株式会社東芝 | Watt-hour meter for automatic meter reading system and power failure monitoring system |
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