CN105867160B - A kind of home furnishings intelligent networked control systems - Google Patents
A kind of home furnishings intelligent networked control systems Download PDFInfo
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B15/00—Systems controlled by a computer
- G05B15/02—Systems controlled by a computer electric
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
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Abstract
The present invention relates to a kind of home furnishings intelligent networked control systems, include multiple appliance controllers and a main controller.The output of each appliance controller is serially connected on former socket or switch, realizes that it loads energized power and the control of time, it is convenient to change design, wall paper line need not be broken, SMS R-T unit is installed, main controller utilizes GSM network, communicates to receive and dispatch short message mode with owner in system.
Description
(1) technical field：
The present invention relates to a kind of home furnishings intelligent networked control systems, include multiple appliance controllers and a main controller.Each
The output of appliance controller is serially connected on former socket or switch, realizes that it loads energized power and the control of time, change are set
Meter is convenient, without broken wall paper line.SMS R-T unit is installed, main controller utilizes GSM network, to receive and dispatch short message in system
Mode communicates with owner.
(2) background technology：
The control system of power supply is provided by power network, each electronic equipment or intermodule are communicated by special circuit,
The timing time of each electronic equipment or electronic module is corrected, reaches synchronous operation purpose.Due to being made using special circuit communication
Wiring complicates and increases cost, if timing time is not corrected by line traffic, due to traditional timing error, runs number
After hour, accumulation timing error can make system control action inconsistent, may cause system crash, and at some, often change is set
Meter, its products application of the big occasion of wiring installation amount are restricted.
(3) content of the invention：
A kind of home furnishings intelligent networked control systems include multiple appliance controllers and a main controller.Household housing unit room
Miniature circuit breaker is switched comprising multichannel independent air on main switchboard, it is that guide tracked installation and presser type wiring reconfiguration are convenient,
Each air switch control electric appliance load, such as socket, illumination are electric appliance load etc. all the way, need to select according to system all the way
One air switch fills an electronic switch after air switch, the electronic switch parallel connection isolating diode, main during communication
Control device shut-off electronic switch simultaneously connects its communications electronics switch, alternating current is sent into system through isolating diode, system is in through electricity
Half wave communication half-wave power supply state of the line of force.Cycle discriminator circuit is respectively mounted in main controller and each appliance controller, for generating
The synchronization time of system keeps system to keep strokes, while communications electronics switch, a switch are respectively installed in its telecommunication circuit
Drive module.The output of each appliance controller is serially connected with through Phototube Coupling and bidirectional triode thyristor in former socket or on-off circuit,
It realizes that it loads energized power and the control of time, changes design conveniently, without broken wall paper line.Select 2 to 3 appliance controllers
Preset optimization is stewed, boiled, boiling in a covered pot over a slow fire, simmering, enduring, boiling medicine and a variety of utility programs such as electric fan natural wind, ordinary appliances such as electric food warmer,
Any one described socket of the insertion such as electric frying pan, medicine decocting tank, electric fan and headlamp inputs the pattern of above-mentioned utility program, just
Make the intelligent operation of above-mentioned ordinary appliances.Main controller communicated by GSM nets with owner, and main controller is in setting time or receives
Mobile phone short message instructions perform the switching action from all-wave to half-wave, it is necessary to during half wave communication.When each appliance controller is being set
Half-wave call duration time or and detect power network be isolated diode blocking half-wave there is no signal, system is in half-wave state
When, that is, its electric appliance load power supply is cut off, communications electronics switch is then connected, system is made to be in half-wave communications status；Conversely, when from
Before half-wave is switched to all-wave, main controller first sends switching command to each appliance controller, and shut-off communications electronics switch connects electric appliance
Power supply.
Appliance controller panel fills the LED light of 3-5 different colours, when one section after offline individually just start is specific
Between when showing red, shutdown is started shooting again into numbering, and panel is sequentially shown 1 time or 2 LED modules with different colors lamps are one group
Close (such as be for the 1st time or the 2nd time：Red, green, blue, red green, bluish-green, red indigo plant, RGB etc. one of them), be shown as one 2 times
During combination, the 1st display time control was identified at 1-2 seconds according to the preset dead time of display as the end of a combination,
Each combination is corresponding with the number of number, which is affixed on panel.One combination shutdown of selection, obtains combining phase with this
Corresponding unique number simultaneously preserves, labeling know, it be in the number period when can't detect grid cyclic wave signal, microcontroller according to
Number data are stored in nonvolatile storage by the energy storage by its power capacitor.The numbering is easily changed number number,
From erosions such as dust, water droplets, securely and reliably.
The switch drive module of communications electronics switch is to divide two-way after resistance is depressured from electric power cable, all the way for each electricity
Device controller, it is connected to the single-chip processor i/o mouth of each appliance controller through reversal connection diode, is born in clock timer timing to cycle
During half-wave, the I/O mouthfuls is scanned, if being in half-wave communications status without signal, that is, system.Another way is used for each appliance controller
And main controller, therebetween communication are to be controlled by synchronization time to keep keeping strokes, which is followed by d type flip flop through electric resistance partial pressure
CLK ends, the external interrupt mouth (INT0 or INT1) of the Q termination microcontrollers of d type flip flop, fracture is arranged to level triggers in this.D is touched
The D ends ground connection of device is sent out, S ends connect with the I/O mouths of microcontroller, and original state S puts 1 in end.When the positive square-wave signal at CLK ends arrives
When, rising edge makes d type flip flop set to 0 middle fracture low level generation interruption, and first setting to 0 S ends in interrupt service routine triggers D
Device puts 1 i.e. Q ends as 1 and the Central Shanxi Plain is broken, and then communicates, it is corresponding that communications electronics switch according to used communication mode is connected to microcontroller
Port, and signal condition is carried out, S, which puts at end 1, before sign off makes out the communication of the lower cycle of interrupt latency, so real in cycles
Now half wave communication.
SMS R-T unit in system is installed, using GSM network, is led to receiving and dispatching short message mode with owner
Letter, the SMS messaging service of GSM at present is still that a kind of highest SMS of short message service GSM of domestic popularity rate possesses data in itself
Transmitting function, the transmission of a message, which just constitutes, once to communicate, and the transmission of message is the Short Message Service by being in outside GSM
(SMSC) is relayed at center, it does not have to dialing and can establish connection by the SMS service SMS of GSM, and user is the information to be sent out
In addition stay of two nights data sending is then forwarded to the final stay of two nights to short message service center after short message service center completes storage.
So information will not lose when the no start of GSM terminals.
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three to screen point and realize and the identification of cycle signal is sentenced
It is fixed, the cycle time is recycled to establish synchronization time, the synchronous operation of main controller and each appliance controller in realization system.
The cycle discriminator circuit structure diagram of main controller and each appliance controller by three as shown in Fig. 2, use hysteresis
The voltage comparator of comparator forms, comprising filter circuit, the reference voltage of voltage comparator in each voltage comparator
It is provided by regulator circuit.System sets clock timer and synchrotimer.If detect that two adjacent cycle signals are equal
It is true, then takes out the clock timer timing time between this two adjacent cycle signal zero passages, is sequentially stored in the cycle time
In storage unit, which can store 100 cycle times, a cycle time is often stored in when being filled with,
The cycle time being stored at first is first removed, and calculates the average value Tz of the cycle time of deposit and preserves, is reflected using Tz values
Cycle signal not to be identified reduces erroneous judgement possibility to reduce the influence of power network frequency fluctuation, while screen point using three.
Three comparators are respectively used to three examination points, that is, screen point 0, screen point 1, screen point 2, as shown in Figure 1.In week
At the cycle zero passage of ripple positive half cycle ascent stage, that is, screen point 0 and voltage zero-crossing comparator is set, due to power network cycle negative half period quilt
Rectifier diode is isolated, in order to improve accuracy of detection, in the signal input part series diode isolation again of voltage zero-crossing comparator
Negative half period, reference voltage is increased to 10mv to 100mv from zero, and depending on the offset voltage of comparator, which can profit
It is obtained with diode drop through electric resistance partial pressure.Remaining two comparator is separately positioned on cycle positive half cycle ascent stage, crest voltage
35% to 50% place examination point 1 and 50% to 70% place examination point 2.
Cycle signal determining：After setting time opens interruption, clock timer resets and starts timing microcontroller, works as cycle
During voltage zero-cross, the output voltage overturning for the voltage Zero-cross comparator Qi ﹙ V0 ﹚ for screening point 0 is arranged on, is generated in its voltage trailing edge
It interrupts, records its zero crossing break period Th0 and the Central Shanxi Plain is broken；Hereafter, electricity pressure comparator ﹙ V1 ﹚ at point 1 are screened in microcontroller scanning
Output voltage, when all wave voltages are reached to the threshold voltage of ﹙ V1 ﹚, output voltage is overturn from high to low, when scanning records its overturning
Between Th1；Similary scanning record screens electricity pressure comparator ﹙ V2 ﹚ output voltage flip-flop transition Th2 at point 2, by Th0 and voltage zero-cross
The output voltage flip-flop transition setting value Ts0 of Bi compare Qi ﹙ V0 ﹚ makes comparisons；The output voltage of Th1 and electricity pressure comparator ﹙ V1 ﹚ are overturn
Time setting value Ts1 and Th2 makes comparisons respectively with the output voltage flip-flop transition setting value Ts2 of electricity pressure comparator ﹙ V2 ﹚, such as
For fruit in the range of allowable error, then the discriminator signal detected is true, is otherwise false.When above-mentioned judgement discriminator signal is true,
Calculate the clock timer meter between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true
When time Tzu, it is made comparisons with the average value Tz of cycle time, the cycle if no more than setting cycle time error Tzv
Signal is true, at this moment preserves Tzu and 20ms is taken to be added with synchrotimer timing time, the value deposit synchrotimer that will add up
In.
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens the break period between 18.5ms
Open interruption during setting value Tk, clock timer timing to 25ms to Central Shanxi Plain during pass break period setting value Tn between 27ms is broken.
After system boot, clock timer starts timing, when detecting first cycle voltage zero-cross, is arranged on examination
The output voltage overturning of the voltage Zero-cross comparator Qi ﹙ V0 ﹚ of point 0, interrupts so as to generate, takes out the time T0 of cycle voltage over zero
It preserves, clock timer is reset and starts timing, at this moment cycle time voltage crosses zero Th0 is 0, while microcontroller presses above-mentioned side
Method scans and judges discriminator signal.What it is due to detection is first cycle, and clock timer is started in cycle voltage zero-cross
Timing, the value of Th0, Th1 and Th2 must add the difference that cycle time 20ms subtracts out break period setting value Tk, if
Three discriminator signals are true, and the time T0 of the cycle voltage over zero of taking-up is stored in as initial time in synchrotimer, under
Once i.e. opening the break period for the first time takes Tk.Otherwise for fictitious time, at this time the clock timer time must add T0, continue to detect.
When detecting first and second adjacent cycle voltage zero-cross, due to not preserving the cycle time of detection,
Therefore the clock timer timing time twice between cycle signal zero passage is made comparisons with cycle time 20ms, judges cycle signal
Then it is that the difference that 20ms is taken to subtract Th0 is added with synchrotimer timing time when being true, i.e., preserves the standard cycle time for the first time
20ms need to deduct its Th0 value, this is because when hereafter to detect cycle signal every time be true, by clock meter when opening interruption
When device reset after restart timing, and be that the standard cycle time is included in synchrotimer when opening interruption, open interruption
Afterwards clock timer reset, otherwise judge cycle signal be fictitious time, at this time the clock timer time must add T1=T0+Tk, after
It is continuous to detect first cycle again as stated above.After it is very to detect first cycle signal, recover above-described cycle
Signal determining.
If as shown in Figure 1, detecting that cycle signal is false, the break period is opened next time and opens the break period at this
Afterwards, open interruptions during average value Tz through the cycle time that is delayed, and open interrupt after be delayed Tns when the Central Shanxi Plain break, when setting the Central Shanxi Plain to break
Between be when cycle signal screen point 0 when do not generating interruption, at this moment must be in the setting time point more than Ts0 allowable error scopes
When starting to scan and scanning examination point 1 and screen point 2, voltage comparator output voltage does not generate overturning, all breaks in the Central Shanxi Plain
Scanning is broken and is stopped in the time Tns Central Shanxi Plain, and Tns is:
Tns=Tn-Tk
If it is true to detect cycle signal, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and weight after resetting
New to start timing, timing is broken to Central Shanxi Plain during Tns, so that the synchrotimer time is corrected be subject to cycle time voltage crosses zero.
It repeats the above process.If the upper cycle signal detected is true, when this cycle judges, discriminator signal is
Vacation or the cycle time detected are more than setting cycle time error Tzv or clock meter compared with the average value Tz of cycle time
When device timing to close break period setting value Tns when, voltage Zero-cross comparator device ﹙ V0 ﹚ output voltages are not overturn, in not generating
Disconnected, then when clock timer timing is to Tns, the Central Shanxi Plain is broken, and at this moment remembers that not counting cycle N is 1 and stores, when opening interruption next time
Between be to open the break period in last time to open interruption after Tz, hereafter every time judge the cycle signal true and false, if false or this detection
Though discriminator signal is true but last time is false, then N is taken, will be restored after N+1 in memory, clock timer is not reset after interruption is opened
Continue timing, at this moment, next cycle of setting opens the break period and temporarily uses out break period interim setting value Tkz instead：
Tkz=(N+1) × Tz
Meanwhile next cycle closes break period temporary use instead and closes break period interim setting value Tnz：
Tnz=Tkz+Tns
When clock timer to after Tkz, the time that point is screened in scanning can be obtained by simple computation.If it at this moment examines
It is true to measure cycle signal, then takes out in memory N and preserve, and by N zero setting in memory, makes clock timer clocking value Ts
For：(Ts-Tkz) at this moment → Ts takes the value of (N+1) × 20ms to be added in synchrotimer, and recover using setting value Tks with
Tns, recovered clock timer are reset after interruption is opened.
The system synchronization time be synchrotimer time, along with currently just timing clock timer time.
When judging to screen the point signal true and false, Th0, Th1, Th2 are by being set with voltage comparator output voltage flip-flop transition
Definite value Ts0, Ts1, Ts2 make comparisons see it is whether overproof, come judge screen point a signal true and false, can select：Th0, Th1, Th2 are
The cycle discriminator signal is true when true or Th0 is true, while when one of Th1, Th2 are true or when Th1, Th2 are true, it should
Cycle discriminator signal is true, depending on to judging the different requirements of the cycle signal true and false.
If system fault, when N is more than a setting value between 25 to 70, due to main controller in system and each electric appliance
Controller, Tz values and the N values of detection may be different, at this moment, power network frequency accumulated error, when may cause synchrotimer
Between corrected when can not be by detecting true cycle signal, when it is true to detect cycle signal, using clock timer
Clocking value at Tkz is directly added in synchrotimer, to reduce the asynchronous time of system, power network normal operation situation
Lower N is much smaller than 25.
The cycle time error Tzv of permission and the flip-flop transition setting value of voltage comparator output voltage, by test assessment
Its average value is taken to obtain.
(4) illustrate：
Fig. 1 is that cycle screens data relationship schematic diagram；
Fig. 2 is cycle discriminator circuit structure diagram；
Fig. 3 is a kind of circuit structure block diagram of home furnishings intelligent networked control systems.
(5) specific embodiment：
Fig. 3 is that a kind of home intelligence control system circuit block diagram includes:10 ﹚ of Zhu Kong Qi ﹙, communications electronics are opened
Close 11 ﹚ of ﹙, switch drives 12 ﹚ of dynamic model block ﹙, SMS receives 13 ﹚, SIM card ﹙ of transmitting apparatus ﹙, 14 ﹚, electric 15 ﹚ of device ﹙, cycle screen electricity road ﹙
16 ﹚, electricity device Kong Qi ﹙, 17 ﹚, 18 ﹚ of electricity Kai Guan ﹙.Wherein 11 ﹚ of communications electronics Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙ and cycle are discriminated
Dan Pian Ji ﹙ U0 ﹚ are respectively included in 17 ﹚ and Zhu Kong Qi ﹙ of electricity device Kong Qi ﹙, 10 ﹚ in other 16 ﹚ and Fig. 2 of electricity Lu ﹙.Electricity Kai Guan ﹙
18 ﹚, 11 ﹚ of communications electronics Kai Guan ﹙ use bidirectional triode thyristor as switch.15 ﹚ of electricity Qi ﹙ refer to the original electricity being connected in on-off circuit
Device.
Fig. 2 is the structure diagram that cycle screens 16 ﹚ of electricity Lu ﹙, by：Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian and surveys Mo Kuai ﹙
V0 ﹚, electricity pressure comparator ﹙ V1 ﹚ and electricity pressure comparator ﹙ V2 ﹚ are formed.Dan Pian Ji ﹙ U0 ﹚ are 17 ﹚ and Zhu Kong Qi ﹙ of electricity device Kong Qi ﹙, 10 ﹚
In microcontroller.Shu enters electricity Lu ﹙ S0 ﹚ for the partial pressure by mains AC voltage by resistance and diode, is converted to voltage
The suitably stable input voltage of comparator.Dan Pian Ji ﹙ U0 ﹚ use 89C55WD, voltage zero-cross Jian to survey Mo Kuai ﹙ V0 ﹚, voltage ratio
Compared with device ﹙ V1 ﹚, electricity pressure comparator ﹙ V2 ﹚ using dedicated voltage comparator LM339, reference voltage is the voltage stabilizing using voltage-stabiliser tube
Circuit carrys out the threshold voltage of burning voltage comparator.
When mains AC voltage cycle signal zero passage, voltage zero-cross Jian surveys the output voltage saltus step of Mo Kuai ﹙ V0 ﹚, single
Pian Ji ﹙ U0 ﹚ generate interruption, record the break period, while Dan Pian Ji ﹙ U0 ﹚ are additionally operable to scanning voltage Bi compare Qi ﹙ V1 ﹚ and voltage ratio
The output voltage of compare Qi ﹙ V2 ﹚, bound-time is recorded when output voltage saltus step, for judging power network cycle signal so as to producing
Raw synchronization time.
Single chip computer89C51 realizes serial communication, the microcontroller by I2C buses and main controller in SMS R-T unit
89C51 is connected also by serial line interface integrated circuit MAX232 with gsm module TC35i carries out data exchange, gsm module chip
TC35i is RS232 data ports, supports AT Command Set, wherein contain the control to SMS, single chip computer89C51 is by GSM moulds
Block sends a series of AT instructions, completes the initialization to gsm module and receiving short message.The transmitting-receiving of SMS uses TEXT patterns,
TEXT patterns are a kind of tactic patterns based on ASCII character.
Claims (2)
1. a kind of home furnishings intelligent networked control systems, it is characterized in that, an electronic switch, the electronic switch are filled after air switch
Isolating diode in parallel, during communication, main controller shut-off electronic switch simultaneously connects its communications electronics switch, by alternating current through isolating two poles
Pipe is sent into system, and system is in the half wave communication half-wave power supply state through power line, pacifies in main controller and each appliance controller
Fill cycle discriminator circuit, for the synchronization time of generation system, while respectively install in telecommunication circuit a communications electronics switch,
Switch drive module, the output of each appliance controller are serially connected with socket or on-off circuit through Phototube Coupling and bidirectional triode thyristor
In, realize that it loads energized power and the control of time；A variety of utility programs of the preset optimization of 2 to 3 appliance controllers are selected,
Any one described socket of ordinary appliances insertion inputs the pattern of above-mentioned utility program, just makes the intelligent operation of above-mentioned ordinary appliances；
Each appliance controller setting half-wave call duration time or and detect power network be isolated diode blocking half-wave do not believe
Number when, that is, connect communications electronics switch；
Appliance controller panel fills the LED light of 3-5 different colours, and when just the display of start specific time is red, shutdown is opened again
Machine enters numbering, sequentially shows 1 time or 2 LED modules with different colors lamps are a combination, the 1st display time control is in 1-2
Second, it is identified according to the preset dead time of display as the end of a combination, selects a combination shutdown, obtain combining phase with this
Corresponding number simultaneously preserves, and in the number period when can't detect grid cyclic wave signal, microcontroller relies on the storage of its power capacitor
Number data can be stored in nonvolatile storage；
The switch drive module of the communications electronics switch is to divide two-way after resistance is depressured from power network, all the way two through reversal connection
Pole pipe is connected to the single-chip processor i/o mouth of each appliance controller, when half-wave is born in clock timer timing to cycle, scans the I/O mouthfuls,
If being in half-wave communications status without signal, that is, system, another way is used for each appliance controller and main controller, through electric resistance partial pressure
It is followed by the CLK ends of d type flip flop, the external interrupt mouth of the Q termination microcontrollers of d type flip flop, when the positive square-wave signal at CLK ends arrives
When, rising edge makes d type flip flop set to 0 middle fracture low level generation interruption, communicates, and SMS transmitting-receiving is equipped in system
Device using GSM network, is communicated with receiving and dispatching short message mode with owner；
Cycle discriminator circuit is the positive half cycle ascent stage using power network cycle, takes three to screen knowledge of the point realization to cycle signal
Do not judge, the cycle time is recycled to establish synchronization time, and system sets clock timer and synchrotimer, if detecting phase
Two adjacent cycle signals are true, then when taking out the clock timer timing between this two adjacent cycle signal zero passages
Between, it is sequentially stored in cycle time memory cell, a cycle time is often stored in when being filled with 100 cycle time, is first removed
The cycle time being stored at first, and calculate the average value Tz of the cycle time of deposit and preserve, differentiated using Tz values and wait to know
Other cycle signal；
Three comparators are respectively used to three examination points, that is, screen point 0, screen point 1, screen point 2, in the cycle positive half cycle ascent stage
Cycle zero passage at, that is, screen point 0 set a voltage zero-crossing comparator, concatenate two again in the signal input part of voltage zero-crossing comparator
Pole pipe isolates negative half period, and reference voltage is 10mv to 100mv, and depending on the offset voltage of comparator, which utilizes
Diode drop is obtained through electric resistance partial pressure, remaining two comparator is separately positioned on the cycle positive half cycle ascent stage, crest voltage
The examination point 1 at 35% to 50% place and the examination point 2 at 50% to 70% place；
Cycle signal determining process：After setting time opens interruption, clock timer resets and starts timing microcontroller, works as cycle
During voltage zero-cross, the output voltage overturning for the voltage zero-crossing comparator for screening point 0 is arranged on, in the generation of its voltage trailing edge
It is disconnected, it records its zero crossing break period Th0 and the Central Shanxi Plain is broken；Hereafter, the defeated of electricity pressure comparator ﹙ V1 ﹚ at point 1 is screened in microcontroller scanning
Go out voltage, when all wave voltages reach the threshold voltage of electricity pressure comparator ﹙ V1 ﹚, output voltage is overturn from high to low, scanning record
Its flip-flop transition Th1；Similary scanning record screens the flip-flop transition Th2 of electricity pressure comparator ﹙ V2 ﹚ output voltages at point 2, if institute
Flip-flop transition Th1 and Th2 is stated in the range of allowable error, then the discriminator signal detected is true, is otherwise false, above-mentioned judgement is discriminated
When level signal is true, calculate between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true
Clock timer timing time Tzu makes comparisons it with the average value Tz of cycle time, if missed no more than the setting cycle time
Then cycle signal is true to poor Tzv, at this moment preserves Tzu and 20ms is taken to be added with synchrotimer timing time, the value that will add up is deposited
Enter in synchrotimer；
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens break period setting between 18.5ms
Open interruption during value Tk, clock timer timing to 25ms to Central Shanxi Plain during pass break period setting value Tn between 27ms is broken；
When detecting first cycle voltage zero-cross, the output voltage overturning for the voltage zero-crossing comparator for screening point 0 is arranged on,
It is interrupted so as to generate, the time T0 for taking out cycle voltage over zero is preserved, and clock timer is reset and starts timing, at this moment all
Wave voltage zero-crossing timing Th0 is 0, and microcontroller scans and judges discriminator signal, and the value of Th0, Th1 and Th2 must add cycle
Time 20ms subtracts out the difference of break period setting value Tk, if three discriminator signals are true, the cycle voltage zero-cross of taking-up
Otherwise the time T0 of point has one as in initial time deposit synchrotimer, being to open the break period for the first time to take Tk next time
A discriminator signal be fictitious time, at this time the clock timer time must add T0, continue to detect；
Then it is that 20ms is taken to subtract when it is true to detect first and second adjacent cycle voltage zero-cross judgement cycle signal
The difference of Th0 is added with synchrotimer timing time, and clock timer is reset after opening interruption, and it is false otherwise to judge cycle signal
When, at this time the clock timer time must add T1=T0+Tk, again detect first cycle, when detect first cycle signal
Be very after, recover above-described cycle signal determining；
If it is false to detect cycle signal, open the break period next time after this opens the break period, through be delayed cycle when
Between average value Tz when open interruption, and open interrupt after be delayed Tns when the Central Shanxi Plain break, it is when cycle signal is discriminated to set and close the break period
Not Wei fictitious time, break and stop to scan closing the break period Tns Central Shanxi Plain, Tns is:
Tns=Tn-Tk
If it is true to detect cycle signal, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and is opened again after resetting
Beginning timing, timing are broken to Central Shanxi Plain during Tns, repeat above-mentioned cycle signal determining process, if the upper cycle letter detected
Number it is true, when this cycle judges, discriminator signal is false, then when clock timer timing is to Tns, the Central Shanxi Plain is broken, and at this moment remembers cycle
N is 1 and stores that it is to open the break period in last time to open interruption after Tz to open the break period next time, hereafter judges cycle every time
The signal true and false, though if false or this detection discriminator signal be false true last time, then take N, will be restored after N+1 in memory,
Clock timer open interrupt after do not reset continuation timing, at this moment, next cycle of setting is opened during the break period temporarily uses instead open
The disconnected time interim setting value Tkz：
Tkz=(N+1) × Tz
Meanwhile next cycle closes break period temporary use instead and closes break period interim setting value Tnz：
Tnz=Tkz+Tns
When clock timer to after Tkz, if at this moment detecting that cycle signal is true, take out N in memory and preserve, and
By N zero setting in memory, the clock timer clocking value Ts is set to be：(Ts-Tkz) at this moment → Ts takes the value of (N+1) × 20ms to add
In synchrotimer, and recover using setting value Tks and Tns, recovered clock timer is reset after interruption is opened；
The system synchronization time be synchrotimer time, along with currently just timing clock timer time；
When judging to screen the point signal true and false, selection：When Th0, Th1, Th2 are true the cycle signal be true or Th0 be it is true,
When one of Th1, Th2 are true simultaneously or when Th1, Th2 are true, which is true, depending on to judging the cycle signal true and false not
It is direct using clocking value of the clock timer at Tkz if N is more than a setting value between 25 to 70 depending on requirement
It is added in synchrotimer.
2. a kind of home furnishings intelligent networked control systems according to claim 1, it is characterised in that including:
Main 10 ﹚ of control device ﹙, communications electronics, which are opened, closes 11 ﹚ of ﹙, 12 ﹚ of switch drive dynamic model block ﹙, 13 ﹚ of SMS receipts transmitting apparatus ﹙, SIM ﹙
14 ﹚, cycle screen 16 ﹚, electricity device Kong Qi ﹙ of electricity Lu ﹙, 17 ﹚, 18 ﹚ of electricity Kai Guan ﹙, and wherein Dan Pian Ji ﹙ U0 ﹚ and communications electronics are opened
11 ﹚ of Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙ and cycle screen 16 ﹚ of electricity Lu ﹙ and are respectively included in 17 ﹚ and Zhu Kong Qi ﹙ of electricity device Kong Qi ﹙
In 10 ﹚；
Cycle discriminator circuit by：Shu Ru electricity roads ﹙ S0 ﹚, voltage Zero-cross comparator device ﹙ V0 ﹚, screen point 1 at electricity pressure comparator ﹙ V1 ﹚ and
It screens electricity pressure comparator ﹙ V2 ﹚ at point 2 to form, Shu Ru electricity roads ﹙ S0 ﹚ are used to mains AC voltage passing through resistance and diode
Partial pressure, be converted to the suitably stable input voltage of voltage comparator；
Single chip computer89C51 realizes serial communication, the microcontroller by I2C buses and main controller in SMS R-T unit
89C51 is connected also by serial port MAX232 with gsm module TC35i carries out data exchange.
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