CN106094620B - Remote analog amount acquires alarm system - Google Patents

Remote analog amount acquires alarm system Download PDF

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Publication number
CN106094620B
CN106094620B CN201610447800.7A CN201610447800A CN106094620B CN 106094620 B CN106094620 B CN 106094620B CN 201610447800 A CN201610447800 A CN 201610447800A CN 106094620 B CN106094620 B CN 106094620B
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cycle
time
signal
true
voltage
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CN106094620A (en
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张金木
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Qingdao Chenguo Technology Group Co ltd
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Fuzhou Alignment Mdt Infotech Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • GPHYSICS
    • G08SIGNALLING
    • G08CTRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C19/00Electric signal transmission systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W4/00Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/12Messaging; Mailboxes; Announcements
    • H04W4/14Short messaging services, e.g. short message services [SMS] or unstructured supplementary service data [USSD]

Abstract

The present invention relates to a kind of remote analog amounts to acquire alarm system, is made of sensor, measuring instrumentss, main controller and SMS R-T unit.Sampling hold is synchronized by the ADC of measuring instrumentss, the data that each measuring instrumentss are acquired send main controller to by power line communication and handle, and when the data over run of measurement, main controller is alarmed by GSM nets to administrator.

Description

Remote analog amount acquires alarm system
(1) technical field:
The present invention relates to a kind of remote analog amounts to acquire alarm system, short by sensor, measuring instrumentss, main controller and mobile phone Believe R-T unit composition.Sampling hold is synchronized by the ADC of measuring instrumentss, the data that each measuring instrumentss are acquired pass through electricity Line of force communication sends main controller processing to, and when the data over run of measurement, main controller is alarmed by GSM nets to administrator.
(2) background technology:
The control system of power supply is provided by power network, each electronic equipment or intermodule are communicated by special circuit, The timing time of each electronic equipment or electronic module is corrected, reaches synchronous operation purpose.Due to being made using special circuit communication Wiring complicates and increases cost, if timing time is not corrected by line traffic, due to traditional timing error, runs number After hour, accumulation timing error can make system control action inconsistent, may cause system crash, and at some, often change is set Meter, its products application of the big occasion of wiring installation amount are restricted.
(3) invention content:
The present invention relates to remote analog amounts to acquire alarm system, is used for the acquisition and teletransmission of various physical quantitys.System It is made of sensor, measuring instrumentss, main controller and SMS R-T unit.Sampling is synchronized by the ADC of measuring instrumentss to protect It deposits, the data that each measuring instrumentss are acquired send main controller to by half wave communication of power line and handle, when the data of measurement are super In limited time, main controller is alarmed by GSM nets to administrator.It is respectively mounted cycle discriminator circuit in each measuring instrumentss and main controller, is used for Synchronization time of generation system keeps system to keep strokes, at the same respectively install in its telecommunication circuit a communications electronics switch, Switch drive module.Each measuring instrumentss and main controller are connected on same electric power cable and master switch are arranged, after master switch Isolating diode is installed, system is using the half wave communication half-wave power supply through power line.The panel of each measuring instrumentss is equipped with 3 to 5 LED modules with different colors, sequentially shows that LED modules with different colors combines (example at a period of time of measuring instrumentss after offline individually just booting Such as:Red, green, blue, red green, bluish-green, red blue, RGB etc.), each combination is corresponding with the number of number, and selection display is different When color LED combination, shutdown obtain corresponding unique number and preserve, and label knowledge can check verification mark, it be The number period, microcontroller was non-easily by the deposit of number data by the energy storage of its power capacitor when can't detect grid cyclic wave signal It loses in memory.
Communication is controlled by synchronization time to keep action long-term consistent, the switch drive of main controller and each measuring instrumentss Module is followed by the ends CLK of d type flip flop from electric power cable through resistance decompression, partial pressure, in the outside of the Q termination microcontrollers of d type flip flop Fracture (INT0 or INT1), fracture is set as level triggers in this.The ends D of d type flip flop are grounded, the I/O mouths at the ends S and microcontroller Connect, original state S sets 1 in end.When the positive square-wave signal at the ends CLK arrives, rising edge makes d type flip flop set to 0, external interrupt mouth Low level generates interruption, and in interrupt service routine setting to 0 first the ends S makes d type flip flop set the 1 i.e. ends Q as 1 and the Central Shanxi Plain is broken, then into Row communication, communications electronics switch is connected to microcontroller corresponding port according to used communication mode, and carries out signal condition, sign off The preceding ends S, which set 1, makes out the communication of the lower cycle of interrupt latency, so realizes half wave communication in cycles.
SMS R-T unit is installed in system, using GSM network, is carried out telecommunication with receiving and dispatching short message mode, The SMS messaging service of GSM at present is still that a kind of highest SMS of short message service GSM of domestic popularity rate itself has data biography Function, the transmission of a message is sent just to constitute primary communication, the transmission of message is by the short message service outside GSM The heart (SMSC) is relayed, it does not have to dialing and can establish connection by the SMS service SMS of GSM, and user adds the information to be sent out Upper stay of two nights data are sent to short message service center, and the final stay of two nights is then forwarded to after short message service center completes storage.Institute With when GSM terminals be not switched on when information will not lose.
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three to screen point and realize and sentences to the identification of cycle signal It is fixed, recycle the cycle time to establish synchronization time, the synchronous operation of main controller and each measuring instrumentss in realization system.
Main controller and the cycle discriminator circuit structural schematic diagram of each measuring instrumentss by two as shown in Fig. 2, use hysteresis ratio Voltage comparator compared with device forms, and includes filter circuit in each voltage comparator, the reference voltage of voltage comparator by Regulator circuit provides.Clock timer and synchrotimer is arranged in system.If detecting that two adjacent cycle signals are Very, then take out the clock timer timing time between two adjacent cycle signal zero passages, sequentially be stored in the cycle time deposit In storage unit, which can store 100 cycle times, a cycle time is often stored in when being filled with, first The cycle time being stored at first is removed, and calculates the average value Tz of the cycle time of deposit and preserves, is differentiated using Tz values Cycle signal to be identified reduces erroneous judgement possibility to reduce the influence of power network frequency fluctuation, while screen point using three.
Two comparators are respectively used to screen point 1, screen point 2, as shown in Figure 1.In the cycle of cycle positive half cycle ascent stage At zero passage, that is, screen point 0 setting a voltage zero-cross detection module, it using cycle positive half-wave signal through electric resistance partial pressure, diode into The clock end CLK of feeding d type flip flop after negative half period, signal condition is isolated in one step, and the Q of d type flip flop terminates microcontroller external interrupt Mouthful, which is arranged to level triggers, the ends the D ground connection of d type flip flop, and S terminates single-chip processor i/o mouth, usually sets for the I/O mouthfuls 1.When cycle positive half-wave zero cross signal arrives, cycle signal rising edge immediately after makes the ends d type flip flop Q be 0, outside microcontroller Fracture low level in portion is interrupted to generate, is executed instruction in interrupt service routine:Described I/O mouthfuls set to 0, the Central Shanxi Plain is disconnected, meter When, described I/O mouthfuls set 1, open interruption.Remaining two comparator is separately positioned on the cycle positive half cycle ascent stage, crest voltage The examination point 2 of the examination point 1 and 50% to 70% place at 35% to 50% place.
Cycle signal determining:For microcontroller after setting time opens interruption, clock timer resets and starts timing, works as cycle When voltage zero-cross, the output voltage jump that the d type flip flop in the voltage zero-cross inspection survey mould block ﹙ V0 ﹚ for screening point 0 is arranged becomes zero, and produces It is raw to interrupt, record its zero crossing break period Th0;Hereafter, the output electricity of electricity pressure comparator ﹙ V1 ﹚ at point 1 is screened in microcontroller scanning Pressure, when all wave voltages are reached to the threshold voltage of ﹙ V1 ﹚, output voltage saltus step from high to low, scanning records its bound-time Th1; Same scanning record screens electricity at point 2 and presses comparator ﹙ V2 ﹚ output voltage bound-time Th2, and Th0 and voltage zero-cross are detected mould The output voltage bound-time setting value Ts0 of Kuai ﹙ V0 ﹚ makes comparisons;The output voltage bound-time of Th1 and electricity pressure comparator ﹙ V1 ﹚ Setting value Ts1 and Th2 makes comparisons respectively with the output voltage bound-time setting value Ts2 of electricity pressure comparator ﹙ V2 ﹚, if Within the scope of allowable error, then the discriminator signal detected is true, is otherwise false.When above-mentioned judgement discriminator signal is true, calculate When clock timer timing between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true Between Tzu, it is made comparisons with the average value Tz of cycle time, the cycle signal if no more than setting cycle time error Tzv It is true, at this moment preserves Tzu and 20ms is taken to be added with synchrotimer timing time, in the value deposit synchrotimer that will add up.
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens the break period between 18.5ms Open interruption when setting value Tk, clock timer timing to 25ms is disconnected to Central Shanxi Plain when pass break period setting value Tn between 27ms.
After system boot, clock timer starts timing, and when detecting first cycle voltage zero-cross, setting is being screened The voltage zero-cross Jian of point 0 surveys the output voltage saltus step of Mo Kuai ﹙ V0 ﹚, is interrupted to generate, and takes out the time of cycle voltage over zero T0 is preserved, and clock timer is reset to and started timing, and at this moment cycle time voltage crosses zero Th0 is 0, while microcontroller is by above-mentioned Method scans and judges discriminator signal.What it is due to detection is first cycle, and clock timer is opened in cycle voltage zero-cross The value of beginning timing, Th0, Th1 and Th2 must add the difference that cycle time 20ms subtracts out break period setting value Tk, such as Three discriminator signals of fruit are true, and i.e. opening the break period for the first time takes Tk next time.Otherwise it is fictitious time, at this time clock timer time T0 must be added, continues to detect.
When detecting first and second adjacent cycle voltage zero-cross, due to not preserving the cycle time of detection, Therefore the clock timer timing time twice between cycle signal zero passage is made comparisons with cycle time 20ms, judges cycle signal When being true, then takes out clock timer cumulative time T1=T0+Tk when opening interruption and be stored in synchrotimer as initial time In, open interruption after clock timer reset, otherwise judge cycle signal be fictitious time, at this time the clock timer time must add T1, Continue to detect first cycle again as stated above.After it is very to detect first cycle signal, restore above-described week Wave signal determining.
As shown in Figure 1, if detecting that cycle signal is false, the break period is opened next time and opens the break period at this Afterwards, open interruptions when average value Tz through the cycle time that is delayed, and open interrupt after be delayed Tns when the Central Shanxi Plain it is disconnected, when the setting Central Shanxi Plain is broken Between be when cycle signal screen point 0 when do not generate interruption, at this moment must be in the setting time point more than Ts0 allowable error ranges Start to scan, and when scanning examination point 1 and examination point 2, voltage comparator output voltage does not generate saltus step, all breaks in the Central Shanxi Plain The time Tns Central Shanxi Plain is disconnected and stops scanning, and Tns is:
Tns=Tn-Tk
If detecting that cycle signal is true, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and weight after resetting New to start timing, timing is disconnected to Central Shanxi Plain when Tns, to make the synchrotimer time be corrected by cycle time voltage crosses zero.
It repeats the above process.If the upper cycle signal detected is true, when this cycle judges, discriminator signal is Vacation, or the cycle time detected is more than setting cycle time error Tzv or clock meter compared with the average value Tz of cycle time When device timing to close break period setting value Tns when, voltage zero-cross inspection survey the non-saltus step of mould block ﹙ V0 ﹚ output voltages, in not generating Disconnected, then when clock timer timing is to Tns, the Central Shanxi Plain is disconnected, at this moment remembers that not counting cycle N is 1 and stores, when opening interruption next time Between be to open the break period in last time to open interruption after Tz, clock timer open interrupt after reset and timing, when timing is to Tns The Central Shanxi Plain is disconnected, hereafter the judgement cycle signal true and false every time, though if false or this detection discriminator signal be false true last time, then take N will be restored after N+1 in memory.
When it is true to detect cycle signal, then takes out N in memory and preserve, and by N zero setting in memory, and restore to make With setting value Tks, the value of (N+1) × 20ms is at this moment taken to be added in synchrotimer.
The system synchronization time is the time of synchrotimer, along with current just in the time of the clock timer of timing.
When the point signal true and false is screened in judgement, Th0, Th1, Th2 are by being set with voltage comparator output voltage bound-time Definite value Ts0, Ts1, Ts2 make comparisons see it is whether overproof, come judge screen point a signal true and false, can select:Th0, Th1, Th2 are The cycle discriminator signal is true when true or Th0 is true, while when one of Th1, Th2 are true or when Th1, Th2 are true, should Cycle discriminator signal is true, depending on requiring judgement cycle signal true and false difference.
If system fault, when N is more than a setting value between 25 to 70, due to main controller in system and each measurement Instrument, the Tz values and N values of detection may be different, and at this moment, power network frequency accumulated error may cause the synchrotimer time It is corrected when can not be by detecting true cycle signal, when it is true to detect cycle signal, at this moment uses clock timing The accumulative clocking value of device is directly added in synchrotimer, and to reduce the asynchronous time of system, it is N × Tz+ to add up clocking value 20ms.N is much smaller than 25 in the case of power network normal operation.
The cycle time error Tzv of permission and the flip-flop transition setting value of voltage comparator output voltage, by test assessment Its average value is taken to obtain.
(4) it illustrates:
Fig. 1 is that cycle screens data relationship schematic diagram;
Fig. 2 is cycle discriminator circuit structural schematic diagram;
Fig. 3 is the circuit structure block diagram of remote analog amount acquisition alarm system.
(5) specific implementation mode:
Fig. 3 is the circuit structure block diagram of remote analog amount acquisition alarm system, including:10 ﹚ of Zhu Kong Qi ﹙, communications electronics It opens and closes 11 ﹚ of ﹙, switchs and drive 12 ﹚ of dynamic model block ﹙, 13 ﹚, SIM card ﹙ of SMS receipts transmitting apparatus ﹙, 14 ﹚, pass 15 ﹚ of sense device ﹙, cycle examination 16 ﹚, Ce amount Yi Biao ﹙ of electricity Lu ﹙, 17 ﹚.Wherein 11 ﹚ of communications electronics Kai Guan ﹙, 12 ﹚ of switch Qu dynamic model Kuai ﹙ and cycle screen 16 ﹚ of electricity Lu ﹙ It is respectively included in 17 ﹚ and Zhu Kong Qi ﹙ of Ce amount Yi Biao ﹙, 10 ﹚ with Dan Pian Ji ﹙ U0 ﹚ in Fig. 2.11 ﹚ of communications electronics Kai Guan ﹙ are used Bidirectional triode thyristor is as switch.
Fig. 2 is the structural schematic diagram that cycle screens 16 ﹚ of electricity Lu ﹙, by:Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian surveys Mo Kuai ﹙ V0 ﹚, electricity pressure comparator ﹙ V1 ﹚ and electricity pressure comparator ﹙ V2 ﹚ are constituted.Dan Pian Ji ﹙ U0 ﹚ refer to 17 ﹚ and Zhu Kong Qi ﹙ of Ce amount Yi Biao ﹙, 10 ﹚ In microcontroller.Shu enters electricity Lu ﹙ S0 ﹚ for the partial pressure by mains AC voltage by resistance and diode, is converted to voltage The suitably stable input voltage of comparator.Single piece machine ﹙ U0 ﹚ use 89C55WD, electricity pressure comparator ﹙ V1 ﹚, electricity pressure comparator ﹙ V2 ﹚ use dedicated voltage comparator LM393, and reference voltage is compared come burning voltage using the regulator circuit of voltage-stabiliser tube The threshold voltage of device.
When mains AC voltage cycle signal zero passage, voltage zero-cross Jian surveys the output voltage saltus step of Mo Kuai ﹙ V0 ﹚, single Pian Ji ﹙ U0 ﹚ generate interruption, record the break period, while Dan Pian Ji ﹙ U0 ﹚ are additionally operable to scanning voltage Bi compare Qi ﹙ V1 ﹚ and voltage ratio The output voltage of compare Qi ﹙ V2 ﹚, records bound-time, for judging power network cycle signal to produce when output voltage saltus step Raw synchronization time.
Single chip computer89C51 realizes serial communication, the microcontroller by I2C buses and main controller in SMS R-T unit 89C51 is also connect with gsm module TC35i by serial line interface integrated circuit MAX232 and carries out data exchange, gsm module chip TC35i is RS232 data ports, supports AT Command Set, wherein contain the control to SMS, single chip computer89C51 is by GSM moulds Block sends a series of AT instructions, completes the initialization to gsm module and receiving short message.The transmitting-receiving of SMS uses TEXT patterns, TEXT patterns are a kind of tactic patterns based on ASCII character.

Claims (2)

1. a kind of remote analog amount acquires alarm system, characterized in that the data that each measuring instrumentss are acquired pass through power line Half wave communication sends main controller processing to, and when the data over run of measurement, main controller is alarmed by GSM nets to administrator, each to survey It is respectively mounted cycle discriminator circuit in amount instrument and main controller, is used for the synchronization time of generation system, while each in telecommunication circuit Installation one communications electronics switch, switch drive module, install isolating diode after master switch;The panel of each measuring instrumentss Equipped with 3 to 5 LED modules with different colors, a period of time after being individually just switched on sequentially shows that LED modules with different colors combines, selection display It when LED modules with different colors combines, shuts down and obtains corresponding unique number and preserve, and label knowledge to check verification mark, The number period, microcontroller was non-easily by the deposit of number data by the energy storage of its power capacitor when can't detect grid cyclic wave signal It loses in memory, the switch drive module of main controller and each measuring instrumentss is followed by D triggerings from electric power cable through resistance decompression, partial pressure The ends CLK of device, the external interrupt mouth of the Q termination microcontrollers of d type flip flop, when the positive square-wave signal at the ends CLK arrives, rising edge D type flip flop is set to set to 0, external interrupt mouth low level generates interruption, is communicated;SMS R-T unit is installed in system, Using GSM network, carried out telecommunication with receiving and dispatching short message mode;
Cycle discriminator circuit is the positive half cycle ascent stage using power network cycle, takes three to screen knowledge of the point realization to cycle signal Do not judge, recycle the cycle time to establish synchronization time, clock timer and synchrotimer is arranged in system, if detecting phase Two adjacent cycle signals are true, then when taking out the clock timer timing between two adjacent cycle signal zero passages Between, it is sequentially stored in cycle time memory cell, when being filled with 100 cycle time, is often stored in a cycle time, first removes The cycle time being stored at first, and the average value Tz of the cycle time of deposit is calculated, differentiate cycle to be identified using Tz values Signal;
Two comparators are respectively used to screen point 1, screen point 2, at the cycle zero passage of cycle positive half cycle ascent stage, that is, screen a little Negative half period, letter is further isolated through electric resistance partial pressure, diode using cycle positive half-wave signal in 0 setting voltage zero-cross detection module Number conditioning after be sent into d type flip flop clock end CLK, when cycle positive half-wave zero cross signal arrives, cycle signal immediately after Rising edge makes the ends d type flip flop Q be 0, and microcontroller external interrupt mouth low level is interrupted to generate, remaining two comparator difference Setting is in cycle positive half cycle ascent stage, the examination point of the examination point 1 and 50% to 70% place at 35% to 50% place of crest voltage 2;
Cycle signal determining process:For microcontroller after setting time opens interruption, clock timer resets and starts timing, works as cycle When voltage zero-cross, the output voltage jump that the d type flip flop in the voltage zero-cross detection module for screening point 0 is arranged becomes zero, in generation It is disconnected, record its zero crossing break period Th0;Hereafter, the output voltage of electricity pressure comparator ﹙ V1 ﹚ at point 1 is screened in microcontroller scanning, When all wave voltages reach the threshold voltage of electricity pressure comparator ﹙ V1 ﹚, output voltage saltus step from high to low, scanning records its saltus step Time Th1;Same scanning record screens electricity at point 2 and presses comparator ﹙ V2 ﹚ output voltage bound-time Th2, if when the saltus step Between within the scope of allowable error, then the discriminator signal detected is true, is otherwise false, when above-mentioned judgement discriminator signal is true, meter Calculate the clock timer timing between cycle signal zero passage when this cycle signal zero passage and an adjacent preceding discriminator signal are true Time Tzu makes comparisons it with the average value Tz of cycle time, and cycle is believed if no more than setting cycle time error Tzv Number it is true, at this moment preserves Tzu and 20ms is taken to be added with synchrotimer timing time, the value that will add up is stored in synchrotimer In;
When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens break period setting between 18.5ms Open interruption when value Tk, clock timer timing to 25ms is disconnected to Central Shanxi Plain when pass break period setting value Tn between 27ms;
When detecting first cycle voltage zero-cross, the output voltage being arranged in the voltage zero-cross detection module for screening point 0 is jumped Becoming, is interrupted to generate, time T0 for taking out cycle voltage over zero preserves, and clock timer is reset to and started timing, this Shi Zhoubo time voltage crosses zeros Th0 is 0, and microcontroller scans and judge that discriminator signal, the value of Th0, Th1 and Th2 must add The cycle time, 20ms subtracted out the difference of break period setting value Tk, if three discriminator signals are true, next time i.e. for the first time Opening the break period takes Tk, is otherwise fictitious time there are one discriminator signal, at this time the clock timer time must add T0, continue to detect;
When it is true to detect first and second adjacent cycle voltage zero-cross, judgement cycle signal, then takes out and open interruption When clock timer cumulative time T1=T0+Tk as initial time be stored in synchrotimer in, open interruption after clock timing Device reset, otherwise judge cycle signal be fictitious time, at this time the clock timer time must add T1, again detect first cycle, After it is very to detect first cycle signal, restore above-described cycle signal determining;
If detecting that cycle signal is false, the break period is opened next time after this opens the break period, when through delay cycle Between average value Tz when open interruption, and open interrupt after be delayed Tns when the Central Shanxi Plain it is disconnected, it is when cycle signal is discriminated that the break period is closed in setting Not Wei fictitious time, the break period Tns Central Shanxi Plain is disconnected and stop scanning, and Tns is closing:
Tns=Tn-Tk
If detecting that cycle signal is true, next cycle opens break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and is opened again after resetting Beginning timing, timing are disconnected to Central Shanxi Plain when Tns;
Above-mentioned cycle signal determining process is repeated, if the upper cycle signal detected is true, when this cycle judges, is discriminated Level signal is false, then when clock timer timing is to Tns, the Central Shanxi Plain is disconnected, at this moment remembers that not counting cycle N is 1 and stores, next time It is to open the break period in last time to open interruption after Tz to open the break period, and clock timer is reset after opening interruption and timing, meter When, the hereafter every time judgement cycle signal true and false disconnected to Central Shanxi Plain when Tns, though if false or this detection discriminator signal is true last time It is false, then takes N, will be restored in memory after N+1;
When it is true to detect cycle signal, then takes out N in memory and preserve, and by N zero setting in memory, and restore use and set At this moment definite value Tks takes the value of (N+1) × 20ms to be added in synchrotimer;
The system synchronization time is the time of synchrotimer, along with current just in the time of the clock timer of timing;
When the point signal true and false is screened in judgement, selection:The cycle discriminator signal is true when Th0, Th1, Th2 are true or Th0 is Very, when while one of Th1, Th2 are true or when Th1, Th2 are true, which is true, depending on to judgement cycle letter Depending on number true and false difference requires, if N is more than a setting value between 25 to 70, using the accumulative clocking value of clock timer It is directly added in synchrotimer, it is N × Tz+20ms to add up clocking value.
2. remote analog amount according to claim 1 acquires alarm system, it is characterised in that including:
Main 10 ﹚ of control device ﹙, communications electronics, which are opened, closes 11 ﹚ of ﹙, 12 ﹚ of switch drive dynamic model block ﹙, 13 ﹚, SIM card ﹙ of SMS receipts transmitting apparatus ﹙ 14 ﹚, 15 ﹚ of Chuan Gan Qi ﹙, cycle screen 16 ﹚, Ce amount Yi Biao ﹙ of electricity Lu ﹙ 17 ﹚, wherein Dan Pian Ji ﹙ U0 ﹚ and communications electronics Kai Guan ﹙ 11 ﹚, 12 ﹚ of switch Qu dynamic model Kuai ﹙ and cycle are screened 16 ﹚ of electricity Lu ﹙ and are respectively included in 17 ﹚ and Zhu Kong Qi ﹙ of Ce amount Yi Biao ﹙, 10 ﹚;
Cycle screen 16 ﹚ of electricity Lu ﹙ by:The roads Shu Ru electricity ﹙ S0 ﹚, voltage zero-cross inspection survey mould block ﹙ V0 ﹚, screen electricity pressure comparator ﹙ at point 1 V1 ﹚ are constituted with electricity pressure comparator ﹙ V2 ﹚ at point 2 are screened, and the roads Shu Ru electricity ﹙ S0 ﹚ by mains AC voltage for passing through resistance and two The partial pressure of pole pipe is converted to the suitably stable input voltage of voltage comparator;
Single chip computer89C51 realizes serial communication, the microcontroller by I2C buses and main controller in SMS R-T unit 89C51 is also connect with gsm module TC35i by serial port MAX232 and carries out data exchange.
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CN106887153A (en) * 2017-03-18 2017-06-23 福州台江区超人电子有限公司 The wave communication of public bus network half and intelligent display system
CN106910360A (en) * 2017-03-18 2017-06-30 福州台江区超人电子有限公司 Using the Bus information display board communicated between car and car
CN106816028A (en) * 2017-03-18 2017-06-09 福州台江区超人电子有限公司 Bus station's intelligence station board based on ZigBee and WIFI
CN106952492A (en) * 2017-03-18 2017-07-14 福州台江区超人电子有限公司 Bus station's information display system based on ZigBee and GSM
CN106781614A (en) * 2017-03-18 2017-05-31 福州台江区超人电子有限公司 Public transport based on ZigBee and WI FI is arrived at a station information display system
CN106910363A (en) * 2017-03-18 2017-06-30 福州台江区超人电子有限公司 Bus station's information display system based on nRF905 and GSM
CN106920420A (en) * 2017-03-18 2017-07-04 福州台江区超人电子有限公司 The wave communication of public bus network half and the information intelligent display board that arrives at a station
CN106910362A (en) * 2017-03-18 2017-06-30 福州台江区超人电子有限公司 Bus station's intelligent display board based on nRF905 and WIFI
CN106710285A (en) * 2017-03-18 2017-05-24 福州台江区超人电子有限公司 ZigBee-based intelligent bus stop board
CN106683472A (en) * 2017-03-18 2017-05-17 福州台江区超人电子有限公司 Bus station information display board based on WI-FI (Wireless Fidelity)
CN106953912A (en) * 2017-03-18 2017-07-14 福州台江区超人电子有限公司 The wave communication of public bus network half and the information display system that arrives at a station
CN106781615A (en) * 2017-03-18 2017-05-31 福州台江区超人电子有限公司 Using communicated between car and car and WIFI Bus information station board
CN106940936A (en) * 2017-03-18 2017-07-11 福州台江区超人电子有限公司 Bus station's intelligent display board based on nRF905
CN106953911A (en) * 2017-03-18 2017-07-14 福州台江区超人电子有限公司 Using the system for displaying public transportation information communicated between car and car
CN106920418A (en) * 2017-03-18 2017-07-04 福州台江区超人电子有限公司 Public transport intelligent display system based on nRF905 and GSM
CN106910361A (en) * 2017-03-18 2017-06-30 福州台江区超人电子有限公司 Public transport intelligence station board based on nRF905 radio communications
CN106920419A (en) * 2017-03-18 2017-07-04 福州台江区超人电子有限公司 Public transport stop board display system based on WIFI and GSM
CN106846884A (en) * 2017-03-18 2017-06-13 福州台江区超人电子有限公司 Bus station's presentation of information board based on ZigBee and GSM
CN106940937A (en) * 2017-03-18 2017-07-11 福州台江区超人电子有限公司 The wave communication of public bus network half and the information display system that arrives at a station
CN106781613A (en) * 2017-03-18 2017-05-31 福州台江区超人电子有限公司 Public bus network half-wave command, control, communications, and information display system
CN106910359A (en) * 2017-03-18 2017-06-30 福州台江区超人电子有限公司 Bus station's intelligent display system based on ZigBee and WIFI
CN106952491A (en) * 2017-03-18 2017-07-14 福州台江区超人电子有限公司 Bus station's presentation of information board based on WIFI and GSM
CN106781612A (en) * 2017-03-18 2017-05-31 福州台江区超人电子有限公司 Using half wave communication and bus station's display system of ZigBee

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