CN106092152B - A kind of warehouse humiture information acquisition system - Google Patents

Abstract

The present invention relates to a kind of warehouse humiture information acquisition system, it is made up of multiple humiture collectors and a main controller, the temperature-humidity signal of humiture collector recording synchronism time and its collection is simultaneously converted into data signal, sends main controller processing in the time of setting.Communicated between main controller and each humiture collector by electric power netting twine, communication period is by the rechargeable battery power supply for being connected to microcontroller power supply filter capacitor.

Description

A kind of warehouse humiture information acquisition system

(1) technical field：

The present invention relates to a kind of warehouse humiture information acquisition system, by multiple humiture collectors and a main controller structure Into the temperature-humidity signal of humiture collector recording synchronism time and its collection is simultaneously converted into data signal, in the time of setting Send main controller processing to.Communicated between main controller and each humiture collector by electric power netting twine, communication period is relied on and connect Powered in the rechargeable battery of microcontroller power supply filter capacitor.

(2) background technology：

The control system of power supply is provided by power network, its each electronic equipment or intermodule are communicated by special circuit, To correct the timing time of each electronic equipment or electronic module, reach synchronous operation purpose.Due to being made using special circuit communication Wiring complicates and increases cost, if timing time is not corrected by line traffic, due to traditional timing error, runs number After hour, it, which accumulates timing error, can make system control action inconsistent, may cause system crash, and at some, often change is set Meter, its products application of the big occasion of wiring installation amount are restricted.

(3) content of the invention：

The present invention relates to a kind of warehouse humiture information acquisition system, by multiple humiture collectors and a main controller structure Into each position sets a humiture collector in warehouse, and each humiture collector includes one or several humitures pass The temperature-humidity signal of sensor, humiture collector recording synchronism time and its collection is simultaneously converted into data signal, in the same of setting The step time sends main controller processing to, is easy to determine certain time point warehouse environment parameter using lock in time record.Each humiture Acquisition Instrument and main controller are connected on same electric power netting twine and set master switch, and an electronic switch is installed after master switch, Main controller AC power is connected between electronic switch and master switch, and in the telecommunication circuit of main controller and each humiture collector In each one communications electronics switch of installation, the ac power input end of each humiture collector sets insulating electron to switch. Communication synchronization time, main controller shut-off electronic switch simultaneously connect its communications electronics switch, and each humiture collector is also in setting Lock in time of communication or when not receiving grid cyclic wave signal, connect respective communications electronics switch, shut-off insulating electron switch, Communicated by electric power netting twine, after sign off, turn off all communications electronics switch, then connect electronic switch and insulating electron is opened Close, at this moment, synchrotimer restarts timing after resetting and corrected, and to keep system synchronization, and remembers time synchronisation Accumulated value.Communication period is powered by the rechargeable battery for being connected to microcontroller power supply filter capacitor, and whole with original through diode Current circuit is isolated, and the charging circuit of rechargeable battery, possesses charging protection function.

The panel of each humiture collector is equipped with 3 to 5 LED modules with different colors, humiture collector after firm start one Section setting time, sequentially show LED modules with different colors combine (such as：Red, green, blue, red green, bluish-green, red blue, RGB), each group Conjunction is corresponding with the number of numbering, and when selection shows LED modules with different colors combination, shutdown obtains corresponding numbering and preservation, it It is in the numbering period when can't detect grid cyclic wave signal, numbering data are stored in by single-chip microcomputer by the energy storage of its power capacitor In nonvolatile storage.

The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three to screen point and realizes that the identification to cycle signal is sentenced It is fixed, recycle the cycle time to establish lock in time, realize the synchronous operation of main controller and each humiture collector in system.

The cycle identification circuit of main controller and each humiture collector is as shown in Fig. 2 by three using hysteresis loop comparator Voltage comparator forms, and filter circuit is included in each voltage comparator, the reference voltage of its voltage comparator is by voltage stabilizing electricity Road provides.System sets clock timer and synchrotimer.If it is true to detect two adjacent cycle signals, take The clock timer timing time gone out between this two adjacent cycle signal zero passages, sequentially it is stored in cycle time memory cell In, the cycle time memory cell can deposit 100 cycle times, and a cycle time is often stored in when being filled with, and first remove most The cycle time being first stored in, and calculate the average value Tz of the cycle time of deposit and preserve, differentiated using Tz values to be identified Cycle signal, erroneous judgement possibility is reduced to reduce the influence of power network frequency fluctuation, while point is screened using three.

Three comparators are respectively used to three examination points, that is, screen point 0, screen point 1, screen point 2, as shown in Figure 1.In week At the cycle zero passage of ripple positive half cycle ascent stage, that is, screen point 0 and voltage zero-crossing comparator is set, remaining two comparator is set respectively In the cycle positive half cycle ascent stage, the examination point 1 at 35% to 50% place of crest voltage and the examination point 2 at 50% to 70% place.

Cycle signal determining：After setting time opens interruption, clock timer resets and starts timing single-chip microcomputer, works as cycle During voltage zero-cross, the output voltage upset for the voltage zero-crossing comparator V0 for screening point 0 is arranged on, in the generation of its voltage trailing edge It is disconnected, record its zero crossing break period Th0 and the Central Shanxi Plain is broken；Hereafter, the output of voltage comparator V1 at point 1 is screened in single-chip microcomputer scanning Voltage, when all wave voltages reach V1 threshold voltage, output voltage is overturn from high to low, and scanning records its flip-flop transition Th1； Same scanning record screens voltage comparator V2 output voltages flip-flop transition Th2 at point 2.By Th0 and voltage zero-crossing comparator V0 Output voltage flip-flop transition setting value Ts0 make comparisons；Th1 and voltage comparator V1 output voltage flip-flop transition setting value Ts1 and Th2 makes comparisons respectively with voltage comparator V2 output voltage flip-flop transition setting value Ts2, if in allowable error In the range of, then the discriminator signal detected is true, is otherwise false.When above-mentioned judgement discriminator signal is true, this cycle is calculated The clock timer timing time Tzu between cycle signal zero passage when signal zero passage and an adjacent preceding discriminator signal are true, will It makes comparisons with the average value Tz of cycle time, and cycle signal is true if being no more than and setting cycle time error Tzv, at this moment Preserve Tzu and take 20ms to be added with synchrotimer timing time, in the value deposit synchrotimer that will add up.

When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens the break period between 18.5ms Open interruption during setting value Tk, clock timer timing to 25ms to Central Shanxi Plain during pass break period setting value Tn between 27ms is broken.

After system boot, clock timer starts timing, when detecting first cycle voltage zero-cross, is arranged on examination The voltage zero-crossing comparator V0 of point 0 output voltage upset, is interrupted so as to produce, and the time T0 for taking out cycle voltage over zero is protected Deposit, clock timer is reset and starts timing, at this moment cycle time voltage crosses zero Th0 is 0, while single-chip microcomputer is as stated above Scan and judge discriminator signal.What it is due to detection is first cycle, and clock timer is to start to count in cycle voltage zero-cross When, its Th0, Th1 and Th2 value must add the difference that cycle time 20ms subtracts out break period setting value Tk, if three Individual discriminator signal is true, and i.e. opening the break period for the first time takes Tk next time.Otherwise be fictitious time, now the clock timer time must add Upper T0, continue to detect.

When detecting first and second adjacent cycle voltage zero-cross, due to not preserving the cycle time of detection, Therefore the clock timer timing time twice between cycle signal zero passage is made comparisons with cycle time 20ms, judges cycle signal When being true, then take out clock timer cumulative time T1=T0+Tk when opening interruption and be stored in synchrotimer as initial time In, open interruption after clock timer reset, otherwise judge cycle signal be fictitious time, now the clock timer time must add T1, Continue to detect first cycle again as stated above.After it is very to detect first cycle signal, recover above-described week Ripple signal determining.

If as shown in figure 1, detecting that cycle signal is false, the break period is opened next time and opens the break period at this Afterwards, open interruptions during average value Tz through the cycle time that is delayed, and open interrupt after be delayed Tns when the Central Shanxi Plain break, when setting the Central Shanxi Plain to break Between be when cycle signal screen point 0 when do not producing interruption, at this moment must be in the setting time point more than Ts0 allowable error scopes Start to scan, and when scanning examination point 1 and examination point 2, voltage comparator output voltage does not produce upset, all in the Central Shanxi Plain breaks The Central Shanxi Plain was broken and stopped scanning time Tns, and Tns is:

Tns=Tn-Tk

If it is true to detect cycle signal, next cycle opens break period Tks and is:

Tks=Tk+Th0

I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and weight after resetting New to start timing, timing is broken to Central Shanxi Plain during Tns, so that the synchrotimer time is corrected by cycle time voltage crosses zero.

Repeat said process.If the upper cycle signal detected is true, when this cycle judges, discriminator signal is Vacation, or the cycle time detected exceed setting cycle time error Tzv, or clock meter compared with the average value Tz of cycle time When device timing to close break period setting value Tns when, voltage zero-crossing comparator V0 output voltages are not overturn, do not produce interruption, Then when clock timer timing is to Tns, the Central Shanxi Plain is broken, and is at this moment remembered and is not counted cycle N 1 and to store, and is opened the break period next time and is The break period was opened in last time interruption is opened after Tz, clock timer is reset after interruption is opened and timing, timing to Central Shanxi Plain during Tns It is disconnected, hereafter judge the cycle signal true and false every time, though if false or this detection discriminator signal be false true last time, then take N, will Restored after N+1 in memory.

When it is true to detect cycle signal, then takes out N in memory and preserve, and by N zero setting in memory, and recover to make With setting value Tks, (N+1) × 20ms value is at this moment taken to be added in synchrotimer.

The system synchronization time be synchrotimer time, along with currently just timing clock timer time.

When judging to screen the point signal true and false, Th0, Th1, Th2 are by being set with voltage comparator output voltage flip-flop transition Definite value Ts0, Ts1, Ts2 make comparisons see it is whether overproof, come judge screen point a signal true and false, can select：Th0, Th1, Th2 are The cycle discriminator signal is true when true, or Th0 is true, while when one of Th1, Th2 are true, or when Th1, Th2 are true, should Cycle discriminator signal is true, depending on to judging the different requirements of the cycle signal true and false.

If system fault, when N is more than a setting value between 25 to 70, due to main controller in system and each warm and humid Acquisition Instrument is spent, its Tz value detected may be different with N values, at this moment, power network frequency accumulated error, may cause synchrotimer Time is corrected when can not be by detecting true cycle signal, when it is true to detect cycle signal, at this moment using clock The accumulative clocking value of timer is directly added in synchrotimer, to reduce the asynchronous time of system, add up clocking value be N × Tz+20ms.N is much smaller than 25 in the case of power network normal operation.

The cycle time error Tzv of permission and the flip-flop transition setting value of voltage comparator output voltage, by test assessment Its average value is taken to obtain.

(4) illustrate：

Fig. 1 is that cycle screens data relationship schematic diagram；

Fig. 2 is cycle discriminator circuit structural representation；

Fig. 3 is a kind of circuit structure block diagram of warehouse humiture information acquisition system.

(5) embodiment：

Fig. 3 is a kind of circuit structure block diagram of warehouse humiture information acquisition system, including:The ﹚ of Zhu Kong Qi ﹙ 10, communication The ﹚ of electricity Kai Guan ﹙ 11, cycle screen the ﹚ of electricity Lu ﹙ 12, the ﹚ of humiture collection Yi ﹙ 13, the ﹚ of Wen Shi degree Chuan Gan Qi ﹙ 14, the ﹚ of electricity Kai Guan ﹙ 15, The wherein ﹚ of communications electronics Kai Guan ﹙ 11, cycle screen Dan Pian Ji ﹙ U0 ﹚ in the ﹚ and Fig. 2 of electricity Lu ﹙ 12 and are respectively included in humiture collection In the ﹚ of the Yi ﹙ 13 and ﹚ of Zhu Kong Qi ﹙ 10.The ﹚ of 11 ﹚ and electricity Kai Guan ﹙ of communications electronics Kai Guan ﹙ 15 use bidirectional triode thyristor as switch.

Fig. 2 is the structural representation that cycle screens the ﹚ of electricity Lu ﹙ 12, by：Shu enters electricity Lu ﹙ S0 ﹚, voltage zero-cross Jian and surveys Mo Kuai ﹙ V0 ﹚, electricity pressure comparator ﹙ V1 ﹚ and electricity pressure comparator ﹙ V2 ﹚ are formed.Dan Pian Ji ﹙ U0 ﹚ refer to the ﹚ of humiture collection Yi ﹙ 13 and master control Single-chip microcomputer in the ﹚ of Qi ﹙ 10.Shu enters electricity Lu ﹙ S0 ﹚ for the partial pressure by mains AC voltage by resistance and diode, conversion For the input voltage that voltage comparator is suitably stable.Dan Pian Ji ﹙ U0 ﹚ use 89C55WD, voltage zero-cross Jian survey Mo Kuai ﹙ V0 ﹚, Electricity pressure comparator ﹙ V1 ﹚, electricity pressure comparator ﹙ V2 ﹚ use special voltage comparator LM339, and its reference voltage is to use voltage stabilizing The mu balanced circuit of pipe carrys out the threshold voltage of burning voltage comparator.

When mains AC voltage cycle signal zero passage, voltage zero-cross Jian surveys Mo Kuai ﹙ V0 ﹚ output voltage saltus step, single Pian Ji ﹙ U0 ﹚ produce interruption, record the break period, while Dan Pian Ji ﹙ U0 ﹚ are additionally operable to scanning voltage Bi compare Qi ﹙ V1 ﹚ and voltage ratio Compare Qi ﹙ V2 ﹚ output voltage, bound-time is recorded when output voltage saltus step, for judging power network cycle signal so as to producing Raw lock in time.

Claims (2)

1. a kind of warehouse humiture information acquisition system, it is characterized in that, humiture collector recording synchronism time and its collection Temperature-humidity signal is simultaneously converted into data signal, sends main controller processing in the lock in time of setting, is installed after master switch One electronic switch, main controller AC power are connected between electronic switch and master switch, and are adopted in main controller and each humiture Collect each one communications electronics switch of installation in the telecommunication circuit of instrument, the ac power input end of each humiture collector set every From electronic switch, in the lock in time of communication, each humiture collector the communication of setting lock in time or do not receive electricity During net week ripple signal, communicated by electric power netting twine, communication period is by the chargeable electricity for being connected to microcontroller power supply filter capacitor Pond powers, and sign off synchrotimer restarts timing after resetting and corrected；

The panel of each humiture collector is equipped with 3 to 5 LED modules with different colors, and one section after firm start of humiture collector is set Fix time, when selection shows LED modules with different colors combination, shutdown obtains corresponding numbering and preservation, in the numbering period when detection During less than grid cyclic wave signal, numbering data are stored in nonvolatile storage by single-chip microcomputer by the energy storage of its power filtering capacitor In；

Using the positive half cycle ascent stage of power network cycle, take three to screen identification decision of the point realization to cycle signal, recycle The cycle time establishes lock in time, and the cycle identification circuit of main controller and each humiture collector uses hysteresis loop comparator by three Voltage comparator composition, system sets clock timer and synchrotimer, if detecting two adjacent cycle signals It is true, then takes out the clock timer timing time i.e. cycle time between this two adjacent cycle signal zero passages, sequentially It is stored in cycle time memory cell, a cycle time is often stored in when being filled with 100 cycle time, first removes and is stored at first A cycle time, and calculate the average value Tz of the cycle time of deposit and preserve, utilize Tz values to differentiate cycle letter to be identified Number, reduce erroneous judgement possibility to reduce the influence of power network frequency fluctuation, while point is screened using three；

Three comparators are respectively used to three examination points, that is, screen point 0, screen point 1, screen point 2, in the cycle positive half cycle ascent stage Cycle zero passage at, that is, screen point 0 and a voltage zero-crossing comparator be set, remaining two comparator is separately positioned on the positive half cycle of cycle Rise section, the examination point 1 at 35% to 50% place of crest voltage and the examination point 2 at 50% to 70% place；

Cycle signal determining process：After setting time opens interruption, clock timer resets and starts timing single-chip microcomputer, works as cycle During voltage zero-cross, the output voltage upset for the voltage Zero-cross comparator Qi ﹙ V0 ﹚ for screening point 0 is arranged on, is produced in its voltage trailing edge Interrupt, record its zero crossing break period Th0 and the Central Shanxi Plain is broken；Hereafter, first voltage Bi compare Qi ﹙ at point 1 are screened in single-chip microcomputer scanning V1 ﹚ output voltage, when all wave voltages reach first voltage than threshold voltage compared with device ﹙ V1 ﹚, output voltage turns over from high to low Turn, scanning records its flip-flop transition Th1；Same scanning record screens second voltage Bi compare Qi ﹙ V2 ﹚ output voltages upset at point 2 Time Th2, it is no if the discriminator signal that in the range of allowable error, detects of above-mentioned Th1 and Th2 flip-flop transitions is true It is then false, when above-mentioned judgement discriminator signal is true, when to calculate this cycle signal zero passage and an adjacent preceding discriminator signal be true Cycle signal zero passage between clock timer timing time Tzu, it is made comparisons with the average value Tz of cycle time, if not More than cycle time error Tzv is set, then cycle signal to be true, at this moment preserve Tzu and takes 20ms and synchrotimer timing time It is added, in the value deposit synchrotimer that will add up；

When clock timer starts timing with cycle voltage zero-cross, then timing to 16ms opens break period setting between 18.5ms Open interruption during value Tk, clock timer timing to 25ms to Central Shanxi Plain during pass break period setting value Tn between 27ms is broken；

After system boot, clock timer starts timing, when detecting first cycle voltage zero-cross, is arranged on examination point 0 Voltage Zero-cross comparator Qi ﹙ V0 ﹚ output voltage upset, so as to produce interrupt, take out cycle voltage over zero time T0 protect Deposit, clock timer is reset and starts timing, at this moment cycle time voltage crosses zero Th0 is 0, while single-chip microcomputer is scanned and judged Discriminator signal, its Th0, Th1 and Th2 value must add the difference that cycle time 20ms subtracts out break period setting value Tk, If three discriminator signals are true, the break period of opening for detecting cycle voltage over zero next time takes Tk, is otherwise fictitious time, now The clock timer time must add T0, continue to detect；

When detecting first and second adjacent cycle voltage zero-cross, when judgement cycle signal is true, then take out in opening Clock timer cumulative time T1=T0+Tk when disconnected is stored in synchrotimer as initial time, drives clock meter after interruption When device reset, otherwise judge cycle signal be fictitious time, now the clock timer time must add T1, again detection the first week Ripple, after it is very to detect first cycle signal, recover above-described cycle signal determining process；

If it is false to detect cycle signal, open the break period next time after this opens the break period, through be delayed cycle when Between average value Tz when open interruption, and open interrupt after be delayed Tns when the Central Shanxi Plain break, it is when cycle signal exists to set and close the break period Screen as fictitious time, the break period Tns Central Shanxi Plain is disconnected and stop scanning, and Tns is closing:

Tns=Tn-Tk

If it is true to detect cycle signal, next cycle opens break period Tks and is:

Tks=Tk+Th0

I.e. from opening for the first time after the break period takes Tk, clock timer is that timing opens interruption to Tks, and is opened again after resetting Beginning timing, timing are broken to Central Shanxi Plain during Tns, so that the synchrotimer time is corrected by cycle time voltage crosses zero；

Above-mentioned cycle signal determining process is repeated, if the upper cycle signal detected is true, when this cycle judges, screens letter Number be it is false, or the cycle time detected exceed with the average value Tz of cycle time compared with and set cycle time error Tzv, or when To when closing break period setting value Tns during clock timer, voltage Zero-cross comparator device ﹙ V0 ﹚ output voltages are not overturn, are not produced Interrupt, then when clock timer timing is to Tns, the Central Shanxi Plain is broken, and is at this moment remembered that cycle N is 1 and stored, is opened the break period next time It is to open the break period in last time to open interruption after Tz, clock timer is reset after interruption is opened and timing, is closed when timing is to Tns Interrupt, hereafter judge the cycle signal true and false every time, though if false or this detection discriminator signal be false true last time, then take out Stored N, and will be restored after N+1 in storage N memory；

When it is true to detect cycle signal, then takes out N in memory and preserve, and by N zero setting in memory, and recover use and set Definite value Tks, (N+1) × 20ms value is at this moment taken to be added in synchrotimer；

The system synchronization time be synchrotimer time, along with currently just timing clock timer time；

And select：Cycle discriminator signal is true when Th0, Th1, Th2 are true, or Th0 is true, while one of Th1, Th2 are When true, or when Th1, Th2 are true, cycle discriminator signal is true；

When N is more than a setting value between 25 to 70, time synchronisation is directly added on using the accumulative clocking value of clock timer In device, it is N × Tz+20ms to add up clocking value.

A kind of 2. warehouse humiture information acquisition system according to claim 1, it is characterised in that including:

The ﹚ of Zhu Kong Qi ﹙ 10, the ﹚ of communications electronics Kai Guan ﹙ 11, cycle screen the ﹚ of electricity Lu ﹙ 12, the ﹚ of humiture collection Yi ﹙ 13, temperature and humidity sensing The ﹚ of Qi ﹙ 14, electricity Kai Guan ﹙ 15 ﹚, wherein Dan Pian Ji ﹙ U0 ﹚ and the ﹚ of communications electronics Kai Guan ﹙ 11 and cycle screen the ﹚ of electricity Lu ﹙ 12 respectively Included in the ﹚ of humiture collection Yi ﹙ 13 and the ﹚ of Zhu Kong Qi ﹙ 10, wherein cycle screens the ﹚ of electricity Lu ﹙ 12, by：Shu enters electricity Lu ﹙ S0 ﹚, electricity Zero-crossing comparator ﹙ V0 ﹚ are pressed, first voltage ratio is screened at point 1 compared with device ﹙ V1 ﹚ and screens at point 2 second voltage ratio compared with device ﹙ V2 ﹚ structures Enter electricity Lu ﹙ S0 ﹚ into, wherein Shu and be used for partial pressure by mains AC voltage by resistance and diode, be converted to voltage ratio compared with The suitably stable input voltage of device.