CN105894789A - Automatic meter reading system for running water supply pipe network - Google Patents
Automatic meter reading system for running water supply pipe network Download PDFInfo
- Publication number
- CN105894789A CN105894789A CN201610454655.5A CN201610454655A CN105894789A CN 105894789 A CN105894789 A CN 105894789A CN 201610454655 A CN201610454655 A CN 201610454655A CN 105894789 A CN105894789 A CN 105894789A
- Authority
- CN
- China
- Prior art keywords
- cycle
- time
- signal
- voltage
- true
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
Abstract
The invention relates to an automatic meter reading system for a running water supply pipe network. The automatic meter reading system comprises a plurality of water meters, controllers, a smart phone, a small-sized special computer and a master controller. Measurement data of the water meters are transmitted to the controllers and the master controller in a communication way by power lines. Once the meters are in fault or during power interruption, the master controller sends voice signals which are stored in a chip to a manager through the smart phone, so that the manager can maintain or start an emergency power supply in time.
Description
(1) technical field:
The present invention relates to the Automatic meter reading system of a kind of tap water supply pipe network, by many water meters,
Controller, intelligent telephone set, small, dedicated computer and main controller are constituted.Each water meter will measure number
Controller and main controller is sent to, when water meter fault or power failure thing occur according to by power line communication
Therefore time, main controller send solidification audio alert in the chips through intelligent telephone set to manager
Signal, in order to on-call maintenance or starting stand-by power supply.
(2) background technology:
Thered is provided the control system of power supply by power network, its each electronic equipment or intermodule all pass through
Special circuit communicates, and corrects the timing time of each electronic equipment or electronic module, reaches to synchronize
Run purpose.Owing to using special circuit communication make wiring complicate and increase cost, if meter
Time the time do not corrected by line traffic, then due to tradition timing error, run after a few hours,
Its accumulation timing error can make system control action inconsistent, is likely to result in system crash, one
A little often design for change, its products application of occasion that wiring installation amount is big is restricted.
(3) summary of the invention:
The present invention relates to the Automatic meter reading system of tap water supply pipe network, be used for recording user's water
Amount.This system by many numbers of elements according to output water meter, controller, intelligent telephone set, small, dedicated
Computer and main controller are constituted, and intelligent telephone set and main controller are placed in the rack of building bottom wall,
Small, dedicated computer can be loaded in rack and also can be carried by manager.Measurement data is led to by each water meter
Cross electric lines of force half wave communication and send controller to, user's water usage data that each controller will gather
Main controller is sent to by electric lines of force half wave communication.When water meter fault or power outage occur,
Solidification audio alert signal in the chips is sent through intelligent telephone set to manager by main controller,
So as on-call maintenance or starting stand-by power supply.Data output water meter such as: pulse output water meter,
Ultrasonic water meter, electromagnetic flowmeter etc., make every water meter be equipped with toggle switch, be both provided with
Numbering, controller timing is scanned registration to each water meter controlled, and finds fault or by people
For moving apart system, report to the police by this accident record and to manager.Each water meter and each controller and master
Control device, is respectively mounted cycle discriminator circuit in its device, keep for producing the lock in time of system
System acting is consistent, simultaneously communications electronics switch, switch of each installation in its telecommunication circuit
Drive module.Said apparatus is all connected on same electric power netting twine and arranges main switch, main switch it
Being followed by commutation diode, rectified for civil power diode is sent into system, system is in negative half-wave and leads to
Letter positive half-wave power supply state.Each water meter, controller are i.e. connected at setting call duration time with main controller
Communications electronics switchs, otherwise, main controller first sends switching command to each water meter and controller thereof,
Shutoff communications electronics switchs.
Each water meter and each controller and main controller, communication therebetween is by controlling lock in time to keep logical
Letter action is consistent for a long time, the switch driving circuit of communications electronics switch all from electric power netting twine through resistance
After blood pressure lowering, isolate after cycle bears half-wave further through just connecing diode, be connected to comparator input terminal,
Its reference voltage is 100Mv to 200Mv, and available diode drop obtains through electric resistance partial pressure,
Therefore the outfan of comparator is square-wave signal, and it is right that it creates after the isolating diode just connect
Answer power network cycle to bear the positive square-wave signal of half-wave, be connected to the I/O mouth of respective single-chip microcomputer, monolithic
Machine performs traffic operation when scanning positive square-wave signal, and this positive square-wave signal is additionally operable to drive communication
Electrical switch, therefore communications electronics switch turns off when cycle positive half-wave, and cycle connects when bearing half-wave
Logical.Communications electronics switch is connected to single-chip microcomputer corresponding port according to used communication mode, and carries out letter
Number conditioning, during sign off under main controller control, make drive circuit turn off communications electronics switch.
Rack installs an intelligent telephone set, main controller and small, dedicated computer.Main controller will be reported to the police
Data are sent to intelligent telephone set nonvolatile storage through I2C, and intelligent telephone set i.e. passes through phone
Net sends solidification voice signal in the chips to manager.Main controller is also by meter reading data warp
RS232 is sent to small, dedicated computer, then is supplied to tap water through the Internet by small, dedicated computer
Water management center is collected.
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three and screens some realization to cycle
The identification decision of signal, recycling the cycle time set up lock in time, it is achieved main controller in system
With each water meter, the synchronous operation of each controller.
Main controller and each water meter, cycle discriminator circuit structural representation such as Fig. 2 institute of each controller
Show, be made up of two voltage comparators using hysteresis loop comparator, in each voltage comparator all
Comprising filter circuit, the reference voltage of its voltage comparator is provided by mu balanced circuit.System is arranged
Clock timer and synchrotimer.If be detected that adjacent two cycle signals are very,
Then take out the clock timer timing time between these two adjacent cycle signal zero passages, sequentially
It is stored in cycle time memory cell, when this cycle time memory cell can deposit 100 cycles
Between, often it is stored in a cycle time when being filled with, the most first removes the cycle time being stored at first,
And calculate meansigma methods Tz of the cycle time being stored in and preserve, utilize Tz value to differentiate week to be identified
Ripple signal, to reduce the impact of power network frequency fluctuation, uses three to screen point simultaneously and reduces by mistake
Sentence probability.
Two comparators are respectively used to screen point 1, screen point 2, as shown in Figure 1.At cycle just
At the cycle zero passage of half cycle ascent stage, i.e. screening point 0 and arrange voltage zero-cross detection module, it is adopted
Negative half period, signal condition is isolated further through electric resistance partial pressure, diode with cycle positive half-wave signal
The clock end CLK of rear feeding d type flip flop, the Q of d type flip flop terminate single-chip microcomputer external interrupt mouth,
This external interrupt mouth is arranged to level triggers, the D end ground connection of d type flip flop, and S terminates single-chip microcomputer I
/ O mouth, this I/O mouth puts 1 at ordinary times.When cycle positive half-wave zero cross signal arrives, immediately its
After cycle signal rising edge make d type flip flop Q end be 0, single-chip microcomputer external interrupt mouth low level,
Thus produce interruption, interrupt service routine performs instruction: described I/O mouth sets to 0, the Central Shanxi Plain
Disconnected, timing, described I/O mouth are put 1, are opened interruption.Remaining two comparator is separately positioned on week
The ripple positive half cycle ascent stage, the examination point 1 and 50% to 70% at 35% to 50% place of crest voltage
The examination point 2 at place.
Cycle signal determining: single-chip microcomputer is had no progeny in the setting time opens, and clock timer resets and opens
Beginning timing, when cycle voltage zero-cross, is arranged on the voltage zero-cross detection module V0 screening point 0
The output voltage of middle d type flip flop jumps vanishing, produces and interrupts, records its zero crossing break period
Th0；Hereafter, the output voltage of voltage comparator V1 at point 1 is screened in single-chip microcomputer scanning, when
When all wave voltages reach the threshold voltage of V1, output voltage saltus step from high to low, scanning note
Record its bound-time Th1；Voltage comparator V2 output at point 2 screened in same scanning record
Voltage jump time Th2, jumps the output voltage of Th0 and voltage zero-cross detection module V0
Change time setting value Ts0 is made comparisons；The output voltage saltus step of Th1 and voltage comparator V1
The output voltage bound-time of time setting value Ts1 and Th2 and voltage comparator V2 sets
Definite value Ts2 is made comparisons respectively, if in the range of allowable error, then and this examination letter detected
Number it is true, is otherwise false.Above-mentioned judge that discriminator signal, as true time, calculates this cycle signal mistake
Clock timer timing between zero with the cycle signal zero passage that an adjacent front discriminator signal is true time
Time Tzu, makes comparisons it with meansigma methods Tz of cycle time, if less than setting cycle
Time error Tzv then cycle signal is true, at this moment preserves Tzu and takes 20ms and time synchronisation
Device timing time is added, and the value that will add up is stored in synchrotimer.
When clock timer starts timing with cycle voltage zero-cross, then timing is to 16ms to 18.5ms
Between open interruption, clock timer timing to 25ms to 27ms when opening break period setting value Tk
Between pass break period setting value Tn time close interrupt.
After system boot, clock timer starts timing, when first all wave voltage mistake being detected
When zero, it is arranged on the output voltage saltus step of the voltage zero-cross detection module V0 screening point 0,
Thus producing interruption, the time T0 taking out cycle voltage over zero preserves, and clock timer is clear
Zero and start timing, at this moment cycle time voltage crosses zero Th0 is 0, and above-mentioned side pressed by single-chip microcomputer simultaneously
Method scans and judges discriminator signal.Due to detection is first cycle, clock timer be
Starting timing during cycle voltage zero-cross, the value of its Th0, Th1 and Th2 must add the cycle time
20ms deducts out the difference of break period setting value Tk, if three discriminator signals are true, takes
The time T0 of the cycle voltage over zero gone out is stored in synchrotimer as initial time, next
Secondary i.e. for the first time open the break period and take Tk.Being otherwise fictitious time, now the clock timer time must add
Upper T0, continues detection.
When detecting first and during adjacent second cycle voltage zero-cross, owing to not preserving inspection
Survey the cycle time, therefore the clock timer timing time between twice cycle signal zero passage be with
The cycle time, 20ms made comparisons, it is determined that cycle signal is true time, then be to take 20ms to subtract Th0
Difference be added with synchrotimer timing time, preserve standard cycle time 20ms i.e. for the first time,
Its Th0 value need to be deducted, this is because detect that cycle signal is true time the most every time, all opening
Restart timing after being reset by clock timer during interruption, and be by standard when opening interruption
The cycle time counts in synchrotimer, and clock timer of having no progeny in opening resets, and otherwise judges cycle
Signal is fictitious time, and now the clock timer time must continue by above-mentioned side plus T1=T0+Tk
Method detects first cycle again.After first cycle signal of detection is very, recover above institute
The cycle signal determining stated.
As it is shown in figure 1, if be detected that cycle signal is false, open the break period all exists next time
After this opens the break period, when meansigma methods Tz of time delay cycle time, open interruption, and in opening
Have no progeny time delay Tns time close interrupt, arrange pass the break period be when cycle signal screen point 0 time
Do not produce interruption, at this moment must start to sweep more than the setting time point of Ts0 allowable error scope
Retouch, and when scanning is screened point 1 and screens point 2, voltage comparator output voltage does not produce
Saltus step, is all closing the interruption of break period Tns pass and is stopping scanning, and Tns is:
Tns=Tn-Tk
If be detected that cycle signal is true, then next cycle is opened break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is all that timing is opened to Tks
Interrupt, and restart timing after clearing, close during timing to Tns and interrupt, so that synchrometer
Time the device time corrected by cycle time voltage crosses zero.
Repeat said process.If the upper cycle signal detected described in is true, and this cycle judges
Time, discriminator signal is false, or the cycle time detected compares with meansigma methods Tz of cycle time
Exceed setting cycle time error Tzv, or clock timer timing is to closing break period setting value
During Tns, the voltage zero-cross detection module non-saltus step of V0 output voltage, do not produce interruption,
Then close when clock timer timing to Tns and interrupt, at this moment remember that not counting cycle N is 1 and deposits
Storage, open the break period is to open the break period in last time to open interruption after Tz, the most next time
The secondary judgement cycle signal true and false, though if false or this detection discriminator signal is true last time is false,
Then taking N, will restore in memorizer after N+1, clock timer be had no progeny unclear zero continuation in opening
Timing, at this moment, next cycle of setting is opened the break period and is temporarily used out the break period instead and set temporarily
Definite value Tkz:
Tkz=(N+1) × Tz
Meanwhile, next cycle pass break period temporarily uses instead and closes break period interim setting value Tnz:
Tnz=Tkz+Tns
When clock timer to after Tkz, scanning is screened the time of point and can be obtained by simple computation
?.If at this moment detecting that cycle signal is true, then take out N in memorizer and preserve, and will deposit
N zero setting in reservoir, makes the clock timer clocking value Ts be: (Ts-Tkz) → Ts, at this moment takes
(N+1) value of × 20ms is added in synchrotimer, and recover use setting value Tks with
Tns, recovered clock timer is had no progeny clearing in opening.
The system synchronization time is the time of synchrotimer, adds current just at the clock meter of timing
Time device time.
When judging to screen the some signal true and false, Th0, Th1, Th2 are by exporting with voltage comparator
Voltage jump time setting value Ts0, Ts1, Ts2 make comparisons and see the most overproof, judge to screen
The point signal true and false, can select: Th0, Th1, Th2 are this cycle discriminator signal of true time and are
Very, or Th0 is true, and one of Th1, Th2 are true time simultaneously, or Th1, Th2 are true
Time, this cycle discriminator signal is true, depending on to judging that cycle signal true and false difference requires.
If system fault, when N is more than a setting value between 25 to 70, owing to being
Main controller and each water meter, each controller in system, the Tz value of its detection may be different with N value, this
Time, power network frequency cumulative error, being likely to result in the synchrotimer time cannot be by detecting
Corrected during true cycle signal, when detecting that cycle signal is true time, used clock timing
Device clocking value at Tkz is directly added in synchrotimer, during to reduce system asynchronous
Between, in the case of power network normal operation, N is much smaller than 25.
The cycle time error Tzv allowed and the flip-flop transition of voltage comparator output voltage set
Value, is taken its meansigma methods by test assessment and obtains.
(4) accompanying drawing explanation:
Fig. 1 is that cycle screens data relationship schematic diagram；
Fig. 2 is cycle discriminator circuit structural representation；
Fig. 3 is the circuit structure block diagram of the Automatic meter reading system of tap water supply pipe network.
(5) detailed description of the invention:
Fig. 3 is that the Automatic meter reading system circuit structure block diagram of tap water supply pipe network includes: master control
Device 10, communications electronics switch 11, switch drive module 12, small, dedicated electricity
Brain 13, water meter 15, cycle discriminator circuit 14, intelligent telephone set 16,
Controller 17.Wherein communications electronics switch 11, switch drive module 12, week
In ripple discriminator circuit 16 and Fig. 2 single-chip microcomputer U0 be included in respectively water meter 15,
In controller 17 and main controller 10, communications electronics switch 11 use is two-way controlled
Silicon is as switch.
Fig. 2 is the structural representation of cycle discriminator circuit 14, by: input circuit S0,
Voltage zero-cross detection module V0, voltage comparator V1 and voltage comparator V2 structure
Become.Single-chip microcomputer U0 refers in water meter 15, controller 17 and main controller 10
Single-chip microcomputer.Input circuit S0 is for passing through resistance and diode by mains AC voltage
Dividing potential drop, be converted to the input voltage that voltage comparator is the most stable.Single-chip microcomputer U0 adopts
Use 89C55WD.Voltage comparator V1, voltage comparator V2 all use special
Voltage comparator LM339, its reference voltage is that the mu balanced circuit using stabilivolt carrys out burning voltage
The threshold voltage of comparator.
When mains AC voltage cycle signal zero passage, voltage zero-cross detection module V0's is defeated
Going out voltage jump, single-chip microcomputer U0 produces interruption, records break period, simultaneously single-chip microcomputer U0
It is additionally operable to scanning voltage comparator V1 and the output voltage of voltage comparator V2, when defeated
When going out voltage jump, record bound-time, is used for judging power network cycle signal thus produces synchronization
Time.
Single-chip microcomputer in intelligent telephone set 16 is provided with I2C serial communication module, is used for and master control
Communicating between device processed, it is non-easily that alert data is sent to intelligent telephone set through I2C by main controller
Losing memorizer, intelligent telephone set i.e. sends solidification language in the chips by telephone network to manager
Tone signal.
Claims (2)
1. the present invention relates to the Automatic meter reading system of tap water supply pipe network, it is characterized in that, Intelligent electric
Phone and main controller are placed in the rack of building bottom wall, and measurement data is passed through electricity by each water meter
The line of force half wave communication sends controller to, and user's water usage data of collection is also led to by each controller
Cross electric lines of force half wave communication and send main controller to, when water meter fault or power outage occur, by
Main controller sends solidification audio alert signal in the chips through intelligent telephone set to manager, with
Just on-call maintenance or starting stand-by power supply；Every water meter is equipped with toggle switch, is both provided with compiling
Number, controller timing is scanned registration to each water meter controlled, and finds fault or by artificially
Move apart system, report to the police by this accident record and to manager, each water meter and each controller and master control
Device, is respectively mounted cycle discriminator circuit in its device, for producing the lock in time of system, simultaneously
One communications electronics switch, switch drive module of each installation in its telecommunication circuit, civil power is through whole
System sent into by stream diode, and system is in negative half wave communication positive half-wave power supply state；
Communications electronics switch switch driving circuit all from electric power netting twine after resistance blood pressure lowering through just connecing
Diode is isolated after cycle bears half-wave further, is connected to comparator input terminal, and its reference voltage is
100Mv to 200Mv, available diode drop obtains through electric resistance partial pressure, therefore comparator
Outfan is square-wave signal, and it creates corresponding power network cycle after the isolating diode just connect
The positive square-wave signal of negative half-wave, is connected to the I/O mouth of respective single-chip microcomputer, and single-chip microcomputer scans pros
Performing traffic operation during ripple signal, this positive square-wave signal is additionally operable to drive communications electronics switch, main
Alert data is sent to intelligent telephone set through I2C by control device, and intelligent telephone set i.e. passes through telephone network
Send solidification voice signal in the chips to manager, main controller also by meter reading data through RS232
It is sent to small, dedicated computer, then is managed to tap water supply through the Internet by small, dedicated computer
Center is collected；
Cycle discriminator circuit is the positive half cycle ascent stage utilizing power network cycle, takes three and screens point
Realizing the identification decision to cycle signal, the recycling cycle time sets up lock in time, and system sets
Put clock timer and synchrotimer, if be detected that adjacent two cycle signals are very,
Then take out the clock timer timing time between these two adjacent cycle signal zero passages, sequentially
It is stored in cycle time memory cell, when being often stored in a cycle when being filled with 100 cycle time
Between, the most first remove the cycle time being stored at first, and calculate the flat of cycle time of being stored in
Average Tz, utilizes Tz value to differentiate cycle signal to be identified；
Two comparators are respectively used to screen point 1, screen point 2, in the cycle positive half cycle ascent stage
At cycle zero passage, i.e. screening point 0 and arrange voltage zero-cross detection module, it uses cycle positive half-wave
Signal is sent into D after electric resistance partial pressure, diode isolate negative half period, signal condition further and is triggered
The clock end CLK of device, when cycle positive half-wave zero cross signal arrives, cycle letter immediately after
Number rising edge makes d type flip flop Q end be 0, single-chip microcomputer external interrupt mouth low level, thus produces
Interrupting, remaining two comparator is separately positioned on cycle positive half cycle ascent stage, the 35% of crest voltage
Examination point 1 at 50% and the examination point 2 at 50% to 70% place；
Cycle signal determining: single-chip microcomputer is had no progeny in the setting time opens, clock timer resets also
Start timing, when cycle voltage zero-cross, be arranged on the voltage zero-cross detection module screening point 0
The output voltage of middle d type flip flop jumps vanishing, produces and interrupts, records its zero crossing break period
Th0；Hereafter, the output voltage of voltage comparator V1 at point 1 is screened in single-chip microcomputer scanning, when
When all wave voltages reach the threshold voltage of voltage comparator V1, output voltage is jumped from high to low
Becoming, scanning records its bound-time Th1；Voltage comparator at point 2 screened in same scanning record
V2 output voltage bound-time Th2, if described bound-time is in the range of allowable error,
This discriminator signal then detected is true, is otherwise false, above-mentioned judge discriminator signal as true time,
Calculate this cycle signal zero passage and the cycle signal zero passage that an adjacent front discriminator signal is true time
Between clock timer timing time Tzu, it is made comparisons with meansigma methods Tz of cycle time,
If less than setting cycle time error Tzv, cycle signal is true, at this moment preserves Tzu also
Taking 20ms to be added with synchrotimer timing time, the value that will add up is stored in synchrotimer；
When clock timer starts timing with cycle voltage zero-cross, then timing is to 16ms to 18.5
Opening interruption when opening break period setting value Tk between ms, clock timer timing is to 25ms extremely
Close during pass break period setting value Tn between 27ms and interrupt；
When first cycle voltage zero-cross being detected, it is arranged on the voltage zero-cross inspection screening point 0
Survey the output voltage saltus step of module, thus produce interruption, take out the time of cycle voltage over zero
T0 preserves, and is reset by clock timer and starts timing, at this moment cycle time voltage crosses zero Th0
Being 0, single-chip microcomputer scans as stated above and judges discriminator signal, its Th0, Th1 and Th2's
Value must deduct open the difference of break period setting value Tk plus cycle time 20ms, if three
Individual discriminator signal is true, and the time T0 of the cycle voltage over zero of taking-up is stored in as initial time
In synchrotimer, i.e. for the first time open the break period takes Tk next time, is otherwise fictitious time, now
The clock timer time must continue detection plus T0；
When first and adjacent second cycle voltage zero-cross being detected, it is determined that cycle signal is
True time, then be to take 20ms to subtract the difference of Th0 and be added with synchrotimer timing time, in opening
Clock timer of having no progeny reset, otherwise judge cycle signal as fictitious time, now during clock timer
Between must continue first cycle of detection the most again, work as detection plus T1=T0+Tk
First cycle signal be very after, recover above-described cycle signal determining；
If be detected that cycle signal is false, open the break period all when this opens interruption next time
After between, when meansigma methods Tz of time delay cycle time, open interruption, and the time delay Tns that has no progeny in opening
Time close interrupt, arrange pass the break period be when cycle signal screening is fictitious time, close the break period
Tns closes and interrupts and stop scanning, and Tns is:
Tns=Tn-Tk；
If be detected that cycle signal is true, then next cycle is opened break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is all that timing is opened to Tks
Interrupt, and restart timing after clearing, close during timing to Tns and interrupt；
Repeat said process, if described in the upper cycle signal that detects be true, this cycle judges
Time, discriminator signal is false, then close when clock timer timing to Tns and interrupt, at this moment remember not
Meter cycle N be 1 and store, open next time the break period be last time opened the break period pass through
Open interruption after Tz, judge the cycle signal true and false the most every time, if false or letter is screened in this detection
Though number being true but last time is false, then take N, will restore after N+1 in memorizer, clock timer
Have no progeny in opening unclear zero continue timing, at this moment, it is temporary transient that next cycle of setting opens the break period
Use out break period interim setting value Tkz instead:
Tkz=(N+1) × Tz
Meanwhile, next cycle pass break period temporarily uses instead and closes break period interim setting value Tnz:
Tnz=Tkz+Tns
When clock timer to after Tkz, if at this moment detecting that cycle signal is true, then take
Go out N in memorizer to preserve, and by N zero setting in memorizer, make clock timer clocking value Ts
For: (Ts-Tkz) → Ts, the value at this moment taking (N+1) × 20ms is added in synchrotimer,
And recover to use setting value Tks and Tns, recovered clock timer is had no progeny clearing in opening；
The system synchronization time is the time of synchrotimer, adds current just at the clock of timing
The time of timer；
When judging to screen the some signal true and false, select: Th0, Th1, Th2 are this cycle of true time
Discriminator signal is true, or Th0 is true, and one of Th1, Th2 are true time simultaneously, or Th1,
Th2 is true time, and this cycle discriminator signal is true, depending on to judgement cycle signal true and false difference requirement
Fixed, if N is more than a setting value between 25 to 70, use clock timer at Tkz
The clocking value at place is directly added in synchrotimer.
The Automatic meter reading system of tap water supply pipe network the most according to claim 1, it is special
Levy and be to include:
Main controller 10, communications electronics switch 11, switch drive module 12, little
Type special purpose computer 13, water meter 15, cycle discriminator circuit 14, intelligent telephone set
16, controller 17, wherein single-chip microcomputer U0 and communications electronics switch 11,
Switch drive module 12 and cycle discriminator circuit 16 are included in water meter respectively
15, in controller 17 and main controller 10；
Cycle discriminator circuit 14 is by input circuit S0, voltage zero-cross detection module
V0, voltage comparator V1 and voltage comparator V2 are constituted, input circuit
S0, for mains AC voltage is passed through resistance and the dividing potential drop of diode, is converted to voltage
The input voltage that comparator is the most stable；
Single-chip microcomputer in intelligent telephone set 16 is provided with I2C serial communication module, is used for and master
Communicate between controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610454655.5A CN105894789B (en) | 2016-06-20 | 2016-06-20 | The Automatic meter reading system of tap water supply pipe network |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610454655.5A CN105894789B (en) | 2016-06-20 | 2016-06-20 | The Automatic meter reading system of tap water supply pipe network |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105894789A true CN105894789A (en) | 2016-08-24 |
| CN105894789B CN105894789B (en) | 2018-12-28 |
Family
ID=56730979
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610454655.5A Active CN105894789B (en) | 2016-06-20 | 2016-06-20 | The Automatic meter reading system of tap water supply pipe network |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105894789B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107272506A (en) * | 2017-07-27 | 2017-10-20 | 福州台江区超人电子有限公司 | A kind of shared electric bicycle system for parking registration in order |
| CN109920235A (en) * | 2018-06-10 | 2019-06-21 | 福州准点信息科技有限公司 | A kind of residential area Water-flowmeter auto-recording |
| CN110007138A (en) * | 2018-06-10 | 2019-07-12 | 福州准点信息科技有限公司 | A kind of electric energy metered system of residential area |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2230929Y (en) * | 1994-10-06 | 1996-07-10 | 吴子方 | Electric meter |
| JP2001256583A (en) * | 2000-03-08 | 2001-09-21 | Toyo Keiki Co Ltd | Automatic meter reading system |
| CN101256210A (en) * | 2008-03-26 | 2008-09-03 | 首都师范大学 | Three-phase electric energy meter based on NIOS II microprocessor |
| JP2011250300A (en) * | 2010-05-28 | 2011-12-08 | Panasonic Electric Works Co Ltd | Remote meter reading system |
| JP2015186388A (en) * | 2014-03-25 | 2015-10-22 | 株式会社東芝 | Watt-hour meter for automatic meter reading system and power failure monitoring system |
-
2016
- 2016-06-20 CN CN201610454655.5A patent/CN105894789B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2230929Y (en) * | 1994-10-06 | 1996-07-10 | 吴子方 | Electric meter |
| JP2001256583A (en) * | 2000-03-08 | 2001-09-21 | Toyo Keiki Co Ltd | Automatic meter reading system |
| CN101256210A (en) * | 2008-03-26 | 2008-09-03 | 首都师范大学 | Three-phase electric energy meter based on NIOS II microprocessor |
| JP2011250300A (en) * | 2010-05-28 | 2011-12-08 | Panasonic Electric Works Co Ltd | Remote meter reading system |
| JP2015186388A (en) * | 2014-03-25 | 2015-10-22 | 株式会社東芝 | Watt-hour meter for automatic meter reading system and power failure monitoring system |
Non-Patent Citations (1)
| Title |
|---|
| 杨淑华等: "网络式多用户电能计量仪及自动抄表系统", 《仪器仪表与分析监测》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107272506A (en) * | 2017-07-27 | 2017-10-20 | 福州台江区超人电子有限公司 | A kind of shared electric bicycle system for parking registration in order |
| CN109920235A (en) * | 2018-06-10 | 2019-06-21 | 福州准点信息科技有限公司 | A kind of residential area Water-flowmeter auto-recording |
| CN110007138A (en) * | 2018-06-10 | 2019-07-12 | 福州准点信息科技有限公司 | A kind of electric energy metered system of residential area |
| CN110007138B (en) * | 2018-06-10 | 2021-10-01 | 福州准点信息科技有限公司 | Electric energy metering system of residential quarter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105894789B (en) | 2018-12-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106094620A (en) | Remote analog amount gathers warning system | |
| CN105894789A (en) | Automatic meter reading system for running water supply pipe network | |
| CN105931414B (en) | A kind of Warehouse Fire alarm control system | |
| CN106228730B (en) | A kind of fire alarm control system | |
| CN106092152B (en) | A kind of warehouse humiture information acquisition system | |
| CN106123985B (en) | A kind of flow signal synchronous | |
| CN106100782B (en) | A kind of signal synchronous collection system | |
| CN105911931B (en) | A kind of rainwater discharge record system | |
| CN106023570A (en) | Automatic meter reading system for tap water supply pipe network | |
| CN106023501A (en) | Warehouse environment information collection alarm system | |
| CN105955369A (en) | Agricultural greenhouse climate control system | |
| CN106227078B (en) | Rainstorm flood discharge recording system | |
| CN105872112A (en) | Remote communication control system for traditional Chinese medicine decoction room | |
| CN105869538B (en) | Road roadside LED Chinese character advertisement placards | |
| CN105960060B (en) | Park L ED landscape lamp post control system | |
| CN106054710B (en) | eating house intelligent control system | |
| CN106125594B (en) | Hotel intelligence control system | |
| CN105929748A (en) | Intelligent control system of Chinese medicine decocting pharmacy | |
| CN106102227B (en) | Building roof control system of lamp decoration | |
| CN106101237B (en) | A kind of green house of vegetables temperature and humidity control system | |
| CN106054711B (en) | Intelligent control system for restaurant | |
| CN105955370A (en) | Grain warehouse humiture control system | |
| CN106054986A (en) | Crop greenhouse climate control system | |
| CN105848371A (en) | Household wiring-free LED decorative lighting controller | |
| CN105869543B (en) | The column LED Chinese character placards of both sides of the road |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20180425 Address after: 350208 Fujian, Fuzhou, Changle District, Changle Shang Shang Town logistics park furniture hardware market, building 4, 906 shops Applicant after: Fuzhou alignment Mdt InfoTech Ltd Address before: 350004 Jiang Bian Road, Taijiang District, Fuzhou, Fujian Province, No. 180 Applicant before: Fuzhou Taijiang Chaoren Electronic Co., Ltd. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20201104 Address after: 221000 No. 88 Liaohe West Road, Pizhou Economic Development Zone, Xuzhou City, Jiangsu Province Patentee after: SU Normal University Semiconductor Materials and Equipment Research Institute (Pizhou) Co.,Ltd. Address before: 350208 Shop No. 4, building materials market, building materials market, Fuzhou, Changle District, Changle District, Changle District Patentee before: FUZHOU ZHUNDIAN INFORMATION TECHNOLOGY Co.,Ltd. |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20211231 Address after: 221300 506, block B, electronic industrial park, Pizhou Economic Development Zone, Xuzhou City, Jiangsu Province Patentee after: Xuzhou Bochuang Construction Development Group Co.,Ltd. Address before: 221000 No.88, Liaohe West Road, Pizhou Economic Development Zone, Xuzhou City, Jiangsu Province Patentee before: SU Normal University Semiconductor Materials and Equipment Research Institute (Pizhou) Co.,Ltd. |
|
| TR01 | Transfer of patent right |