CN105814688B - 在嵌入式外延刻面上形成硅化物和接触 - Google Patents
在嵌入式外延刻面上形成硅化物和接触 Download PDFInfo
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- CN105814688B CN105814688B CN201480067520.2A CN201480067520A CN105814688B CN 105814688 B CN105814688 B CN 105814688B CN 201480067520 A CN201480067520 A CN 201480067520A CN 105814688 B CN105814688 B CN 105814688B
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- drain
- gate
- mos transistor
- source
- epitaxial source
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/254—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0188—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361914995P | 2013-12-12 | 2013-12-12 | |
| US61/914,995 | 2013-12-12 | ||
| US14/563,062 | 2014-12-08 | ||
| US14/563,062 US9508601B2 (en) | 2013-12-12 | 2014-12-08 | Method to form silicide and contact at embedded epitaxial facet |
| PCT/US2014/070111 WO2015089450A1 (en) | 2013-12-12 | 2014-12-12 | Forming silicide and contact at embedded epitaxial facet |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105814688A CN105814688A (zh) | 2016-07-27 |
| CN105814688B true CN105814688B (zh) | 2019-05-17 |
Family
ID=53369395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480067520.2A Active CN105814688B (zh) | 2013-12-12 | 2014-12-12 | 在嵌入式外延刻面上形成硅化物和接触 |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US9508601B2 (enExample) |
| EP (1) | EP3080844B1 (enExample) |
| JP (2) | JP6503359B2 (enExample) |
| CN (1) | CN105814688B (enExample) |
| WO (1) | WO2015089450A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9508601B2 (en) * | 2013-12-12 | 2016-11-29 | Texas Instruments Incorporated | Method to form silicide and contact at embedded epitaxial facet |
| US20160064286A1 (en) * | 2014-09-03 | 2016-03-03 | GlobalFoundries, Inc. | Integrated circuits and methods for fabricating integrated circuits |
| US9947753B2 (en) | 2015-05-15 | 2018-04-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure and manufacturing method thereof |
| US10297602B2 (en) | 2017-05-18 | 2019-05-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Implantations for forming source/drain regions of different transistors |
| US20210408275A1 (en) * | 2020-06-26 | 2021-12-30 | Intel Corporation | Source or drain structures with high surface germanium concentration |
| US12218214B2 (en) * | 2021-04-15 | 2025-02-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Source/drain silicide for multigate device performance and method of fabricating thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4998150A (en) * | 1988-12-22 | 1991-03-05 | Texas Instruments Incorporated | Raised source/drain transistor |
| CN1606150A (zh) * | 2003-10-08 | 2005-04-13 | 台湾积体电路制造股份有限公司 | 单一晶体管型随机存取存储器的制造方法及其电容器结构 |
| US20090166755A1 (en) * | 2007-12-27 | 2009-07-02 | Texas Instruments Incorporated | Growth of unfaceted sige along a semiconductor device width |
| US20120091539A1 (en) * | 2010-10-15 | 2012-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Facet-free semiconductor device |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2661561B2 (ja) * | 1994-10-27 | 1997-10-08 | 日本電気株式会社 | 薄膜トランジスタおよびその製造方法 |
| US5571733A (en) * | 1995-05-12 | 1996-11-05 | Micron Technology, Inc. | Method of forming CMOS integrated circuitry |
| KR100233832B1 (ko) * | 1996-12-14 | 1999-12-01 | 정선종 | 반도체 소자의 트랜지스터 및 그 제조방법 |
| US5960291A (en) * | 1997-08-08 | 1999-09-28 | Advanced Micro Devices, Inc. | Asymmetric channel transistor and method for making same |
| US6107157A (en) * | 1998-02-27 | 2000-08-22 | Micron Technology, Inc. | Method and apparatus for trench isolation process with pad gate and trench edge spacer elimination |
| US6169011B1 (en) * | 1998-03-24 | 2001-01-02 | Sharp Laboratories Of America, Inc. | Trench isolation structure and method for same |
| US6150212A (en) * | 1999-07-22 | 2000-11-21 | International Business Machines Corporation | Shallow trench isolation method utilizing combination of spacer and fill |
| US6140232A (en) * | 1999-08-31 | 2000-10-31 | United Microelectronics Corp. | Method for reducing silicide resistance |
| US6268255B1 (en) * | 2000-01-06 | 2001-07-31 | Advanced Micro Devices, Inc. | Method of forming a semiconductor device with metal silicide regions |
| US6448129B1 (en) * | 2000-01-24 | 2002-09-10 | Micron Technology, Inc. | Applying epitaxial silicon in disposable spacer flow |
| US6376885B1 (en) * | 2000-09-25 | 2002-04-23 | Vanguard International Semiconductor Corp. | Semiconductor structure with metal silicide and method for fabricated the structure |
| US7265425B2 (en) * | 2004-11-15 | 2007-09-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device employing an extension spacer and a method of forming the same |
| JP4945910B2 (ja) * | 2005-03-09 | 2012-06-06 | ソニー株式会社 | 半導体装置およびその製造方法 |
| JP2007227721A (ja) * | 2006-02-24 | 2007-09-06 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP2008071890A (ja) * | 2006-09-13 | 2008-03-27 | Toshiba Corp | 半導体装置及びその製造方法 |
| DE102008011814B4 (de) * | 2008-02-29 | 2012-04-26 | Advanced Micro Devices, Inc. | CMOS-Bauelement mit vergrabener isolierender Schicht und verformten Kanalgebieten sowie Verfahren zum Herstellen derselben |
| JP5329835B2 (ja) * | 2008-04-10 | 2013-10-30 | 株式会社東芝 | 半導体装置の製造方法 |
| JP5588121B2 (ja) * | 2009-04-27 | 2014-09-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP2011009412A (ja) * | 2009-06-25 | 2011-01-13 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP5325125B2 (ja) * | 2010-01-07 | 2013-10-23 | パナソニック株式会社 | 半導体装置 |
| US8502316B2 (en) * | 2010-02-11 | 2013-08-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligned two-step STI formation through dummy poly removal |
| JP2012089784A (ja) * | 2010-10-22 | 2012-05-10 | Renesas Electronics Corp | 半導体装置および半導体装置の製造方法 |
| JP2013243307A (ja) * | 2012-05-22 | 2013-12-05 | Toshiba Corp | 半導体製造装置および半導体装置の製造方法 |
| KR101952119B1 (ko) * | 2012-05-24 | 2019-02-28 | 삼성전자 주식회사 | 메탈 실리사이드를 포함하는 반도체 장치 및 이의 제조 방법 |
| US9508601B2 (en) * | 2013-12-12 | 2016-11-29 | Texas Instruments Incorporated | Method to form silicide and contact at embedded epitaxial facet |
-
2014
- 2014-12-08 US US14/563,062 patent/US9508601B2/en active Active
- 2014-12-12 CN CN201480067520.2A patent/CN105814688B/zh active Active
- 2014-12-12 WO PCT/US2014/070111 patent/WO2015089450A1/en not_active Ceased
- 2014-12-12 JP JP2016539219A patent/JP6503359B2/ja active Active
- 2014-12-12 EP EP14869386.4A patent/EP3080844B1/en active Active
-
2016
- 2016-10-27 US US15/336,248 patent/US9812452B2/en active Active
-
2017
- 2017-10-03 US US15/723,373 patent/US10008499B2/en active Active
-
2019
- 2019-03-25 JP JP2019056248A patent/JP6685442B2/ja active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4998150A (en) * | 1988-12-22 | 1991-03-05 | Texas Instruments Incorporated | Raised source/drain transistor |
| CN1606150A (zh) * | 2003-10-08 | 2005-04-13 | 台湾积体电路制造股份有限公司 | 单一晶体管型随机存取存储器的制造方法及其电容器结构 |
| US20090166755A1 (en) * | 2007-12-27 | 2009-07-02 | Texas Instruments Incorporated | Growth of unfaceted sige along a semiconductor device width |
| US20120091539A1 (en) * | 2010-10-15 | 2012-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Facet-free semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2017504192A (ja) | 2017-02-02 |
| EP3080844B1 (en) | 2022-08-03 |
| WO2015089450A1 (en) | 2015-06-18 |
| US20170047329A1 (en) | 2017-02-16 |
| US10008499B2 (en) | 2018-06-26 |
| JP6503359B2 (ja) | 2019-04-17 |
| US20180047728A1 (en) | 2018-02-15 |
| US9508601B2 (en) | 2016-11-29 |
| US9812452B2 (en) | 2017-11-07 |
| CN105814688A (zh) | 2016-07-27 |
| JP2019091951A (ja) | 2019-06-13 |
| EP3080844A1 (en) | 2016-10-19 |
| US20150170972A1 (en) | 2015-06-18 |
| EP3080844A4 (en) | 2017-07-12 |
| JP6685442B2 (ja) | 2020-04-22 |
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