CN105789117A - Tft基板的制作方法及制得的tft基板 - Google Patents

Tft基板的制作方法及制得的tft基板 Download PDF

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CN105789117A
CN105789117A CN201610169584.4A CN201610169584A CN105789117A CN 105789117 A CN105789117 A CN 105789117A CN 201610169584 A CN201610169584 A CN 201610169584A CN 105789117 A CN105789117 A CN 105789117A
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grid
region
light
active layer
electrode
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CN105789117B (zh
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迟世鹏
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/106,812 priority patent/US20180083142A1/en
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Abstract

本发明提供一种TFT基板的制作方法及制得的TFT基板。本发明的TFT基板的制作方法，通过在TFT中设置第一、第二轻掺杂补偿区，可降低TFT的关态电流；同时采用第一栅极与第二栅极组成双栅极结构，减小第一、第二轻掺杂补偿区对TFT开态电流的影响，所述第一栅极与第二栅极相连，由同一个栅极电压控制，不需要额外的电压信号；制程简单，生产成本低，制得的TFT基板具有较好的电学性能。本发明制得的TFT基板，采用轻掺杂补偿结构来降低TFT的关态电流，采用双栅极结构来降低轻掺杂补偿结构对TFT开态电流的影响，结构简单，且电学性能优异。

Description

TFT基板的制作方法及制得的TFT基板
技术领域
本发明涉及显示技术领域，尤其涉及一种TFT基板的制作方法及制得的TFT基板。
背景技术
OLED是一种极具发展前景的平板显示技术，它具有十分优异的显示性能，特别是自发光、结构简单、超轻薄、响应速度快、宽视角、低功耗及可实现柔性显示等特性，被誉为“梦幻显示器”，再加上其生产设备投资远小于TFT-LCD，得到了各大显示器厂家的青睐，已成为显示技术领域中第三代显示器件的主力军。目前OLED已处于大规模量产的前夜，随着研究的进一步深入，新技术的不断涌现，OLED显示器件必将有一个突破性的发展。
OLED按照驱动方式可以分为无源矩阵型OLED(PassiveMatrixOLED，PMOLED)和有源矩阵型OLED(ActiveMatrixOLED，AMOLED)两大类，即直接寻址和薄膜晶体管矩阵寻址两类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。
目前，AMOLED正在逐步走向成熟，在AMOLED中，需要以电流作为驱动，低温多晶硅(LowTemperaturePoly-Silicon，LTPS)具有较大的迁移率，以其为有源层制作的薄膜晶体管(ThinFilmTransistor，TFT)可以满足AMOLED的电流驱动模式。低温多晶硅薄膜晶体管(LTPSTFT)具有较高的迁移率，可以得到比较高的开态电流，但是由于LTPS中晶粒存在造成的缺陷，会导致LTPSTFT在关态时会出现较高的关态电流。为了减小LTPSTFT的关态电流，可以采用轻掺杂补偿(LightlyDopedOffset)结构。轻掺杂补偿结构目前已被研究的较多，但是轻掺杂补偿结构形成高阻区会降低LTPSTFT的开态电流，为了获得较高的开态电流，可以对轻掺杂补偿结构进行改进。
在具有轻掺杂补偿结构的LTPSTFT中，轻掺杂补偿区不存在载流子积累，具有较高的电阻，当TFT处于关态时，可以有效的降低关态电流，但在TFT开态时，轻掺杂补偿区的存在同样会降低开态电流，影响LTPSTFT的开关特性。
发明内容
本发明的目的在于提供一种TFT基板的制作方法，通过在TFT中设置第一、第二轻掺杂补偿区，降低TFT的关态电流，同时采用第一栅极与第二栅极组成双栅极结构，减小第一、第二轻掺杂补偿区对TFT开态电流的影响，制程简单，生产成本低，制得的TFT基板具有较好的电学性能。
本发明的目的还在于提供一种TFT基板，采用轻掺杂补偿结构来降低TFT的关态电流，采用双栅极结构来降低轻掺杂补偿结构对TFT开态电流的影响，结构简单，且电学性能优异。
为实现上述目的，本发明提供一种TFT基板的制作方法，包括如下步骤：
步骤1、提供一基板，在所述基板上形成有源层，对所述有源层进行离子注入，并在所述有源层上定义出沟道区；
步骤2、在所述有源层、及基板上沉积绝缘层与第一金属层，采用一道光罩对所述第一金属层和绝缘层进行图形化处理，得到与所述有源层的沟道区的宽度相等并且在宽度方向上两端对齐的第一栅极与栅极绝缘层；
以所述第一栅极和栅极绝缘层为阻挡层，对所述有源层进行离子注入，得到分别位于沟道区两侧的第一离子重掺杂区与第二离子重掺杂区；
步骤3、在所述第一栅极、有源层、及基板上沉积第二金属层，采用一道光罩对所述第一金属层进行图形化处理，得到位于所述有源层的两侧且分别与所述有源层的第一离子重掺杂区与第二离子重掺杂区相接触的源极与漏极；
将所述第一离子重掺杂区上与源极相接触的部分定义为源极接触区；将所述第二离子重掺杂区上与漏极相接触的部分定义为漏极接触区；
以所述源极、漏极、及第一栅极为阻挡层，对所述第一离子重掺杂区上位于所述源极与第一栅极之间的部分、以及所述第二离子重掺杂区上位于第一栅极与漏极之间的部分进行蚀刻，去除上层离子浓度较高的部分，保留下层离子浓度较低的部分，从而得到位于所述源极接触区与沟道区之间的第一轻掺杂补偿区、以及位于所述沟道区与漏极接触区之间的第二轻掺杂补偿区；
步骤4、在所述源极、漏极、有源层、及第一栅极上沉积钝化保护层，采用一道光罩对所述钝化保护层进行图形化处理，对应于所述源极、漏极、及第一栅极的上方分别形成第一通孔、第二通孔、及第三通孔；
步骤5、在所述钝化保护层上沉积导电层，采用一道光罩对所述导电层进行图形化处理，得到第一接触电极、第二接触电极、及第二栅极，所述第一、第二接触电极分别经由第一、第二通孔与源极、漏极相连，所述第二栅极经由第三通孔与第一栅极相连；
所述第二栅极的宽度大于所述第一栅极的宽度，且所述第二栅极的两侧分别覆盖位于所述第一栅极两侧的第一轻掺杂补偿区与第二轻掺杂补偿区。
所述步骤1中，在所述基板上形成有源层的具体实施方式为：在基板上沉积非晶硅薄膜，采用固相结晶方法将所述非晶硅薄膜转化为低温多晶硅薄膜后，采用一道光罩对所述低温多晶硅薄膜进行图形化处理，得到有源层。
所述沟道区为N型离子轻掺杂区，所述源极接触区、漏极接触区为P型离子重掺杂区，所述第一轻掺杂补偿区、第二轻掺杂补偿区为P型离子轻掺杂区；或者，所述沟道区为P型离子轻掺杂区，所述源极接触区、漏极接触区为N型离子重掺杂区，所述第一轻掺杂补偿区、第二轻掺杂补偿区为N型离子轻掺杂区。
所述第二栅极的左侧与源极的右侧之间形成第一重叠区，所述第二栅极的右侧与漏极的左侧之间形成第二重叠区。
所述第一、第二接触电极、及第二栅极的材料均为透明导电金属氧化物。
本发明还提供一种TFT基板，包括基板、设于所述基板上的有源层、设于所述有源层及基板上的源极与漏极、设于所述有源层上的栅极绝缘层、设于所述栅极绝缘层上的第一栅极、设于所述源极、漏极、有源层、及第一栅极上的钝化保护层、以及设于所述钝化保护层上的第一接触电极、第二接触电极、及第二栅极；
所述有源层包括位于中间的沟道区、位于两端的源极接触区与漏极接触区、位于所述源极接触区与沟道区之间的第一轻掺杂补偿区、以及位于所述沟道区与漏极接触区之间的第二轻掺杂补偿区；
所述第一栅极、及栅极绝缘层与所述有源层的沟道区的宽度相等并且在宽度方向上两端对齐；
所述钝化保护层上设有分别对应于所述源极、漏极、及第一栅极上方的第一通孔、第二通孔、及第三通孔；所述第一、第二接触电极分别经由第一、第二通孔与源极、漏极相连，所述第二栅极经由第三通孔与第一栅极相连；
所述第二栅极的宽度大于所述第一栅极的宽度，且所述第二栅极的两侧分别覆盖位于所述第一栅极两侧的第一轻掺杂补偿区与第二轻掺杂补偿区。
所述第一轻掺杂补偿区与第二轻掺杂补偿区的上表面低于所述沟道区、源极接触区、及漏极接触区的上表面。
所述沟道区为N型离子轻掺杂区，所述源极接触区、漏极接触区为P型离子重掺杂区，所述第一轻掺杂补偿区、第二轻掺杂补偿区为P型离子轻掺杂区；或者，所述沟道区为P型离子轻掺杂区，所述源极接触区、漏极接触区为N型离子重掺杂区，所述第一轻掺杂补偿区、第二轻掺杂补偿区为N型离子轻掺杂区。
所述第二栅极的左侧与源极的右侧之间形成第一重叠区，所述第二栅极的右侧与漏极的左侧之间形成第二重叠区。
所述第一、第二接触电极、及第二栅极的材料均为透明导电金属氧化物。
本发明的有益效果：本发明提供的一种TFT基板的制作方法，通过在TFT中设置第一、第二轻掺杂补偿区，可降低TFT的关态电流；同时采用第一栅极与第二栅极组成双栅极结构，减小第一、第二轻掺杂补偿区对TFT开态电流的影响，所述第一栅极与第二栅极相连，由同一个栅极电压控制，不需要额外的电压信号；制程简单，生产成本低，制得的TFT基板具有较好的电学性能。本发明制得的TFT基板，采用轻掺杂补偿结构来降低TFT的关态电流，采用双栅极结构来降低轻掺杂补偿结构对TFT开态电流的影响，结构简单，且电学性能优异。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为本发明的TFT基板的制作方法的流程图；
图2为本发明的TFT基板的制作方法的步骤1的示意图；
图3-5为本发明的TFT基板的制作方法的步骤2的示意图；
图6-7为本发明的TFT基板的制作方法的步骤3的示意图；
图8为本发明的TFT基板的制作方法的步骤4的示意图；
图9-10为本发明的TFT基板的制作方法的步骤5的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1，本发明提供一种TFT基板的制作方法，包括如下步骤：
步骤1、如图2所示，提供一基板10，在所述基板10上形成有源层20，对所述有源层20进行离子注入，并在所述有源层20上定义出沟道区21。
具体的，所述基板10为玻璃基板。
具体的，所述步骤1中，在所述基板10上形成有源层20的具体实施方式为：在基板10上沉积非晶硅(AmorphousSilion，a-Si)薄膜，采用固相结晶(SPC，Solid-Phase-Crystallization)方法将所述非晶硅薄膜转化为低温多晶硅(LowTemperaturePolySilicon)薄膜后，采用一道光罩对所述低温多晶硅薄膜进行图形化处理，得到有源层20。
具体的，所述步骤1中，通过对所述有源层20进行N型(或P型)离子注入，可以调节沟道区21的阈值电压，提升TFT的电学性能。
步骤2、如图3-5所示，在所述有源层20、及基板10上依次沉积绝缘层32与第一金属层31，采用一道光罩对所述第一金属层31和绝缘层32进行图形化处理，得到与所述有源层20的沟道区21的宽度相等并且在宽度方向上两端对齐的第一栅极40与栅极绝缘层30；
以所述第一栅极40和栅极绝缘层30为阻挡层，对所述有源层20进行离子注入，得到分别位于沟道区21两侧的第一离子重掺杂区22与第二离子重掺杂区23。
具体的，所述栅极绝缘层30可以为氧化硅(SiOx)层、氮化硅(SiNx)层、或者由氧化硅层与氮化硅层叠加构成的复合层。
具体的，所述第一栅极40的材料可以是铝(Al)、钼(Mo)、铜(Cu)、银(Ag)中的一种或多种的堆栈组合。
步骤3、如图6-7所示，在所述第一栅极40、有源层20、及基板10上沉积第二金属层41，采用一道光罩对所述第一金属层41进行图形化处理，得到位于所述有源层20的两侧且分别与所述有源层20的第一离子重掺杂区22与第二离子重掺杂区23相接触的源极51与漏极52；
将所述第一离子重掺杂区22上与源极51相接触的部分定义为源极接触区24；将所述第二离子重掺杂区23上与漏极52相接触的部分定义为漏极接触区25。
以所述源极51、漏极52、及第一栅极40为阻挡层，对所述第一离子重掺杂区22上位于所述源极51与第一栅极40之间的部分、以及所述第二离子重掺杂区23上位于第一栅极40与漏极52之间的部分进行蚀刻，去除上层离子浓度较高的部分，保留下层离子浓度较低的部分，从而得到位于所述源极接触区24与沟道区21之间的第一轻掺杂补偿区(LightlyDopedOffset)26、以及位于所述沟道区21与漏极接触区25之间的第二轻掺杂补偿区27。
具体的，所述源极51与漏极52的材料可以是铝(Al)、钼(Mo)、铜(Cu)、银(Ag)中的一种或多种的堆栈组合。
具体的，所述沟道区21为N型离子轻掺杂区，所述源极接触区24、漏极接触区25为P型离子重掺杂区，所述第一轻掺杂补偿区26、第二轻掺杂补偿区27为P型离子轻掺杂区；或者，所述沟道区21为P型离子轻掺杂区，所述源极接触区24、漏极接触区25为N型离子重掺杂区，所述第一轻掺杂补偿区26、第二轻掺杂补偿区27为N型离子轻掺杂区。优选的，所述N型离子为磷离子或砷离子；所述P型离子为硼离子或镓离子。
步骤4、如图8所示，在所述源极51、漏极52、有源层20、及第一栅极40上沉积钝化保护层60，采用一道光罩对所述钝化保护层60进行图形化处理，对应于所述源极51、漏极52、及第一栅极40的上方分别形成第一通孔61、第二通孔62、及第三通孔63。
具体的，所述钝化保护层60可以为氧化硅(SiOx)层、氮化硅(SiNx)层、或者由氧化硅层与氮化硅层叠加构成的复合层。
步骤5、如图9-10所示，在所述钝化保护层60上沉积导电层90，采用一道光罩对所述导电层90进行图形化处理，得到第一接触电极71、第二接触电极72、及第二栅极80，所述第一、第二接触电极71、72分别经由第一、第二通孔61、62与源极51、漏极52相连，所述第二栅极80经由第三通孔63与第一栅极40相连；
所述第二栅极80的宽度大于所述第一栅极40的宽度，且所述第二栅极80的两侧分别覆盖位于所述第一栅极40两侧的第一轻掺杂补偿区26与第二轻掺杂补偿区27。
本发明采用第一、第二轻掺杂补偿区26、27作为高阻区，可降低TFT的关态电流；第二栅极80覆盖第一、第二轻掺杂补偿区26、27，在TFT开态时，第二栅极80可以使第一、第二轻掺杂补偿区26、27产生载流子积累形成沟道，降低第一、第二轻掺杂补偿区26、27的电阻，提高TFT的开态电流；在TFT关态时，第二栅极80对第一、第二轻掺杂补偿区26、27无影响，第一、第二轻掺杂补偿区26、27保持高阻状态，能够降低TFT的关态电流。
优选的，所述第二栅极80的左侧与源极51的右侧之间形成第一重叠区(overlap)810，所述第二栅极80的右侧与漏极52的左侧之间形成第二重叠区820。通过设置该第一重叠区810与第二重叠区820，可进一步提高TFT的开态电流。
具体的，所述第一、第二接触电极71、72、及第二栅极80的材料均为透明导电金属氧化物，优选为ITO(氧化铟锡)。
具体的，所述第一、第二接触电极71、72的用途之一为作为引线将所述源极51、及漏极52接至数据线，用途之二为作为测试位点，来测试所述源极51、及漏极52处的电压信号。
上述TFT基板的制作方法，通过在TFT中设置第一、第二轻掺杂补偿区26、27，可降低TFT的关态电流；同时采用第一栅极40与第二栅极80组成双栅极结构，减小第一、第二轻掺杂补偿区26、27对TFT开态电流的影响，所述第一栅极40与第二栅极80相连，由同一个栅极电压控制，不需要额外的电压信号；制程简单，生产成本低，制得的TFT基板具有较好的电学性能。
请参阅图10，本发明还提供一种TFT基板，包括基板10、设于所述基板10上的有源层20、设于所述有源层20及基板10上的源极51与漏极52、设于所述有源层20上的栅极绝缘层30、设于所述栅极绝缘层30上的第一栅极40、设于所述源极51、漏极52、有源层20、及第一栅极40上的钝化保护层60、以及设于所述钝化保护层60上的第一接触电极71、第二接触电极72、及第二栅极80；
所述有源层20包括位于中间的沟道区21、位于两端的源极接触区24与漏极接触区25、位于所述源极接触区24与沟道区21之间的第一轻掺杂补偿区26、以及位于所述沟道区21与漏极接触区25之间的第二轻掺杂补偿区27；
所述第一栅极40、及栅极绝缘层30与所述有源层20的沟道区21的宽度相等并且在宽度方向上两端对齐；
所述钝化保护层60上设有分别对应于所述源极51、漏极52、及第一栅极40上方的第一通孔61、第二通孔62、及第三通孔63；所述第一、第二接触电极71、72分别经由第一、第二通孔61、62与源极51、漏极52相连，所述第二栅极80经由第三通孔63与第一栅极40相连；
所述第二栅极80的宽度大于所述第一栅极40的宽度，且所述第二栅极80的两侧分别覆盖位于所述第一栅极40两侧的第一轻掺杂补偿区26与第二轻掺杂补偿区27。
具体的，所述第一轻掺杂补偿区26与第二轻掺杂补偿区27的上表面低于所述沟道区21、源极接触区24、及漏极接触区25的上表面。
具体的，所述沟道区21为N型离子轻掺杂区，所述源极接触区24、漏极接触区25为P型离子重掺杂区，所述第一轻掺杂补偿区26、第二轻掺杂补偿区27为P型离子轻掺杂区；或者，所述沟道区21为P型离子轻掺杂区，所述源极接触区24、漏极接触区25为N型离子重掺杂区，所述第一轻掺杂补偿区26、第二轻掺杂补偿区27为N型离子轻掺杂区。优选的，所述N型离子为磷离子或砷离子；所述P型离子为硼离子或镓离子。
优选的，所述第二栅极80的左侧与源极51的右侧之间形成第一重叠区810，所述第二栅极80的右侧与漏极52的左侧之间形成第二重叠区820。通过设置该第一重叠区810与第二重叠区820，有利于提高TFT的开态电流。
具体的，所述第一、第二接触电极71、72、及第二栅极80的材料均为透明导电金属氧化物，优选为ITO(氧化铟锡)。
具体的，所述第一、第二接触电极71、72的用途之一为作为引线将所述源极51、及漏极52接至数据线，用途之二为作为测试位点，来测试所述源极51、及漏极52处的电压信号。
具体的，所述基板10为玻璃基板。
具体的，所述有源层20的材料为低温多晶硅。
具体的，所述第一栅极40、源极51、及漏极52的材料可以是铝(Al)、钼(Mo)、铜(Cu)、银(Ag)中的一种或多种的堆栈组合。
具体的，所述栅极绝缘层30与钝化保护层60可以为氧化硅(SiOx)层、氮化硅(SiNx)层、或者由氧化硅层与氮化硅层叠加构成的复合层。
上述TFT基板，采用第一栅极40与第二栅极80组成双栅极结构，所述第一栅极40与第二栅极80互连，由同一个栅极电压控制，不需要额外的电压信号，第一栅极40与源极51和漏极52之间的第一、第二轻掺杂补偿区26、27作为高阻区，可降低TFT的关态电流；第二栅极80覆盖第一、第二轻掺杂补偿区26、27，在TFT开态时，第二栅极80可以使第一、第二轻掺杂补偿区26、27产生载流子积累形成沟道，降低第一、第二轻掺杂补偿区26、27的电阻，提高TFT的开态电流；在TFT关态时，第二栅极80对第一、第二轻掺杂补偿区26、27无影响，第一、第二轻掺杂补偿区26、27保持高阻状态，能够降低TFT的关态电流。
综上所述，本发明提供的一种TFT基板的制作方法，通过在TFT中设置第一、第二轻掺杂补偿区，可降低TFT的关态电流；同时采用第一栅极与第二栅极组成双栅极结构，减小第一、第二轻掺杂补偿区对TFT开态电流的影响，所述第一栅极与第二栅极相连，由同一个栅极电压控制，不需要额外的电压信号；制程简单，生产成本低，制得的TFT基板具有较好的电学性能。本发明制得的TFT基板，采用轻掺杂补偿结构来降低TFT的关态电流，采用双栅极结构来降低轻掺杂补偿结构对TFT开态电流的影响，结构简单，且电学性能优异。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

1.一种TFT基板的制作方法，其特征在于，包括如下步骤：
步骤1、提供一基板(10)，在所述基板(10)上形成有源层(20)，对所述有源层(20)进行离子注入，并在所述有源层(20)上定义出沟道区(21)；
步骤2、在所述有源层(20)、及基板(10)上依次沉积绝缘层(32)与第一金属层(31)，采用一道光罩对所述第一金属层(31)和绝缘层(32)进行图形化处理，得到与所述有源层(20)的沟道区(21)的宽度相等并且在宽度方向上两端对齐的第一栅极(40)与栅极绝缘层(30)；
以所述第一栅极(40)和栅极绝缘层(30)为阻挡层，对所述有源层(20)进行离子注入，得到分别位于沟道区(21)两侧的第一离子重掺杂区(22)与第二离子重掺杂区(23)；
步骤3、在所述第一栅极(40)、有源层(20)、及基板(10)上沉积第二金属层(41)，采用一道光罩对所述第一金属层(41)进行图形化处理，得到位于所述有源层(20)的两侧且分别与所述有源层(20)的第一离子重掺杂区(22)与第二离子重掺杂区(23)相接触的源极(51)与漏极(52)；
将所述第一离子重掺杂区(22)上与源极(51)相接触的部分定义为源极接触区(24)；将所述第二离子重掺杂区(23)上与漏极(52)相接触的部分定义为漏极接触区(25)；
以所述源极(51)、漏极(52)、及第一栅极(40)为阻挡层，对所述第一离子重掺杂区(22)上位于所述源极(51)与第一栅极(40)之间的部分、以及所述第二离子重掺杂区(23)上位于第一栅极(40)与漏极(52)之间的部分进行蚀刻，去除上层离子浓度较高的部分，保留下层离子浓度较低的部分，从而得到位于所述源极接触区(24)与沟道区(21)之间的第一轻掺杂补偿区(26)、以及位于所述沟道区(21)与漏极接触区(25)之间的第二轻掺杂补偿区(27)；
步骤4、在所述源极(51)、漏极(52)、有源层(20)、及第一栅极(40)上沉积钝化保护层(60)，采用一道光罩对所述钝化保护层(60)进行图形化处理，对应于所述源极(51)、漏极(52)、及第一栅极(40)的上方分别形成第一通孔(61)、第二通孔(62)、及第三通孔(63)；
步骤5、在所述钝化保护层(60)上沉积导电层(90)，采用一道光罩对所述导电层(90)进行图形化处理，得到第一接触电极(71)、第二接触电极(72)、及第二栅极(80)，所述第一、第二接触电极(71、72)分别经由第一、第二通孔(61、62)与源极(51)、漏极(52)相连，所述第二栅极(80)经由第三通孔(63)与第一栅极(40)相连；
所述第二栅极(80)的宽度大于所述第一栅极(40)的宽度，且所述第二栅极(80)的两侧分别覆盖位于所述第一栅极(40)两侧的第一轻掺杂补偿区(26)与第二轻掺杂补偿区(27)。
2.如权利要求1所述的TFT基板的制作方法，其特征在于，所述步骤1中，在所述基板(10)上形成有源层(20)的具体实施方式为：在基板(10)上沉积非晶硅薄膜，采用固相结晶方法将所述非晶硅薄膜转化为低温多晶硅薄膜后，采用一道光罩对所述低温多晶硅薄膜进行图形化处理，得到有源层(20)。
3.如权利要求1所述的TFT基板的制作方法，其特征在于，所述沟道区(21)为N型离子轻掺杂区，所述源极接触区(24)、漏极接触区(25)为P型离子重掺杂区，所述第一轻掺杂补偿区(26)、第二轻掺杂补偿区(27)为P型离子轻掺杂区；或者，所述沟道区(21)为P型离子轻掺杂区，所述源极接触区(24)、漏极接触区(25)为N型离子重掺杂区，所述第一轻掺杂补偿区(26)、第二轻掺杂补偿区(27)为N型离子轻掺杂区。
4.如权利要求1所述的TFT基板的制作方法，其特征在于，所述第二栅极(80)的左侧与源极(51)的右侧之间形成第一重叠区(810)，所述第二栅极(80)的右侧与漏极(52)的左侧之间形成第二重叠区(820)。
5.如权利要求1所述的TFT基板的制作方法，其特征在于，所述第一、第二接触电极(71、72)、及第二栅极(80)的材料均为透明导电金属氧化物。
6.一种TFT基板，其特征在于，包括基板(10)、设于所述基板(10)上的有源层(20)、设于所述有源层(20)及基板(10)上的源极(51)与漏极(52)、设于所述有源层(20)上的栅极绝缘层(30)、设于所述栅极绝缘层(30)上的第一栅极(40)、设于所述源极(51)、漏极(52)、有源层(20)、及第一栅极(40)上的钝化保护层(60)、以及设于所述钝化保护层(60)上的第一接触电极(71)、第二接触电极(72)、及第二栅极(80)；
所述有源层(20)包括位于中间的沟道区(21)、位于两端的源极接触区(24)与漏极接触区(25)、位于所述源极接触区(24)与沟道区(21)之间的第一轻掺杂补偿区(26)、以及位于所述沟道区(21)与漏极接触区(25)之间的第二轻掺杂补偿区(27)；
所述第一栅极(40)、及栅极绝缘层(30)与所述有源层(20)的沟道区(21)的宽度相等并且在宽度方向上两端对齐；
所述钝化保护层(60)上设有分别对应于所述源极(51)、漏极(52)、及第一栅极(40)上方的第一通孔(61)、第二通孔(62)、及第三通孔(63)；所述第一、第二接触电极(71、72)分别经由第一、第二通孔(61、62)与源极(51)、漏极(52)相连，所述第二栅极(80)经由第三通孔(63)与第一栅极(40)相连；
所述第二栅极(80)的宽度大于所述第一栅极(40)的宽度，且所述第二栅极(80)的两侧分别覆盖位于所述第一栅极(40)两侧的第一轻掺杂补偿区(26)与第二轻掺杂补偿区(27)。
7.如权利要求6所述的TFT基板，其特征在于，所述第一轻掺杂补偿区(26)与第二轻掺杂补偿区(27)的上表面低于所述沟道区(21)、源极接触区(24)、及漏极接触区(25)的上表面。
8.如权利要求6所述的TFT基板，其特征在于，所述沟道区(21)为N型离子轻掺杂区，所述源极接触区(24)、漏极接触区(25)为P型离子重掺杂区，所述第一轻掺杂补偿区(26)、第二轻掺杂补偿区(27)为P型离子轻掺杂区；或者，所述沟道区(21)为P型离子轻掺杂区，所述源极接触区(24)、漏极接触区(25)为N型离子重掺杂区，所述第一轻掺杂补偿区(26)、第二轻掺杂补偿区(27)为N型离子轻掺杂区。
9.如权利要求6所述的TFT基板，其特征在于，所述第二栅极(80)的左侧与源极(51)的右侧之间形成第一重叠区(810)，所述第二栅极(80)的右侧与漏极(52)的左侧之间形成第二重叠区(820)。
10.如权利要求6所述的TFT基板，其特征在于，所述第一、第二接触电极(71、72)、及第二栅极(80)的材料均为透明导电金属氧化物。
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