CN105529257A - 一种优化堆叠栅介质与锗界面的方法 - Google Patents

一种优化堆叠栅介质与锗界面的方法 Download PDF

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CN105529257A
CN105529257A CN201610053917.7A CN201610053917A CN105529257A CN 105529257 A CN105529257 A CN 105529257A CN 201610053917 A CN201610053917 A CN 201610053917A CN 105529257 A CN105529257 A CN 105529257A
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李成
池晓伟
陈松岩
黄巍
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Xiamen University
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
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Abstract

一种优化堆叠栅介质与锗界面的方法,涉及堆叠栅介质。对Ge衬底进行清洗,去除有机污染物、氧化物和金属杂质等物质;将清洗后的Ge衬底放入原子层沉积系统中,沉积一层Al2O3薄膜,实现对Ge衬底的表面钝化,获得Al2O3/Ge结构;将Al2O3/Ge结构样品进行湿法退火处理,实现Al2O3/Ge界面态的优化;在处理后的样品上生长HfO2高K介质;将获得的样品正面固定在掩膜板上,放入磁控溅射机中沉积金属层作为上电极,在样品Ge衬底的背面溅射金属层作为背电极,即得MOS结构器件,实现优化堆叠栅介质与锗界面。可优化高K介质/Ge界面态,并能维持钝化层的热稳定性,可减小工艺流程和时间成本。

Description

一种优化堆叠栅介质与锗界面的方法
技术领域
本发明涉及堆叠栅介质,尤其是涉及一种优化堆叠栅(HfO2/Al2O3)介质与锗界面的方法。
背景技术
随着半导体技术的发展,晶体管的特征尺寸不断等比例缩小[1],栅极介质材料SiO2的厚度越来越接近其极限物理厚度,采用HfO2等高K介质代替传统的SiO2栅介质已成为发展的必然。此外,锗衬底由于具有较大的空穴迁移率(Si的四倍),基于这些优点,锗衬底高K介质栅MOSFET器件已成为业内人士的研究热点[2-3]。但HfO2/Ge界面态密度过大已成为锗衬底MOSFET器件进一步发展的一个重要问题[4-5]。研究人员已多方面尝试采用湿法退火[6-7]、GeO2钝化、GeOxNy钝化及Si表面钝化等手段实现HfO2/Ge界面性能的优化。
此外,Al2O3因为具有较高的介电常数9和较好的阻隔效果而被广泛应用于Ge表面钝化领域。目前为止,HfO2/Al2O3/Ge结构堆叠栅的研究已经取得了一定的进展[8-9],但Al2O3/Ge的界面态仍有进一步优化的空间。
参考文献:
[1]奥地利,艾罗拉,张兴.用于VLSI模拟的小尺寸MOS器件模型:理论与实践[J].1999。
[2]RaviPillarisetty,Academicandindustryresearchprogressingermaniumnanodevices[J],NATURE,2011,479:324-328。
[3]INTERNATIONALTECHNOLOGYROADMAPFORSEMICONDUCTORS[J],2011EDITIO。
[4]M.Houssa,G.Pourtois,M.Caymax,etal.First-principlesstudyofthestructuralandelectronicpropertiesof(100)Ge/Ge(M)O[sub2]interfaces(M=Al,La,orHf)[J],Appl.Phys.Lett.2008,92,242101。
[5]KojiKita,ShoSuzuki,HideyukiNomura,etal.DirectEvidenceofGeOVolatilizationfromGeO2/GeandImpactofItsSuppressiononGeO2/GeMetal–Insulator–SemiconductorCharacteristics[J].Jpn.J.Appl.Phys.200847:2349。
[6]GuanzhouLiu,ChengLi,HongkaiLai,etal.GeIncorporationinHfO2DielectricDepositedonGeSubstrateduringDry/WetThermalAnnealing[J],J.Electrochem.Soc.,2010,157:6H603-H606。
[7]Xu,J.P,Lai,P.T,Li,C.X,etal.ImprovedelectricalpropertiesofGermaniumMOScapacitorswithgatedielectricgrowninwet-NOambient[J],ElectronDeviceLetters,IEEE,2006,27:439-441。
[8]ShankarSwaminathan,MichaelShandalov,YasuhiroOshima,etal.BilayermetaloxidegateinsulatorsforscaledGe-channelmetal-oxide-semiconductordevices[J],Appl.Phys.Lett.2010,96:082904。
[9]S.Mather,N.Sedghi,M.Althobaiti,etal.LowEOTGeO2/Al2O3/HfO2onGesubstrateusingultrathinAldeposition[J],MicroelectronicEngineering2013,109:126–128。
发明内容
本发明的目的在于针对目前锗MOS器件中高K介质HfO2/Ge界面态密度过大,造成沟道迁移率下降、栅极漏电流变大等问题,提供既能优化界面又可以有效阻隔界面互扩散,可获得较小界面态密度(Dit)和较小等效氧化层厚度(EOT<1nm)的锗沟道MOS堆叠栅结构的一种优化堆叠栅介质与锗界面的方法。
本发明包括以下步骤:
1)对Ge衬底进行清洗,去除有机污染物、氧化物和金属杂质等物质;
2)将清洗后的Ge衬底放入原子层沉积系统(ALD)中,沉积一层Al2O3薄膜,实现对Ge衬底的表面钝化,获得Al2O3/Ge结构;
3)将步骤2)得到的Al2O3/Ge结构样品进行湿法退火处理,实现Al2O3/Ge界面态的优化;
4)在步骤3)处理后的样品上生长HfO2高K介质;
5)将步骤4)中获得的样品正面固定在掩膜板上,放入磁控溅射机中沉积金属层作为上电极,在样品Ge衬底的背面溅射金属层作为背电极,即得到MOS结构器件,实现优化堆叠栅介质与锗界面。
在步骤1)中,所述清洗可采用如下方法:先对Ge片进行有机清洗,依次在丙酮、乙醇、去离子水中各超声清洗10min,去除有机污染物;再用去离子水冲洗后放入盐酸溶液中漂洗4min,去除表面氧化物层;然后用去离子水冲洗后放入氢氟酸溶液中漂洗30s;经过去离子水冲洗,最后用N2吹干;所述盐酸溶液中按体积比HCl∶H2O=1∶4;所述氢氟酸溶液中按体积比HF∶H2O=1∶50。
在步骤4)中,所述生长HfO2高K介质可采用原子层沉积法。
在步骤5)中,所述作为上电极的金属层的厚度可为300nm。
本发明的技术方案是首先在清洗后的Ge衬底上采用原子层沉积系统(ALD)沉积一层超薄的Al2O3钝化层,接着对Al2O3表面钝化后的Ge衬底进行湿法退火。退火完成后在ALD系统中进行HfO2介质的沉积,获得界面较好的HfO2/Al2O3/Ge堆叠栅结构。
本发明是采用原子层沉积系统获得HfO2/Al2O3/Ge结构的堆叠栅,并采用湿法退火的方式实现Al2O3/Ge界面态的性能优化。这种方法可以优化高K介质/Ge界面态,并能维持钝化层的热稳定性,是一种具有广阔应用空间的新方法。尤其是原子层沉积系统(ALD)原位湿法退火法,该方法可以大大减小工艺的流程和时间成本。这一方法可实现锗MOSFET器件的产业化应用。
附图说明
图1为本发明脉冲湿法退火优化界面态并制备HfO2/Al2O3/Ge结构堆叠栅MOS器件的流程示意图。
具体实施方式
以下实施例将结合附图对本发明作进一步的说明。
实施例1:图1给出本发明脉冲湿法退火优化界面态并制备HfO2/Al2O3/Ge结构堆叠栅MOS器件的流程示意图。其中,1为Ge衬底,2为原子层沉积法制备的Al2O3超薄钝化层,3为经过脉冲湿法退火处理的Al2O3超薄钝化层,4为原子层沉积法制备的HfO2栅介质层,5为金属电极层。首先对Ge衬底进行清洗:先对Ge片进行有机清洗,溶液(先丙酮,后乙醇,最后去离子水)中各超声10min,去除有机污染物;用去离子水冲洗后放入盐酸溶液中(HCl∶H2O=1∶4)漂洗4min,去除表面氧化物层;用去离子水冲洗后放入氢氟酸溶液中(HF∶H2O=1∶50)漂洗30s;经过去离子水冲洗,最后用N2吹干(见图1(a))。
将清洗后的Ge片迅速放入原子层沉积系统(ALD)中,用ALD沉积一层超薄的Al2O3薄膜(见图1(b));接着,对Al2O3钝化后的样品进行湿法退火处理(见图1(c));然后,使用ALD在样品表面沉积一定厚度的HfO2薄膜(见图1(d))。
最后,将处理过的样品固定在掩膜板上,用磁控溅射机沉积一层300nm左右的金属电极作为上电极,在Si衬底背面溅射金属作为背电极,得到MOS器件结构(见图1(e))。
本发明首先使用原子层沉积法在锗衬底表面沉积薄层Al2O3钝化层,并采用湿法退火的方式对Al2O3/Ge进行界面优化,最后沉积HfO2介质层获得堆叠栅结构。本发明是一种与硅标准工艺相兼容的工艺方法。

Claims (5)

1.一种优化堆叠栅介质与锗界面的方法,其特征在于包括以下步骤:
1)对Ge衬底进行清洗,去除有机污染物、氧化物和金属杂质等物质;
2)将清洗后的Ge衬底放入原子层沉积系统(ALD)中,沉积一层Al2O3薄膜,实现对Ge衬底的表面钝化,获得Al2O3/Ge结构;
3)将步骤2)得到的Al2O3/Ge结构样品进行湿法退火处理,实现Al2O3/Ge界面态的优化;
4)在步骤3)处理后的样品上生长HfO2高K介质;
5)将步骤4)中获得的样品正面固定在掩膜板上,放入磁控溅射机中沉积金属层作为上电极,在样品Ge衬底的背面溅射金属层作为背电极,即得到MOS结构器件,实现优化堆叠栅介质与锗界面。
2.如权利要求1所述一种优化堆叠栅介质与锗界面的方法,其特征在于在步骤1)中,所述清洗采用如下方法:先对Ge片进行有机清洗,依次在丙酮、乙醇、去离子水中各超声清洗10min,去除有机污染物;再用去离子水冲洗后放入盐酸溶液中漂洗4min,去除表面氧化物层;然后用去离子水冲洗后放入氢氟酸溶液中漂洗30s;经过去离子水冲洗,最后用N2吹干。
3.如权利要求2所述一种优化堆叠栅介质与锗界面的方法,其特征在于所述盐酸溶液中按体积比HCl∶H2O=1∶4;所述氢氟酸溶液中按体积比HF∶H2O=1∶50。
4.如权利要求1所述一种优化堆叠栅介质与锗界面的方法,其特征在于在步骤4)中,所述生长HfO2高K介质采用原子层沉积法。
5.如权利要求1所述一种优化堆叠栅介质与锗界面的方法,其特征在于在步骤5)中,所述作为上电极的金属层的厚度为300nm。
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