CN105321833B - 半导体封装系统和方法 - Google Patents
半导体封装系统和方法 Download PDFInfo
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- CN105321833B CN105321833B CN201510454902.7A CN201510454902A CN105321833B CN 105321833 B CN105321833 B CN 105321833B CN 201510454902 A CN201510454902 A CN 201510454902A CN 105321833 B CN105321833 B CN 105321833B
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- sealant
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- hole
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Abstract
在第一管芯和第二管芯上形成第一保护层,并且在第一保护层内形成开口。密封第一管芯和第二管芯,从而使得密封剂厚于第一管芯和第二管芯,并且在开口内形成孔。也可以将重分布层形成为在密封剂上方延伸,并且第一管芯可以与第二管芯分离。本发明实施例涉及半导体封装系统和方法。
Description
技术领域
本发明实施例涉及半导体封装系统和方法。
背景技术
由于各种电子部件(例如,晶体管、二极管、电阻器、电容器等)的集成度不断提高,半导体产业经历了快速的发展。在大多数情况下,这种集成度的提高源自最小部件尺寸的不断减小(例如,将半导体工艺节点朝着亚20nm节点缩小),这使得更多的部件集成在给定的区域内。随着近来对微型化、更高速度、更大带宽以及更低功耗和延迟的需求增长,也产生了对于半导体管芯的更小和更具创造性的封装技术的需要。
随着半导体技术的进一步发展,堆叠和接合的半导体器件作为有效替代物出现从而进一步减小半导体器件的物理尺寸。在堆叠式半导体器件中,至少部分地在不同的衬底上制造有源电路(诸如逻辑、存储器、处理器电路等),然后将这些有源电路物理接合和电接合在一起以形成功能器件。这种接合工艺利用复杂的技术,并且期望获得改进。
发明内容
根据本发明的一个实施例,提供了一种半导体器件,包括:半导体管芯,所述半导体管芯包括第一侧、与所述第一侧相对的第二侧和在所述第一侧和所述第二侧之间延伸的第一侧壁;保护层,位于所述半导体管芯上方,所述保护层包括第二侧壁;延伸穿过所述保护层的孔;以及密封剂,密封所述半导体管芯,所述密封剂与所述第一侧、所述第一侧壁和所述第二侧壁的第一部分物理接触,其中,所述第二侧壁的第二部分不与所述密封剂物理接触。
根据本发明的另一实施例,还提供了一种半导体器件,包括:半导体管芯,具有第一侧壁;第一保护层,位于所述半导体管芯上方,其中,所述第一保护层的第二侧壁从所述半导体管芯的所述第一侧壁凹进;穿过所述第一保护层的开口;密封剂,覆盖所述第一侧壁和所述第二侧壁,其中,所述密封剂具有与所述第一保护层平齐的顶面;以及导电材料,填充所述开口并且在所述密封剂上方延伸。
根据本发明的又一实施例,还提供了一种制造半导体器件的方法,所述方法包括:在第一管芯和第二管芯上方形成第一保护层;用密封剂密封所述第一管芯和所述第二管芯,其中,所述密封剂具有比所述第一管芯更大的厚度;以及形成延伸穿过所述第一保护层并且延伸在所述密封剂上方的导电材料。
附图说明
当结合附图进行阅读时,从以下详细描述可最佳理解本发明的各方面。应该注意,根据工业中的标准实践,各个部件未按比例绘制。实际上,为了清楚的讨论,各个部件的尺寸可以任意地增大或减小。
图1示出了根据一些实施例的具有第一保护层的晶圆。
图2示出了根据一些实施例的将晶圆分割成第一管芯和第二管芯。
图3示出了根据一些实施例的第一管芯和第二管芯的密封。
图4A至图4B示出了根据一些实施例的晶种层的形成。
图5示出了根据一些实施例的孔和重分布层的形成。
图6示出了根据一些实施例的第二保护层的形成。
图7示出了根据一些实施例的凸块下金属和接触凸块的形成。
图8示出了根据一些实施例的第一管芯与第二管芯的分离。
图9示出了根据一些实施例的具有通孔的第一管芯和第二管芯的密封。
图10示出了根据一些实施例的与通孔电接触的晶种层的形成。
图11示出了根据一些实施例的与通孔电连接的重分布层、凸块下金属和接触凸块的形成。
图12示出了根据一些实施例的具有通孔的第一管芯和第二管芯的分离。
图13A至图13C示出了根据一些实施例的接触焊盘、孔、重分布层和通孔的放大的截面图和两个相关的自上而下视图。
具体实施方式
以下公开内容提供了许多用于实现所提供主题的不同特征的不同实施例或实例。下面描述了组件和布置的具体实例以简化本发明。当然,这些仅仅是实例,而不旨在限制本发明。例如,在以下描述中,在第二部件上方或者上形成第一部件可以包括第一部件和第二部件形成为直接接触的实施例,并且也可以包括在第一部件和第二部件之间可以形成额外的部件,从而使得第一部件和第二部件可以不直接接触的实施例。此外,本发明可在各个实例中重复参考标号和/或字母。该重复是为了简单和清楚的目的,并且其本身不指示所讨论的各个实施例和/或配置之间的关系。
现参考图1,示出了具有形成在晶圆100内和上方的第一管芯101和第二管芯103的晶圆100,其在一个实施例中将用于集成扇出(INFO)晶圆级芯片尺寸封装(WLCSP),该集成扇出(INFO)晶圆级芯片尺寸封装(WLCSP)适用于叠层封装(PoP)结构。在实施例中,第一管芯101和第二管芯103形成在通过第一划线区(在图1中用标号为105的虚线表示)分隔开的晶圆100内,其中,晶圆100沿着该第一划线区被分隔开以形成单独的第一管芯101和第二管芯103。在实施例中,晶圆100(并且,因此,第一管芯101和第二管芯103)可以包括衬底、第一有源器件、金属化层(未分别在图1中示出)、和接触焊盘107。在实施例中,衬底可以包括掺杂或未掺杂的块状硅、或绝缘体上硅(SOI)衬底的有源层。通常,SOI衬底包括诸如硅、锗、锗硅、SOI、绝缘体上硅锗(SGOI)或它们的组合的半导体材料的层。可以使用的其他衬底包括多层衬底、梯度衬底或混合取向衬底。
第一有源器件包括各种有源器件和无源器件,诸如可以用于产生第一管芯101和第二管芯103的设计的期望的结构和功能部分的电容器、电阻器、电感器等。可以在衬底内或在衬底上使用任何合适的方法形成第一有源器件。
金属化层形成在衬底和第一有源器件上方并且设计为连接各个第一有源器件以形成用于第一管芯101和第二管芯103的功能电路。在实施例中,金属化层是由介电材料和导电材料的交替层形成的并且可以通过任何合适的工艺(诸如沉积、镶嵌、双镶嵌等)形成。在实施例中,可以存在通过至少一个层间介电层(ILD)与衬底分离的四个金属化层,但是金属化层的精确的数量取决于第一管芯101和第二管芯103的设计。
形成接触焊盘107以为金属化层和第一有源器件提供外部接触。在实施例中,接触焊盘107由诸如铝的导电材料形成,但是诸如铜、钨等的其他合适的材料也可以可选地利用。接触焊盘107可以使用诸如CVD或PVD的工艺形成,但是其他合适的材料和方法也可以可选地利用。一旦已经沉积用于接触焊盘107的材料,则可以使用例如光刻掩蔽和蚀刻工艺将材料成形为接触焊盘107。
在第一管芯101和第二管芯103上方,可以放置和图案化第一保护层109。在实施例中,第一保护层109可以是诸如聚苯并恶唑(PBO)或聚酰亚胺(PI)、氧化硅、氮化硅、氮氧化硅、苯并环丁烯(BCB)的保护材料,或任何其他合适的保护材料。第一保护层109可以基于所选择的材料使用诸如旋涂工艺、沉积工艺(例如,化学汽相沉积)或其他合适的工艺形成,并且可以形成为在约1μm和约100μm之间的第一厚度T1,诸如约20μm。
一旦形成,则图案化第一保护层109以形成孔开口111和暴露接触焊盘107。另外,图案化第一保护层109以形成第一开口113以暴露划线区105。划线区105的暴露另外还使第一保护层109从第一管芯101和第二管芯103的侧壁凹进,从而使得在第一管芯101已与第二管芯103分隔开(下文结合图2进一步描述)之后,第一保护层109的侧壁与第一管芯101和第二管芯103的侧壁横向分离并且不与第一管芯101和第二管芯103的侧壁对准。
在实施例中,例如,可以使用光刻掩蔽和蚀刻工艺图案化第一保护层109。在这一工艺中,将第一光刻胶(未在图1单独示出)应用于第一保护层109和然后曝光于图案化的光源。光源将入射到第一光刻胶上并且引发第一光刻胶的特性的变化,然后利用该特性的变化以选择性地去除第一光刻胶的曝光部分或未曝光部分并且暴露第一保护层109。然后在例如去除第一保护层109的部分以暴露接触焊盘107的蚀刻工艺期间将第一光刻胶用作掩模。一旦第一保护层109已被图案化,则可以使用例如灰化工艺去除第一光刻胶。
在实施例中,可以将孔开口111形成为在底部具有在约1μm和约50μm之间的第一直径D1,诸如约15μm。此外,可以图案化第一保护层109以暴露第一管芯101和第二管芯103之间的划线区105。例如,可以图案化第一保护层109以在划线区105上方形成第一开口113,第一开口113具有在约20μm和约150μm之间的第一宽度W1,诸如约80μm。
图2示出了,一旦已经形成孔开口111,通常晶圆100,特别是第一管芯101和第二管芯103可以被减薄。在实施例中,可以使用例如化学机械抛光减薄晶圆100,从而利用化学反应物和研磨料的组合以及一种或多种研磨垫以去除与接触焊盘107相对的晶圆100的部分。然而,也可以可选地利用任何其他合适的工艺,诸如物理研磨工艺、蚀刻工艺或这些的组合。在实施例中,将晶圆100减薄为具有在约30μm和约700μm之间的第二厚度T2,诸如约250μm。
一旦减薄,可以对第一管芯101和第二管芯103施加管芯附接膜(DAF)201以辅助将第一管芯101和第二管芯103附接至载体晶圆301(未在图1中示出,但结合图3在下文示出和描述)。在实施例中,管芯附接膜201是环氧树脂、酚醛树脂、丙烯酸橡胶、二氧化硅填料或它们的组合,并使用层压技术来施加管芯附接膜201。然而,可以可选地利用任何其他合适的可选的材料和形成方法。
在施加管芯附接膜201之后,可以分割第一管芯101和第二管芯103并且将第一管芯101和第二管芯103从剩余的晶圆100分离。在实施例中,可以使用激光以在晶圆100内的划线区105内形成沟槽。一旦已形成沟槽,可以使用锯条(在图2中由标号为203的虚线框表示)实施分割以在第一管芯101和第二管芯103之间的划线区105内切割晶圆100,从而使第一管芯101和第二管芯103彼此分离并且将晶圆100分为单独的管芯。
然而,本领域普通技术人员将认识到,利用锯条203从晶圆100分割第一管芯101和第二管芯103仅仅是一个说明性实施例,并且不旨在限制。可以可选地利用用于分割第一管芯101和第二管芯103的可选方法,诸如利用一次或多次蚀刻以从晶圆100分割第一管芯101和第二管芯103。可以可选地利用这些方法和任何其他合适的方法以将晶圆100分割成第一管芯101和第二管芯103。
图3示出了将第一管芯101和第二管芯103附接至载体晶圆301和利用密封剂303密封第一管芯101和第二管芯103。在实施例中,载体晶圆301可以包括例如玻璃、氧化硅、氧化铝等。载体晶圆301可以具有大于约12密耳的厚度。可以例如使用管芯附接膜201或其他合适的粘合剂来附接第一管芯101和第二管芯103。
一旦附接至载体晶圆301,则可以利用密封剂303密封第一管芯101和第二管芯103以提供保护,以及提供用于进一步处理(下文结合图3至图8进一步描述)的另一表面。在实施例中,密封剂303可以是模塑料并且可以使用模制器件来放置。例如,可以将第一管芯101和第二管芯103放置在模制器件的腔体(图2未示出)内,并且可以不透气地密封该腔体。
在实施例中,将第一管芯101和第二管芯103放置在模制器件中,从而使得模制器件覆盖孔开口111,并且密封剂303在模制工艺期间不进入孔开口111。例如,在一个实施例中,模制器件包括彼此接触的顶部和底部以在它们之间形成腔体。第一管芯101和第二管芯103放置在底部上,并且降低顶部以与第一保护层109物理接触而形成腔体。顶部和第一保护层109之间的接触形成用于模制工艺的腔体/不透气密封并且还密封孔开口111,从而使得密封剂303在密封工艺期间不能进入孔开口111。
然而,本领域普通技术人员会认识到,模制器件的顶部的使用仅仅是一个说明性实施例并且不旨在限制实施例。相反,可以可选地利用防止密封剂303进入孔开口111的任何合适的方法。例如,在密封工艺期间,板或其他固体阻挡件可以放置为与第一保护层109接触并覆盖孔开口111,或在密封工艺之前,可以将材料放置在孔开口111内,和然后在密封工艺之后去除。所有这些工艺预期完全包括在本实施例的范围内。
一旦第一管芯101和第二管芯103位于腔体内,可以在不透气地密封腔体之前,将密封剂303放置在腔体内或者可以通过注入口将密封剂303注入腔体内。在实施例中,密封剂303可以是模塑料树脂,诸如聚酰亚胺、PPS、PEEK、PES、耐热晶体树脂、这些的组合等。
在可选实施例中,密封剂303可以选择为使得密封剂303具有介电功能,并且使得第一晶种层401(未在图3中示出,但是结合图4A在下文中描述)可以形成在密封剂303上方并且与密封剂303物理接触。例如,密封剂303可以为20μm、300μm或690μm。通过使用这些材料,可以避免单独的钝化层405(未在图3中示出,但是在下文的图4B中的另一实施例中示出),简化了整个工艺。
在实施例中,模制器件成形为放置密封剂303,从而使得密封剂303具有大于第一管芯101和第二管芯103的厚度的第三厚度T3。例如,在实施例中,其中,第一管芯101具有约200μm的第二厚度T2,密封剂303具有在约201μm和约215μm之间的第三厚度T3,诸如约210μm。另外,在一些实施例中,第三厚度T3虽然大于第一厚度T1,但是小于第一管芯101和第一保护层109的组合厚度(T1+T2)。因此,第一保护层109的侧壁可以由密封剂303部分地覆盖,侧壁的一部分暴露出来并且不具有密封剂303。
此外,由于第一保护层109已经从第一管芯101和第二管芯103的侧壁凹进(如上文结合图1的描述),密封剂303将在第一管芯101和第二管芯103的顶面上方延伸并且与第一管芯101和第二管芯103的顶面物理接触。因此,由于密封剂303覆盖例如第一管芯101和第一管芯101上方的第一保护层109之间的区域,密封剂303将具有阶梯形状。
一旦已将密封剂303放置在腔体内,使得密封剂303密封第一管芯101和第二管芯103周围的区域,则可以固化密封剂303以硬化密封剂303,从而获得最佳保护。虽然,精确的固化工艺至少部分取决于选择用于密封剂303的特定的材料,但是在将模塑料选择作为密封剂303的实施例中,通过诸如将密封剂303加热至介于约100℃和约130℃之间的温度(诸如约125℃)并持续约60秒至约3000秒(诸如约600秒)的工艺可以发生固化。此外,密封剂303内可以包括引发剂和/或催化剂以更好地控制固化工艺。
然而,本领域普通技术将认识到,上述固化工艺仅仅是一个示例性的工艺,并不旨在限制当前实施例。可以可选地利用其他固化工艺,诸如照射或甚至允许密封剂303在环境温度下硬化。可以使用任何合适的固化工艺,并且所有这些工艺预期完全包括在本文论述的实施例的范围内。
任选地,在一些实施例中,可以首先放置密封剂303,从而使得第三厚度T3大于第一厚度T1(对于第一保护层109)和第二厚度T2(对于第一管芯101)的总和。在这个实施例中,可以利用任选的平坦化工艺以平坦化密封剂303与第一保护层109(未在图3中单独示出)。在这个实施例中,诸如化学机械抛光工艺、物理研磨工艺、或一系列的一次或多次蚀刻的合适的平坦化工艺可以用于平坦化密封剂303与第一保护层109。
图4A示出了形成第一晶种层401以及在第一晶种层401上方形成并图案化第二光刻胶403。第一晶种层401是在后续加工步骤期间帮助形成较厚层的导电材料的薄层。第一晶种层401可以包括约厚的钛层和后面的约厚的铜层。取决于期望的材料,可以使用诸如溅射、蒸发、或PECVD工艺的工艺创建第一晶种层401。第一晶种层401可以形成为具有在约0.3μm和约1μm之间的厚度,诸如约0.5μm。
在这个实施例中,形成第一晶种层401,从而使得第一晶种层401延伸到孔开口111内并且内衬于孔开口111。此外,在密封剂303可以承受第一晶种层401的实施例中,第一晶种层401也形成在密封剂303上方并且与密封剂303接触,沿着密封剂303的顶面排列。因此,第一晶种层401形成为覆盖第一管芯101和第二管芯103上方的密封剂303和第一保护层109的暴露的顶面的连续的、单个材料层。
图4B示出了可选实施例,其中,在形成第一晶种层401之前,在密封剂303上方形成钝化层405。在实施例中,钝化层405可以是聚苯并恶唑(PBO),但是可以可选地利用诸如聚酰亚胺或聚酰亚胺的衍生物的任何适合的材料。可以使用例如旋涂工艺将钝化层405放置成具有在约5μm和约25μm之间的厚度,诸如约7μm,但是可以可选地利用任何合适的方法和厚度。
现在回到图4A描述的实施例,一旦已经形成第一晶种层401,则可以在第一晶种层401上方放置和图案化第二光刻胶403。在实施例中,可以使用例如旋涂技术在第一晶种层401上放置第二光刻胶403并将其放置为具有在约50μm和约250μm之间的高度,诸如约120μm。一旦放置于合适的地方,则可以通过将第二光刻胶403曝光于图案化的能量源(例如,图案化的光源)以引发化学反应,从而引发曝光于图案化的光源的第二光刻胶403的那些部分中的物理变化来图案化第二光刻胶403。然后,根据期望的图案,对曝光的第二光刻胶403施加显影剂以利用物理变化和选择性地去除第二光刻胶403的曝光部分或第二光刻胶403的未曝光部分。
在实施例中,在第二光刻胶403内形成的图案是暴露孔开口111的图案,从而使得在随后的处理步骤(下文结合图5来描述)可以填充孔开口111。另外,第二光刻胶403的图案化也暴露第一保护层109和密封剂303的部分(或者,可选地,钝化层405),在该部分,重分布层501(在图4A中未示出,但是下文结合图5示出并描述)可能是所期望的。这种布置允许利用密封剂303上方的区域以用于电路由和连接的目的。
图5示出了一旦第二光刻胶403已被图案化,在第二光刻胶403内形成孔503和重分布层501。在图5中,孔503被示出通过标号为505的虚线与重分布层501分离。然而,这是为了清楚的目的并且不必物理分离,这是因为孔503和重分布层501可以使用相同的材料和相同的工艺形成。可选地,如果需要,可形成与重分布层501分离的孔503。另外,虽然重分布层501和第一晶种层401在图中仍示出为单独的层,应当理解,第一晶种层401实际上是重分布层501的一部分。
在实施例中,孔503和重分布层501包括一种或多种导电材料,诸如铜、钨、其他导电金属等,并可以例如通过电镀、化学镀等工艺形成。在实施例中,使用电镀工艺,其中,将第一晶种层401和第二光刻胶403淹没或浸没在电镀溶液中。第一晶种层401的表面电连接到外部DC电源的负极侧,从而使得第一晶种层401在电镀工艺中用作阴极。固体导电阳极(诸如铜阳极)也浸没在溶液中并且附接至电源的正极侧。来自阳极的原子溶解到溶液中,并且阴极(例如,第一晶种层401)从溶液获得溶解的原子,从而镀第二光刻胶403的开口内的第一晶种层401的暴露的导电区。
一旦使用第二光刻胶403和第一晶种层401已经形成孔503和重分布层501,可以使用合适的去除工艺去除第二光刻胶403。在实施例中,等离子体灰化工艺可以用于去除第二光刻胶403,从而第二光刻胶403的温度可以增大,直到第二光刻胶403经历热分解并且可以被去除。然而,可以可选地利用诸如湿剥离的任何其他合适的工艺。第二光刻胶403的去除可以暴露下面的第一晶种层401的部分。
在去除第二光刻胶403暴露出下面的第一晶种层401之后,去除第一晶种层401的这些暴露部分。在实施例中,可以通过例如湿或干蚀刻工艺去除第一晶种层401的暴露部分(例如,未被孔503和重分布层501覆盖的那些部分)。例如,在干蚀刻工艺中,将孔503和重分布层501用作掩模,可以将反应物导向第一晶种层401。可选地,蚀刻剂可以喷射或放置为与第一晶种层401接触以去除第一晶种层401的暴露部分。
图6示出了第二保护层601的放置和图案化。在实施例中,第二保护层601可以类似于第一保护层109(如上文结合图1所进行的描述)。例如,第二保护层601可以是使用旋涂工艺放置的PBO或聚酰亚胺材料。然而,在其他实施例中,第二保护层601不同于第一保护层109,并且可以可选地利用任何合适的材料和制造方法。在实施例中,第二保护层601可以形成为具有在约1μm和约10μm之间的第四厚度T4,诸如约4μm。
一旦形成,可以图案化第二保护层601以形成第二开口603并且以暴露位于密封剂303上方的重分布层501的部分以及形成第三开口605。在实施例中,可以使用例如光刻掩蔽和蚀刻工艺图案化第二保护层601。在这一工艺中,将第三光刻胶(未在图6中单独示出)应用于第二保护层601和然后曝光于图案化的光源。光源将入射在第三光刻胶上并且引发第三光刻胶的特性的变化,然后利用该特性的变化以选择性地去除第三光刻胶的曝光部分或未曝光部分并且暴露第二保护层601。然后在例如去除第二保护层601的部分以暴露重分布层501的蚀刻工艺期间将第三光刻胶用作掩模。一旦第二保护层601已被图案化,则可以使用例如灰化工艺去除第三光刻胶。
在实施例中,可以将第二开口603形成为在底部具有在约2μm和约30μm之间的第二直径D2,诸如约10μm。此外,在本实施例中虽然第二开口603已经被示出和描述为暴露密封剂303上方的重分布层501的部分,但是这仅旨在为说明性的而并不旨在限制于该实施例。相反,第二开口603可以形成为暴露重分布层501的任何期望的部分。所有这些暴露旨在完全包括在本实施例的范围内。
此外,也可以在第一管芯101和第二管芯103之间的区域上方形成第三开口605以准备用于最终的分离(下文结合图8进一步描述)。在这个区域中,第三开口605可以具有在约20μm和约150μm之间的第二宽度W2,诸如约80μm。一旦第一管芯101已与第二管芯分离(下文结合图8进行描述),这样的结构也将使第二保护层601的侧壁远离密封剂303的侧壁凹进。
图7示出了在孔503内的凸块下金属(UBM)701和接触凸块703的形成。UBM 701可以包括三层导电材料,诸如钛层、铜层和镍层。然而,本领域普通技术人员将认识到可以有适合用于形成UBM701的材料和层的多种合适的布置,诸如铬/铬铜合金/铜/金的布置、钛/钛钨/铜的布置或铜/镍/金的布置。可以用于UBM 701的任何合适的材料或材料层预期完全包括在本实施例的范围内。
在实施例中,通过在重分布层501上方形成每层并且沿着穿过第二保护层601的第二开口603的内部创建UBM 701。可以使用诸如电化学镀的镀工艺实施每层的形成,但是取决于所期望的材料可以可选地使用诸如溅射、蒸发、或PECVD工艺的其他形成工艺。UBM 701可以形成为具有在约0.7μm和约10μm之间的厚度,诸如约5μm。
接触凸块703可以包括诸如锡的材料或诸如银、无铅锡、或铜的其他合适的材料。在其中接触凸块703是锡焊料凸块的实施例中,可以通过首先通过诸如蒸发、电镀、印刷、焊料转移、球放置(ball placement)等的这些常用的方法形成锡层(例如,形成至约100μm的厚度)来形成接触凸块703。一旦已经在该结构上形成锡层,可以实施回流以将该材料成形为期望的凸块形状。
图8示出了载体晶圆301的去除以及第一管芯101与第二管芯103的分离以形成诸如集成扇出封装件的封装件801。在实施例中,取决于选择用于管芯附接膜201的材料,可以通过物理、热、或紫外线工艺去除载体晶圆301。在管芯附接膜201热分解的实施例中,可以加热管芯附接膜201,从而使管芯附接膜201降低或失去粘合性。然后载体晶圆301可以从第一管芯101和第二管芯103物理分离。
一旦已经去除载体晶圆301,可以使第一管芯101从第二管芯103分离。在实施例中,可使用锯条203(上文结合图2进行了描述)切割第一管芯101和第二管芯103之间的密封剂303的区域来实施分离,从而使第一管芯101与第二管芯103分离。然而任何合适的方法可以可选地使用,诸如一系列的一次或多次蚀刻或在切割前形成沟槽,并且所有这些方法预期完全包括在该实施例的范围内。
通过在密封之前形成孔503,管芯偏移窗口可以被放大,这是因为迹线的接合(land)可以是自定义设计以覆盖孔开口。另外,通过首先形成孔503,可以消除研磨以暴露孔503的通常步骤,节约了成本和简化了工艺。这也允许采用孔503以用于集成扇出、晶圆级芯片尺寸封装(INFOWLCSP)。
图9至图12示出了另一实施例,其利用延伸穿过密封剂303的通孔901以将重分布层501电连接至封装件801的相对侧。在这个实施例中,在将第一管芯101和第二管芯103附接至载体晶圆301之前,通过首先在载体晶圆301上形成粘合层903、聚合物层905和第二晶种层907,在载体晶圆301上方形成通孔901(图9示出已图案化的通孔)。
在实施例中,将粘合层903放置在载体晶圆301上以辅助粘附上面的结构(例如,聚合物层905)。在实施例中,粘合层903可以包括紫外胶,当紫外胶暴露于紫外光时,其失去它的粘合特性。然而,也可以使用诸如压敏粘合剂、辐射固化胶粘剂、环氧树脂、它们的组合等的其他类型的粘合剂。粘合层903可以以半液体或凝胶的形式(在压力下容易变形)放置到载体晶圆301上。
聚合物层905被放置在粘合层903上方并且被使用以对例如第一管芯101和第二管芯103(一旦已经附接第一管芯101和第二管芯103)提供保护。在实施例中,聚合物层905可以是聚苯并恶唑(PBO),但是可以可选地利用诸如聚酰亚胺或聚酰亚胺的衍生物的任何适合的材料。可以使用例如旋涂工艺将聚合物层905放置成具有在约2μm和约15μm之间的厚度,诸如约5μm,但是可以可选地使用任何合适的方法和厚度。
第二晶种层907是在后续加工步骤期间辅助形成较厚层以形成通孔901的导电材料的薄层。第二晶种层907可以包括约厚的钛层和后面的约厚的铜层。取决于期望的材料,可以使用诸如溅射、蒸发、或PECVD工艺的工艺创建第二晶种层907。第二晶种层907可以形成为具有在约0.3μm和约1μm之间的厚度,诸如约0.5μm。
一旦已经形成第二晶种层907,可以在第二晶种层907上方放置和图案化第四光刻胶(在图9中没有示出)。在实施例中,可以使用例如旋涂技术在第二晶种层907上将第四光刻胶放置为具有在约50μm和约250μm之间的高度,诸如约120μm。一旦放置于合适的地方,则可以通过将第四光刻胶曝光于图案化的能量源(例如,图案化的光源)以引发化学反应,从而引发曝光于图案化的光源的第四光刻胶的那些部分中的物理变化来图案化第四光刻胶。然后,根据期望的图案,对曝光的第四光刻胶施加显影剂以利用物理变化和选择性地去除第四光刻胶的曝光部分或第四光刻胶的未曝光部分。
在实施例中,在第四光刻胶内形成的图案是用于通孔901的图案。将通孔901形成在这样的位置以使得通孔901位于随后附接的器件(诸如第一管芯101和第二管芯103)的不同侧上。然而,可以可选地利用用于通孔901的图案的任何合适的布置。
一旦第四光刻胶已被图案化,在第四光刻胶内形成通孔901。在实施例中,通孔901包括一种或多种导电材料,诸如铜、钨、其他导电金属等,并可以例如通过电镀、化学镀等形成。在实施例中,使用电镀工艺,其中,将第二晶种层907和第四光刻胶淹没或浸没在电镀溶液中。第二晶种层907的表面电连接到外部DC电源的负极侧,从而使得第二晶种层907在电镀工艺中用作阴极。固体导电阳极(诸如铜阳极)也浸没在溶液中并且附接至电源的正极侧。来自阳极的原子溶解到溶液中,并且阴极(例如,第二晶种层907)从溶液获得溶解的原子,从而镀第四光刻胶的开口内的第二晶种层907的暴露的导电区。
一旦使用第四光刻胶和第二晶种层907已经形成通孔901,可以使用合适的去除工艺去除第四光刻胶。在实施例中,等离子体灰化工艺可以用于去除第四光刻胶,从而第四光刻胶的温度可以增大,直到第四光刻胶经历热分解并且可以被去除。然而,可以可选地利用诸如湿剥离的任何其他合适的工艺。第四光刻胶的去除可以暴露下面的第二晶种层907的部分。
在去除第四光刻胶暴露出下面的第二晶种层907之后,去除第二晶种层907的这些暴露部分。在实施例中,可以通过例如湿或干蚀刻工艺去除第二晶种层907的暴露部分(例如,未被通孔901覆盖的那些部分)。例如,在干蚀刻工艺中,将通孔901用作掩模,可以将反应物导向第二晶种层907。可选地,蚀刻剂可以喷射或以其他方式放置为与第二晶种层907接触以去除第二晶种层907的暴露部分。在已经蚀刻掉第二晶种层907的暴露部分之后,暴露出通孔901之间的聚合物层905的部分。
一旦已经形成通孔901,例如,使用管芯附接膜201,将第一管芯101和第二管芯103放置在载体晶圆301上(与聚合物层905接触)。一旦附接,如上文结合图3的描述,可以通过密封剂303密封第一管芯101、第二管芯103和通孔901。例如,可以将第一管芯101、第二管芯103和通孔901放置在模制器件内(未在图9示出)并且可以将密封剂303放置到模制器件内和然后固化。
在已放置并固化密封剂303之后,可以实施平坦化工艺以平坦化密封剂303、通孔901和第一保护层109并且以暴露通孔901。在实施例中,平坦化工艺可以是例如化学机械抛光工艺,但是可以可选地使用诸如物理研磨或蚀刻的任何合适的工艺。
图10示出了在孔开口111内以及在第一保护层109、密封剂303上方并且与通孔开口901电连接的第一晶种层401的放置。如以上结合图4的描述,可以形成第一晶种层401。例如,第一晶种层401可以是通过溅射形成的铜,但是任何合适的材料和工艺可以可选地利用。然而,通过形成与通孔901电连接的第一晶种层401,第一晶种层电连接到封装件801的第二侧,从而允许电连接以电气布线,或通过外部连接(例如,凸块或铜柱),或连接至形成在封装件801的相对侧上的另一重分布层。
此外,图10还示出了第二光刻胶403在第一晶种层401上方的形成。在这个实施例中,如以上结合图4所描述的,可以放置和曝光第二光刻胶403。然而,第二光刻胶403图案化为不在通孔901上方。
图11示出了重分布层501、第二保护层601、UBM 701和接触凸块703的形成。如结合图4至图7的以上描述,可以形成重分布层501、第二保护层601、UBM 701和接触凸块703。然而,通过包括通孔901、重分布层501、UBM 701并且使得接触凸块703电连接至通孔,并且因此,接触凸块703电连接至封装件的第二侧。
图12示出了第一管芯101与第二管芯103的分离以形成封装件801,使用例如激光开槽或钻孔工艺然后使用锯条203以将第一管芯101与第二管芯103分离。然而,在本实施例中,封装件801还包括将重分布层501连接至与重分布层501相对的封装件801的第二侧的通孔901。这样的连接允许用于在封装件801周围电气布线的另一选择。
图13A至13C示出了接触焊盘107、孔503、重分布层501和通孔901的放大的截面图和两个相关的自上而下视图,其中图13B和图13C是沿着线A-A’截取的图13A的自上而下视图。通过在将管芯(例如,第一管芯101与第二管芯103)附接至载体晶圆301之前,形成用于孔503的开口,然后在孔503上方形成重分布层501,仅需要考虑用于重分布层501的接合(land)的尺寸以覆盖将发生的管芯偏移。因此,管芯偏移窗口被放大并且接合精度可以提高。
这通过图13B和图13C的自上而下视图示出。在图13B中,具有第一方向上的芯片偏移。然而,由于如上所述的实施例,重分布层501在这个方向仍然可以补偿它。此外,如图13C所示,即使不同方向上的芯片偏移也可以通过扩大接触焊盘107和孔503上方的重分布层501的接合(land)而得到补偿。
根据实施例,提供了一种半导体器件,半导体器件包括:半导体管芯,半导体管芯包括第一侧、与第一侧相对的第二侧和在第一侧和第二侧之间延伸的第一侧壁。保护层位于半导体管芯上方,保护层包括第二侧壁。孔延伸穿过保护层,以及密封剂密封半导体管芯,密封剂与第一侧、第一侧壁和第二侧壁的第一部分物理接触,其中,第二侧壁的第二部分不与密封剂物理接触。
根据另一实施例,提供了一种半导体器件,半导体器件包括:具有第一侧壁的半导体管芯和位于半导体管芯上方的第一保护层,其中,第一保护层的第二侧壁从半导体管芯的第一侧壁凹进。开口穿过第一保护层,并且密封剂覆盖第一侧壁和第二侧壁,其中,密封剂具有与第一保护层平齐的顶面。导电材料填充开口并且在密封剂上方延伸。
根据另一实施例,提供了一种制造半导体器件的方法,方法包括:在第一管芯和第二管芯上方形成第一保护层和用密封剂密封第一管芯和第二管芯,其中,密封剂具有比第一管芯更大的厚度。形成延伸穿过第一保护层并且延伸在密封剂上方的导电材料。
根据本发明的一个方面,提供了一种半导体器件,包括:半导体管芯,所述半导体管芯包括第一侧、与所述第一侧相对的第二侧和在所述第一侧和所述第二侧之间延伸的第一侧壁;保护层,位于所述半导体管芯上方,所述保护层包括第二侧壁;延伸穿过所述保护层的孔;以及密封剂,密封所述半导体管芯,所述密封剂与所述第一侧、所述第一侧壁和所述第二侧壁的第一部分物理接触,其中,所述第二侧壁的第二部分不与所述密封剂物理接触。
在上述半导体器件中,还包括与所述孔的至少一个电连接的重分布层,所述重分布层在所述密封剂上方延伸。
在上述半导体器件中,所述重分布层与所述密封剂物理接触。
在上述半导体器件中,还包括位于所述密封剂和所述重分布层之间的钝化层。
在上述半导体器件中,还包括延伸穿过所述密封剂的通孔。
在上述半导体器件中,还包括位于所述重分布层上方的第二保护层。
在上述半导体器件中,还包括延伸穿过所述第二保护层的凸块下金属。
根据本发明的另一方面,还提供了一种半导体器件,包括:半导体管芯,具有第一侧壁;第一保护层,位于所述半导体管芯上方,其中,所述第一保护层的第二侧壁从所述半导体管芯的所述第一侧壁凹进;穿过所述第一保护层的开口;密封剂,覆盖所述第一侧壁和所述第二侧壁,其中,所述密封剂具有与所述第一保护层平齐的顶面;以及导电材料,填充所述开口并且在所述密封剂上方延伸。
在上述半导体器件中,还包括位于所述导电材料上方的第二保护层。
在上述半导体器件中,还包括延伸穿过所述第二保护层以与所述导电材料电接触的凸块下金属。
在上述半导体器件中,还包括延伸穿过所述密封剂并且与所述导电材料电连接的通孔。
在上述半导体器件中,所述导电材料与所述密封剂物理接触。
在上述半导体器件中,所述导电材料是铜。
在上述半导体器件中,还包括位于所述密封剂和所述导电材料之间的钝化层。
根据本发明的又一方面,还提供了一种制造半导体器件的方法,所述方法包括:在第一管芯和第二管芯上方形成第一保护层;用密封剂密封所述第一管芯和所述第二管芯,其中,所述密封剂具有比所述第一管芯更大的厚度;以及形成延伸穿过所述第一保护层并且延伸在所述密封剂上方的导电材料。
在上述方法中,所述第一保护层具有侧壁,其中,所述侧壁的第一部分被所述密封剂覆盖,并且其中,所述侧壁的第二部分未被所述密封剂覆盖。
在上述方法中,形成所述导电材料形成了与所述密封剂物理接触的导电材料。
在上述方法中,还包括在形成所述导电材料之前在所述密封剂上方形成钝化层。
在上述方法中,还包括在密封所述第一管芯和所述第二管芯之前形成通孔,其中,密封所述第一管芯和所述第二管芯还密封所述通孔。
在上述方法中,还包括平坦化所述密封剂和所述第一保护层。
上面概述了若干实施例的特征,使得本领域技术人员可以更好地理解本发明的方面。本领域技术人员应该理解,他们可以容易地使用本发明作为基础来设计或修改用于实现与在此所介绍实施例相同的目的和/或实现相同优势的其他工艺和结构。本领域技术人员也应该意识到,这种等同构造并不背离本发明的精神和范围,并且在不背离本发明的精神和范围的情况下,在此他们可以做出多种变化、替换以及改变。
Claims (19)
1.一种半导体器件,包括:
半导体管芯,所述半导体管芯包括第一侧、与所述第一侧相对的第二侧和在所述第一侧和所述第二侧之间延伸的第一侧壁;
保护层,位于所述半导体管芯上方,所述保护层包括第二侧壁;
延伸穿过所述保护层的孔;
密封剂,密封所述半导体管芯,所述密封剂与所述第一侧、所述第一侧壁和所述第二侧壁的第一部分物理接触,其中,所述第二侧壁的第二部分不与所述密封剂物理接触;以及
重分布层,从所述保护层上方经过所述孔连续延伸至所述密封剂上方。
2.根据权利要求1所述的半导体器件,其中,所述重分布层与所述孔的至少一个电连接。
3.根据权利要求2所述的半导体器件,其中,所述重分布层与所述密封剂物理接触。
4.根据权利要求2所述的半导体器件,还包括位于所述密封剂和所述重分布层之间的钝化层。
5.根据权利要求2所述的半导体器件,还包括延伸穿过所述密封剂的通孔。
6.根据权利要求2所述的半导体器件,还包括位于所述重分布层上方的第二保护层。
7.根据权利要求6所述的半导体器件,还包括延伸穿过所述第二保护层的凸块下金属。
8.一种半导体器件,包括:
半导体管芯,具有第一侧壁;
第一保护层,位于所述半导体管芯上方,其中,所述第一保护层的第二侧壁从所述半导体管芯的所述第一侧壁凹进;
穿过所述第一保护层的开口;
密封剂,覆盖所述第一侧壁和所述第二侧壁,其中,所述密封剂具有与所述第一保护层平齐的顶面;以及
导电材料,填充所述开口并且在所述密封剂上方延伸;
其中,所述导电材料包括填充所述开口的第一部分和从所述第一保护层上方经过所述第一部分连续延伸至所述密封剂上方的第二部分。
9.根据权利要求8所述的半导体器件,还包括位于所述导电材料上方的第二保护层。
10.根据权利要求9所述的半导体器件,还包括延伸穿过所述第二保护层以与所述导电材料电接触的凸块下金属。
11.根据权利要求8所述的半导体器件,还包括延伸穿过所述密封剂并且与所述导电材料电连接的通孔。
12.根据权利要求8所述的半导体器件,其中,所述导电材料与所述密封剂物理接触。
13.根据权利要求12所述的半导体器件,其中,所述导电材料是铜。
14.根据权利要求8所述的半导体器件,还包括位于所述密封剂和所述导电材料之间的钝化层。
15.一种制造半导体器件的方法,所述方法包括:
在第一管芯和第二管芯上方形成第一保护层;
用密封剂密封所述第一管芯和所述第二管芯,其中,所述密封剂具有比所述第一管芯更大的厚度;以及
形成延伸穿过所述第一保护层并且延伸在所述密封剂上方的导电材料,其中,所述导电材料包括延伸穿过所述第一保护层的第一部分和从所述第一保护层上方经过所述第一部分连续延伸至所述密封剂上方的第二部分;
其中,所述第一保护层具有侧壁,其中,所述侧壁的第一部分被所述密封剂覆盖,并且其中,所述侧壁的第二部分未被所述密封剂覆盖。
16.根据权利要求15所述的方法,其中,形成所述导电材料形成了与所述密封剂物理接触的导电材料。
17.根据权利要求15所述的方法,还包括在形成所述导电材料之前在所述密封剂上方形成钝化层。
18.根据权利要求15所述的方法,还包括在密封所述第一管芯和所述第二管芯之前形成通孔,其中,密封所述第一管芯和所述第二管芯还密封所述通孔以使得所述通孔延伸穿过所述密封剂。
19.根据权利要求15所述的方法,还包括平坦化所述密封剂和所述第一保护层。
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