CN105190883B - 具有减少的高度的封装堆叠结构 - Google Patents

具有减少的高度的封装堆叠结构 Download PDF

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Publication number
CN105190883B
CN105190883B CN201480014480.5A CN201480014480A CN105190883B CN 105190883 B CN105190883 B CN 105190883B CN 201480014480 A CN201480014480 A CN 201480014480A CN 105190883 B CN105190883 B CN 105190883B
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Prior art keywords
package
encapsulation
die
substrates
package die
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Expired - Fee Related
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CN201480014480.5A
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CN105190883A (zh
Inventor
C-K·金
O·J·比奇厄
M·P·沙哈
M·B·许
D·F·蕾
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Qualcomm Inc
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Qualcomm Inc
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Abstract

为了实现具有有利地减少了高度的封装堆叠,第一封装基底(200,700)具有大小设置成容纳第二封装管芯(305,715)的窗口(215,715)。第一封装基底(200,700)通过多个封装堆叠互连(400)与第二封装基底(110)互连,使得第一和第二基底由一间隙隔开。第二封装管芯的厚度大于所述间隙,使得第二封装管芯至少部分地置于第一封装基底的窗口内。

Description

具有减少的高度的封装堆叠结构
相关申请的交叉引用
本申请要求于2013年3月15日提交的美国非临时申请号13/833,921的优先权,其全部内容通过援引纳入于此。
技术领域
本申请涉及集成电路封装,尤其涉及封装堆叠(PoP)结构,其中顶层封装基底被修改以获得减少的封装高度。
背景
已经为其中电路板空间必须被节省的应用(诸如蜂窝电话和其他便携式设备之类)开发了封装堆叠(PoP)结构。顶层封装通常是存储器封装,而底层封装通常是处理器封装。与诸如堆叠管芯电路之类的其他方法相比,封装堆叠技术已被证明是相当流行的。例如,制造商能容易地在PoP电路中替换不同的存储器封装,从而与捆绑于特定存储器相比这降低了成本。而且,顶层封装和底层封装可被独立测试。相反,在堆叠管芯设计中有坏的管芯就需要抛弃剩下的好的管芯。
尽管使用PoP结构对集成电路的封装因此是相当流行的,但是在该封装工艺中仍然存在挑战。例如,随着技术进步,用户希望PoP叠层有减少的厚度或高度。但是尽管在PoP领域中有技术进步,就减少PoP叠层高度而言仍然存在障碍。参考图1A和1B可更好地理解关于减少封装高度的问题。图1A示出了传统PoP叠层100。为了构造PoP 100,底层封装管芯105首先被倒装安装到底层封装基底110,并用模塑复合物层108包裹。然后在模塑复合物层108中形成通孔(诸如通过激光烧蚀等),以暴露底层封装结构110上的下层焊球。顶层封装基底120上对应的上层焊球然后被收入通孔,因此回流焊接工艺通过回流焊接的上层焊球和下层焊球而形成焊点互连115,以将顶层封装基底120电耦合于底层封装基底110。
由于用于形成PoP 100的穿模通孔(through-mold-via)工艺,在上层封装基底120的下表面与模塑复合物层108的上表面之间存在间隙140。间隙140从而增加了PoP 100的PoP叠层高度。为了实现不会遭受间隙140影响的减少的叠层高度,已经开发了一种替代的PoP架构,它可被表示为模塑嵌入式(ME)PoP 130,如图1B中所示。在ME-PoP 130中,在顶层封装基底120和下层封装基底已通过互连115被接合之后,施加模塑复合物108。以此方式,ME-PoP 130在顶层封装基底120的下表面和模塑复合物108的上表面之间不具有间隙140。从而与PoP 100相比,Me-PoP 130具有减少的高度。但是不管选择哪一个架构,可看到顶层封装基底120的下表面总是在底层管芯105的上表面之上,因为顶层封装基底120覆盖底层管芯105。换言之,顶层封装基底120相对于底层管芯105来层叠。顶层封装基底120的厚度因此是整体PoP叠层的厚度中的直接因素。
如果常规PoP中顶层封装基底的厚度可变薄某个微米数,则PoP的高度可被减少相同的微米数。类似地,底层封装基底的厚度中的减少也减少了PoP叠层高度。用于顶层和底层封装的基底于是被日渐变薄以获得减少的PoP叠层高度。但是当前最先进的有机基底可被薄化至不少于大约80至90微米。如果使得基底比该最小厚度更薄一点,则会发生不可接受的翘曲。因此顶层和底层封装基底的最小封装基底厚度表现出阻碍了PoP叠层高度减少方面的进一步进步。
因此,本领域需要具有减少的高度的改进的PoP电路,同时仍然具有对抗基底翘曲的强有力保护。
概述
为了实现减少的PoP叠层高度,提供了一种PoP,其中封装之一的封装基底包括大小被设置成容纳来自剩余封装的管芯的窗口。尽管该基底窗口被提供在通常被表示为顶层或上层封装基底的基底中,该顶层封装在这里也被成为第一封装。通常将被表示为底层封装的剩余封装在这里被称为第二封装。就这一点而言,如果PoP上下倒置,本领域认可的术语“顶层封装”和“底层封装”并不切换定义。但是为了避免任何歧义,顶层封装在这里被称为第一封装,而底层封装在这里被称为第二封装。第一封装包括至少一个第一封装管芯以及包含窗口的第一封装基底。第二封装包括第二封装管芯和第二封装管芯。多个封装堆叠互连将第一封装基底与第二封装基底互连,使得第一和第二封装基底被一间隙隔开。第二封装管芯的厚度或高度大于所述间隙,使得第二封装管芯至少部分地置于第一封装基底的窗口内。
附图简述
图1A是常规封装堆叠(PoP)叠层的截面图。
图1B是常规模塑嵌入式PoP叠层的截面图。
图2是减少的高度的PoP的一实施例的第一封装基底和第二封装基底的截面图。
图3是具有表面安装的第二封装管芯以形成第二封装的图2的第二封装基底的截面图。
图4是耦合于第一封装基底以形成部分PoP组装件的图3的第二封装的截面图。
图5是在施加了模塑复合物之后图3的部分PoP组装件的截面图。
图6是包括图5的部分PoP组装件的减少了高度的PoP的截面图。
图7是部分PoP组装件的替代实施例的截面图。
图8是包括图7的部分PoP组装件的减少了高度的PoP的截面图。
图9例示出根据本文公开的实施例的结合了减少了高度的PoP的多个电子系统。
详细描述
为了解决本领域中对具有减少的叠层高度而同时仍然能抵抗翘曲的改进的PoP架构的需要,揭示了一种包括具有大小被设置成容纳第二封装管芯的窗口的第一封装基底的PoP叠层。如本文所使用的,第一封装基底窗口被称为“容纳”第二封装管芯,这是由于在第一封装基底已被耦合于第二封装基底之后,第二封装管芯被至少部分地设置在第一封装基底的窗口内。
综览
第一封装基底包括焊盘,其通过封装堆叠互连耦合于第二封装基底上的对应焊盘。在给定了至第一封装基底的这种封装堆叠互连的情况下,“第一封装管芯”在这里被定义为这样一种管芯,其输入/输出(I/O)信号通过第一封装基底焊盘被传导。换言之,如此处所使用的“第一封装管芯”的定义排除了与第二封装管芯呈穿硅堆叠(TSS)布置的管芯、或与第二封装基底引线接合的管芯。例如,用于与第二封装管芯呈TSS堆叠的管芯的I/O信号将在顶层管芯本身上的焊盘而不是第一封装基底焊盘中被传导。类似地,用于与第二封装基底进行引线接合的管芯的I/O信号将不会通过第一封装基底焊盘而是通过与第二封装基底的引线接合来被传导。但是将理解,“第一封装管芯”的此定义将不排除通过使用穿硅通孔(TSV)而在TSS堆叠中被堆叠在一起的多个第一封装管芯,只要用于这些管芯的I/O通过第一封装基底上的焊盘被传导。
由于耦合在第一封装基底和第二封装基底之间的封装堆叠互连,第一和第二封装基底不彼此接触而是改为被一间隙间隔开,如在PoP领域中常规的那样。在现有技术中,第二封装管芯不可能具有会超过该间隙的高度(也可被表示为厚度),因为第一封装基底堆叠在第二封装管芯之上。例如,再次参考图1A和1B,如果管芯105在高度上增加,则基底110和120之间的间隙将相应增加。由于基底120被堆叠在管芯105之上,因此管芯105的厚度和基底120的厚度是最终PoP叠层高度中的直接因素。相反,由于本文所揭示的第一封装基底具有容纳第二封装管芯的窗口,因此第一封装基底厚度和第二封装基底厚度不再直接组合来影响最终PoP叠层高度。这是相当有利的,因为第二封装管芯不再需要被过度薄化来减少PoP叠层高度。这种管芯薄化导致可靠性问题以及增加制造成本。但是本文所揭示的第二封装管芯被容纳在第一封装基底中的窗口中。第二封装管芯于是能具有比将第一和第二封装基底隔开的间隙更大的厚度。由于第二封装管芯的该高度,该第二封装管芯就有一部分延伸穿过该间隙。所述窗口充当用于容纳第二封装管芯的该部分的手段。第二封装管芯的被容纳的该部分于是对PoP叠层高度不再起作用。而且,如果第二封装管芯高度与将第二封装管芯耦合于第二封装基底的互连的厚度的组合小于或等于第一和第二封装基底之间的间隙与第一封装基底厚度的组合,则第二封装管芯高度将对最终的PoP叠层高度没有影响。以此方式,第二封装管芯可具有强健的厚度以实现可靠性以及降低成本,而PoP仍然能具有有利地减少了的叠层厚度。
此外,由于第一和第二封装基底之间的间隙不再需要容适于第二封装基底的高度,因此用于将封装基底彼此耦合的封装堆叠互连的制造就被简化。在现有技术中,封装堆叠互连需要形成将跨第二封装管芯的高度的接头。在封装堆叠互连的节距减少的情况下实现这一跨度将使常规的PoP制造复杂化。但是本文所揭示的封装堆叠互连不需要跨第二封装管芯的高度,这降低了成本,因为互连节距减小了。
在一个实施例中,与第一封装基底厚度相比,第二封装管芯具有一高度,使得第二封装管芯仅部分地延伸到第一封装基底中的窗口中。在这样的实施例中,可用模塑复合物来包裹第二封装管芯,使得包裹模塑复合物被暴露在窗口中。在一替代实施例中,第二封装管芯完全置于窗口内。在该实施例中,全置式第二封装管芯可具有在窗口内暴露的表面,使得其表露的表面不被模塑复合物包裹。参考图2-8可更好地理解本文所揭示的改进的PoP叠层的这些替代实施例。图2-5例示出图6中所示的PoP 620的制造中的各种步骤。PoP 620是被包裹的第二封装管芯实施例的示例。相反,图8的PoP 800是暴露的第二封装管芯实施例的示例。图7例示出PoP 800的制造中的一步骤。PoP 620将被首先讨论,继之以对PoP 800的讨论。
被包裹的第二封装管芯实施例
图6的PoP 620是被包裹的第二封装管芯实施例的示例。在图6中,虚线640被提供来表示第一封装645与第二封装650之间的分界。与图1A和1B的现有技术PoP 100和130相反,这一分界不是平面的。封装之间的这种非平面分界是由第二封装管芯305被部分地容纳于第一封装基底200的窗口215内而造成的。在该实施例中,第二封装管芯305通过倒装芯片凸块被表面安装到第二封装基底110上,如在PoP领域中常规的那样。但是将理解到,诸如引线接合之类替代表面安装技术可被用于第二封装管芯105。
在第一封装645中,第一封装管芯600通过引线接合互连而互连到第一封装基底200的表面515上的焊盘615。焊盘615继而通过第一封装基底200中的通孔(未示出)耦合到第一封装基底200的面向第二封装的对向表面525上的焊盘405。焊盘405通过封装堆叠互连400与第二封装基底110上的焊盘205互连。从而可看到,第一封装管芯600满足早先为“第一封装管芯”给出的定义,因为用于第一封装管芯600的I/O信号传递将通过焊盘615(以及焊盘405和封装堆叠互连400)被传导。
第二封装管芯305的高度小于第一封装基底200的厚度。在这样的实施例中,第二封装管芯305仅部分地延伸穿过窗口215。更为一般地,每当第二封装管芯305的高度与凸块300的厚度组合小于第一封装基底200和互连400组合的厚度,就发生这样的部分延伸。由于其部分延伸到窗口215中,因此第二封装管芯305被模塑复合物500包裹,使得模塑复合物500(而不是第二封装管芯305)的一表面510在窗口215内被暴露。第一封装管芯600通过例如接合焊盘605附连于暴露的模塑表面510。
暴露的第二封装管芯实施例
图8的PoP 800是暴露的第二封装管芯实施例的示例。PoP 800包括第一封装810和第二封装815,它们的分界由虚线805表示。类似于第一封装645,第一封装810包括被引线接合到第一封装基底700的第一封装管芯600。第二封装815也类似于上述的第二封装650,在于第二封装815包括表面安装在第二封装基底110上的第二封装管芯715。然而,PoP 800中的第二封装管芯715相对厚于PoP 620中所使用的第二封装管芯305。实际上,第二封装管芯715的厚度使得第二封装管芯715的面向第一封装的表面520与第一封装基底700的面向第一封装管芯的表面705齐平或对齐。PoP 800中的模塑复合物500从而不包裹第二封装管芯715。相反,管芯715的表面520在窗口215中被暴露。用于第一封装管芯600接合焊盘605直接附连于第二封装管芯715的该暴露的表面520。
示例制造方法
将首先讨论用于制造PoP 620的方法,接着是对制造PoP 800的方法的讨论。图2至5例示出构造PoP 620时的各种步骤。第一封装基底200和第二封装基底110以隔离的方式被示于图2中,以便更好地例示出它们的特征。第二封装基底110包括多个焊盘205,如PoP领域中已知那样。就这一样而言,第二封装基底110无需与常规PoP底层封装基底不同。与常规PoP基底不同的是,第一封装基底200包括大小被设置以便容纳第二封装管芯的窗口215,如此处进一步讨论的那样。
给定这些PoP基底,最终PoP叠层的制造可如图3中的初始工艺步骤所示那样进行。在该步骤中,第二封装管芯305的作用面被互连到第二封装基底110,例如通过倒装芯片凸块300到第二封装基底110上的焊盘205,以形成第一封装。但如早先所述,此处所揭示的PoP架构包括其中替代表面安装技术(诸如引线接合之类)被用于第二封装管芯305的实施例。在引线接合实施例中,第二封装管芯305的非作用面而不是作用面将面对第二封装基底110。然而,窗口215于是将需要被大小设置成不仅容纳第二封装管芯305还要容适其引线接合。因此,下面的讨论将针对诸如图3中所示的第二封装倒装芯片实施例。下面的讨论还将假设第一封装基底200和第二封装基底是有机基底,但是将理解到替代基底(诸如陶瓷基底之类)可被使用。
后续工艺步骤被示于图4中。在该工艺步骤中,第一封装基底200通过封装堆叠互连400与第二封装基底110互连。这样的互连可在施加任何模塑封装之前发生,与在常规Me-PoP的制造期间类似执行的类似。封装堆叠互连400可包括各种各样的互连结构,如焊球、凸块、微凸块、或柱,并被形成在第二封装基底110上的焊盘205与第二封装基底200上的对应焊盘405之间。然而,不同于常规ME-PoP工艺,第二封装管芯605被至少部分地置于第一封装200中的窗口215内。在增加PoP叠层高度的意义上,第二封装管芯305的厚度或高度从而不再与第一封装基底200的厚度直接相加。相反,先前所讨论的PoP 100和ME-PoP 130中管芯105的高度是最终封装高度中的直接因素。
参考图5可更好地理解窗口215在减小最终PoP叠层高度方面的效果。在图5中,在关于图4所讨论的基板到基板互连步骤之后,模塑复合物500已被施加来包裹第二封装管芯305和封装堆叠互连400,以完成部分PoP封装组装件。这一模塑复合物施加与ME-PoP制造工艺中执行的类似。模塑复合物500被施加来包裹第二封装管芯305,以便使模塑复合物500具有暴露于窗口215内且与第一封装基底200的面向第一封装管芯的表面515对齐的表面510。由于第二封装管芯305被部分置于窗口215内,所以相对于其表面520来定义的第二封装管芯305高度大于将第一封装基底200的面向第二封装的表面525与第二封装基底110的对向表面分隔开的封装堆叠间隙。这是相当有利的,因为第一封装基底200的不延伸越过第二封装管芯305的表面520的一部分505并不增加最终的PoP叠层高度。相反,第一封装基底200的位于第二封装管芯表面520与第一封装基底表面515之间一部分509增加最终的PoP叠层高度。与此相对,对于常规PoP 100和ME-PoP 130而言,关于图1A和1B所讨论的顶层基底120的整个厚度直接贡献于PoP叠层高度。而且,第一封装基底200无需被过度薄化,因此对于对抗翘曲来说是强健的。例如,第二封装管芯305的厚度大于第一封装基底200和第二封装基底110之间的封装堆叠间隙。在常规PoP 100和ME-PoP 130中,底层封装管芯105必须厚度小于该间隙。但是窗口215使得第一封装基底200和第二封装基底110之间的封装堆叠间隙能够小于第二封装管芯305的厚度。这在减少整体PoP叠层高度而同时在第二封装基底200中保持对抗翘曲的强健的抵抗性方面是相当有利的。
为了完成该构造,第一封装管芯600通过接合焊盘605被附连于窗口215中模塑复合物500的暴露表面510,如图6中所示。第一封装管芯600然后可通过引线接合互连与第一封装基底200上的焊盘615互连并被包裹在附加的模塑复合物610中,以形成减小了高度的PoP 620。从而将理解到,第一封装管芯600被配置成从一组输入焊盘615接收其输入信号,以及还被配置成将其输出信号驱动到一组输出焊盘615中。而且,第一封装管芯600将从与焊盘615中相应的焊盘的耦合来接收其接地耦合和电源耦合。如PoP领域中所已知的,第二封装基底110可然后通过底部球栅阵列(BGA)球630被安装在电路板(未示出)上。
窗口215不仅消除了来自第一封装基底200的管芯交叠部分505的任何高度贡献,而且还有助于减小如上所讨论的节距。就这一点而言,在常规PoP 100中随着节距被减小,变得难以使得互连115跨越模塑复合物层108。就MEP-PoP 130而言存在类似问题,因为互连115必须具有足以跨越底层封装管芯105的高度的高度,但又必须由于减少的节距而彼此非常接近。互连115需要足够的高度与互连115需要相对较窄来容适细节距是对立的。但是封装堆叠互连400(图4)能够既窄又短,因为它们不需要跨第二封装管芯305的高度。以此方式,减小了高度的PoP 620还有助于为封装堆叠互连400实现更细的节距。
图2-6的第一封装基底200比第二封装管芯3105厚。从而,如关于图5所讨论的,存在顶层封装基底200的非交叠部分509。正如关于图1A和1B所讨论的常规顶层基底120的整个厚度那样,该非交叠部分509对减小了高度的PoP 620的最终PoP叠层高度作出贡献。非交叠部分509存在是因为第二封装管芯305仅部分地延伸到窗口215中使得它被模塑复合物500包裹。
在暴露的第二封装实施例中,诸如关于图8的PoP 800所讨论的,第二封装管芯715在窗口215内被暴露。于是将与图5的非交叠部分509类似。组装工艺PoP 800极大地类似于对PoP 620所用的工艺。参考图7更好地理解这些差异,图7示出在图8的附连PoP 800的顶层封装管芯之前的部分组装件。第一封装基底700不比第二封装管芯715厚。第二封装管芯715的表面520从而与顶层封装基底700的面向第一封装管芯的表面705齐平。模塑复合物500被施加以便使得表面520保持暴露以及填充第一封装基底700与第二封装基底110之间的剩余空腔。由于第二封装管芯715的表面520与第一封装基底700的表面705对齐,因此第一封装基底700的厚度不会对最终的PoP叠层高度作出贡献。实际上,在附加替代实施例中,第一封装基底700的厚度可实际上比第二封装管芯715薄。但是如果第一封装基底700不比第二封装管芯715薄,诸如图7中所示,则可更容易地实现将模塑复合物500注入到基底之间的空腔中。
为了完成PoP 800的组装,第一封装管芯600通过接合焊盘605被附连到第二封装管芯715的表面520,以及以关于图6所讨论的类似方式通过引线接合互连被互连到第一封装基底700。所产生的PoP 800的叠层高度从而完全与第一封装基底700的厚度解耦。
示例电子系统
本文所揭示的减小了高度的PoP架构可被结合于各种各样的电子系统中。例如,如图9中所示,蜂窝电话900、膝上型设备905以及平板PC 910都可以包括根据本公开构造的PoP。其他示例性电子系统(诸如音乐播放器、视频播放器、通信设备和个人计算机)也可以用根据本公开的PoP来配置。
如本领域普通技术人员至此将会领会并取决于手头的具体应用的,可以在本公开的设备的材料、装置、配置和使用方法上做出许多修改、替换和变动而不会脱离本公开的范围。有鉴于此,本公开的范围不应当被限定于本文中所解说和描述的特定实施例(因为其仅是藉其一些示例来解说和描述的),而应当与所附权利要求及其功能等同方案完全相当。

Claims (9)

1.一种封装堆叠结构,包括:
具有窗口的第一封装基底;
通过多个封装堆叠互连与所述第一封装互连的第二封装基底,所述第一封装基底具有面向所述第二封装基底的第一表面以及面向所述第一封装管芯的对向表面;
通过多个第一互连与所述第二封装基底互连的第二封装管芯,其中所述第二封装管芯被部分地置于所述窗口内;以及
配置成不包裹所述第二封装管芯并包裹所述封装堆叠互连的模塑复合物,其中所述第二封装管芯的面向第一封装的表面被暴露,第二封装管芯的经暴露的面向第一封装的表面与第一封装基底的面向第一封装管芯的表面对齐,并且第一封装管芯的接合焊盘直接附连到第二封装管芯的经暴露的面向第一封装的表面。
2.如权利要求1所述的封装堆叠结构,其中所述多个第一互连是倒装芯片互连。
3.如权利要求1所述的封装堆叠结构,进一步包括附连于所述第二封装管芯的暴露表面的第一封装管芯。
4.如权利要求3所述的封装堆叠结构,其中所述第一封装管芯通过多个引线接合互连与所述第一封装基底互连。
5.如权利要求3所述的封装堆叠结构,其中所述封装堆叠结构被结合在以下至少之一中:蜂窝电话、膝上型设备、平板设备、音乐播放器、通信设备、计算机和视频播放器。
6.如权利要求3所述的封装堆叠结构,其中所述第一封装管芯包括多个第一封装管芯。
7.一种用于制造封装堆叠结构的方法,包括:
通过多个第一互连将第二封装管芯与第二封装基底互连;
通过多个封装堆叠互连将具有面向第一封装管芯的表面和对象的第二表面的第一封装基底与所述第二封装基底互连,使得所述第二封装管芯部分地被置于所述第一基底中的窗口内,其中将所述第一封装基底与所述第二封装基底互连将所述第一封装基底的所述第二表面取向成面对所述第二封装基底;以及
施加模塑复合物以不包裹所述第二封装管芯并且包括所述封装堆叠互连,其中所述第二封装管芯的面向第一封装的表面被暴露,第二封装管芯的经暴露的面向第一封装的表面与第一封装基底的面向第一封装管芯的表面对齐,并且第一封装管芯的接合焊盘直接附连到第二封装管芯的经暴露的面向第一封装的表面。
8.如权利要求7所述的方法,进一步包括将第一封装管芯附连于所述第二封装管芯的暴露表面。
9.如权利要求8所述的方法,进一步包括将所附连的第一封装管芯引线接合于所述第一封装基底的所述第二表面。
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