CN105122443B - 高频元件及具备其的高频模块 - Google Patents

高频元件及具备其的高频模块 Download PDF

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Publication number
CN105122443B
CN105122443B CN201480021406.6A CN201480021406A CN105122443B CN 105122443 B CN105122443 B CN 105122443B CN 201480021406 A CN201480021406 A CN 201480021406A CN 105122443 B CN105122443 B CN 105122443B
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substrate
electrode
support frame
frequency component
attachment
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CN105122443A (zh
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高井清文
带屋秀典
人见伸也
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Abstract

本发明提供一种技术，其能以在没有寄生电感或寄生电容影响的状态下获得期望的频率特性的方式搭载滤波器电路元件，并且可以提高元件集成度。连接到贴装用电极(108a)的滤波器电路元件(109)的接地用端子(109a)通过过孔导体(105a、106a)，以最短距离连接到接地用电极(103)，因此，可以抑制不需要的寄生电感或寄生电容的产生。从而能够以在没有寄生电感或寄生电容影响的状态下获得期望的频率特性的方式，将滤波器电路元件(109)搭载于高频元件(100)上。此外，由于可将元件(3)配置于支撑框体(101)的内周面所包围的内侧空间中，从而可以提高元件集成度。

Description

高频元件及具备其的高频模块
技术领域
本发明涉及一种具备滤波器电路元件的高频元件及具备其的高频模块。
背景技术
一直以来，提供的都是图5所示的高频元件500，其在陶瓷多层基板501上搭载有开关IC 502和声表面波(SAW)滤波器及由SAW滤波器形成的双工器等滤波器电路元件503。此外，根据需要，多层基板501上还会贴装片式电容器、片式电感等匹配用贴装元件504。另外，多层基板501上还设置有布线电极，该布线电极包含：包括接地用电极的多个面内电极505，以及对各面内电极505进行层间连接的多个过孔导体506；多层基板501上所搭载的各元件502～504与外部连接用贴装用电极507通过布线电极电气连接。
然而，将滤波器电路元件503搭载于多层基板501上时，由于连接到滤波器电路元件503的多层布线基板501上的布线电极的寄生电感或寄生电容，滤波器电路元件503的频率特性有可能会由设计时的期望特性发生变动。因此，图5所示的高频元件500上所搭载的滤波器电路元件503在设计时，就预先假定了其频率特性在搭载到多层基板501上时会发生变动的情况。也就是说，在其单体频率特性偏离期望特性的状态下设计滤波器电路元件503，以便在其搭载到多层基板501上时，由于所连接的布线电极的寄生电感或寄生电容，其频率特性变动为期望特性。
现有技术文献
专利文献
专利文献1：日本专利特开2007-129459号公报(段落0012～0022、图1、说明书摘要等)
发明内容
发明所要解决的技术问题
但是，上述高频元件500需要形成为在滤波器电路元件503搭载于多层基板501上时可以获得期望的频率特性，多层基板501的布线电极也具有期望的寄生电感或寄生电容。因此，高频元件500的设计受到限制，就存在难以提高高频元件500的部件集成度等问题。
本发明是鉴于上述问题开发而成，目的在于提供一种技术，其能以在没有寄生电感或寄生电容影响的状态下获得期望的频率特性的方式搭载滤波器电路元件，并且可以提高元件集成度。
解决技术问题所采用的技术方案
为了实现上述目的，本发明的高频元件特征在于，具备：支撑框体，其具有框架形状；基板，其形状和所述支撑框体的外形形状基本相同，层叠于所述支撑框体的一面上；接地用电极，其形成于所述支撑框体的另一面上；贴装用电极，其形成于所述基板的一主面上，俯视时其至少一部分和所述接地用电极重合；层间连接导体，其在所述接地用电极及所述贴装用电极重合的位置处沿层叠方向贯穿所述支撑框体及所述基板而设，用于对所述接地用电极和所述贴装用电极进行连接；以及滤波器电路元件，其贴装于所述基板的一主面上；所述滤波器电路元件的接地端子连接到所述贴装用电极。
在如上所述构成的发明中，基板层叠于具有框架形状的支撑框体的一面上，接地用电极形成于支撑框体的另一面上，贴装用电极形成于基板的一主面上，俯视时其至少一部分和接地用电极重合，在接地用电极及贴装用电极重合的位置处沿层叠方向贯穿支撑框体及基板，设置有层间连接导体。此外，通过层间连接导体，贴装用电极以最短距离连接到接地用电极，而滤波器电路元件以其接地端子连接到该贴装用电极的状态，贴装于基板的一主面上。因此，接地用电极配置于滤波器电路元件的正下方，连接到贴装用电极的滤波器电路元件的接地用端子通过层间连接导体，以最短距离连接到接地用电极。
因此，可以抑制连接到滤波器电路元件的接地用端子的贴装用电极、层间连接导体以及接地用电极产生多余的寄生电感、寄生电容，从而能以在没有寄生电感或寄生电容影响的状态下获得期望的频率特性的方式将滤波器电路元件搭载于高频元件上。此外，由于可将元件配置于支撑框体的内周面所包围的内侧空间中，从而可以提高元件集成度。
另外，元件也可以配置于所述支撑框体的内周面所包围的空间中。
如此，由于元件配置于支撑框体的内周面所包围的空间中，从而可以提供元件集成度得到提高的高频元件。
此外，所述元件可以是功率放大器、RF-IC(射频集成电路)、开关IC中的任一个。
如此，将易受接地状态影响的滤波器电路元件在良好地接地状态下贴装于基板的一主面上，将难以受到接地状态影响的功率放大器、RF-IC及开关IC等元件配置于支撑框体的内周面所包围的空间中，从而可以在由接地状态引起的高频元件特性劣化得到抑制的状态下提高元件集成度。
另外，所述元件可以接触配置于所述基板的另一主面上。
若如此构成，当元件为发热元件时，由于元件接触配置于基板的另一主面上，因此可以通过基板，提高元件的散热性。
另外，所述支撑框体及所述基板可以由同一构件形成。
如此，由于支撑框体及基板由同一构件形成，因此在回流焊等加热循环中，可以抑制支撑框体及基板的连接部分产生由热膨胀系数差所引起的应力等。因此，可以防止支撑框体和基板的连接部分因热应力等而分离，从而可以提高高频元件内的连接可靠性。此外，也可以用同一构件一体形成支撑框体及基板。这种情况下，通过一体形成支撑框体及基板，可以进一步提高高频元件内的连接可靠性。
另外，本发明的高频模块是具备权利要求1至5中任一项所述的高频元件的高频模块，其特征在于，具备贴装所述高频元件的模块基板。
在如此构成的发明中，通过贴装高频元件以覆盖贴装于模块基板上的各种元件，从而可以提高具备高频元件的高频模块的元件集成度。此外，利用高频元件所具备的支撑框体和基板覆盖元件，从而可以抑制该元件产生的噪声。另外，利用高频元件所具备的支撑框体和基板覆盖该元件，从而可以屏蔽外部产生的噪声，抑制对该元件的影响。
发明效果
根据本发明，由于接地用电极配置于滤波器电路元件的正下方，连接到贴装用电极的滤波器电路元件的接地用端子通过层间连接导体，以最短距离连接到接地用电极，因此，可以抑制连接到滤波器电路元件的接地用端子的贴装用电极、层间连接导体以及接地用电极产生多余的寄生电感或寄生电容。从而能以在没有寄生电感或寄生电容影响的状态下获得期望的频率特性的方式将滤波器电路元件搭载于高频元件上。此外，由于可将元件配置于支撑框体的内周面所包围的内侧空间中，从而可以提高元件集成度。
附图说明
图1是表示本发明第1实施方式所涉及的高频模块的剖面图。
图2是表示高频元件的图，(a)为平面图，(b)为背面图。
图3是表示本发明第2实施方式所涉及的高频模块上所搭载的高频元件的图。
图4是表示本发明第3实施方式所涉及的高频模块上所搭载的高频元件的图。
图5是表示现有的高频元件的图。
具体实施方式
＜第1实施方式＞
参照图1及图2，说明本发明的第1实施方式。图1是表示本发明第1实施方式所涉及的高频模块的剖面图，图2是表示高频元件的图，(a)为平面图，(b)为背面图。
如图1所示，高频模块1具备模块基板2、贴装于模块基板2上的功率放大器、RFIC、开关IC等元件3以及高频元件100，搭载于手机、移动信息终端等通信移动终端所具备的贴装基板上，形成为前端模块、Bluetooth(注册商标)模块及无线LAN模块等各种通信模块、天线开关模块等。
模块基板2的内部设置有包括面内电极及层间连接用过孔导体等的布线电极(省略图示)，布线电极连接到模块基板2的贴装面2a上所形成的接地用焊盘电极4及信号用焊盘电极5。此外，模块基板2由玻璃环氧树脂或液晶聚合物等树脂材料、陶瓷材料等常规的基板形成用材料形成。另外，布线电极由包括Ag、Cu、Au等导电材料形成，通过布线电极，可以在模块基板2内形成各种电路。
元件3通过焊料或导电胶粘剂等粘结剂、超声波振动接合、使用表面活化技术的接合(以下简称为“焊料等”)，贴装到模块基板2的贴装面2a的规定位置处所形成的各焊盘电极4、5，配置于高频元件100的下方所设置的腔室C内。另外，本实施方式中，根据高频模块1的使用目的，将功率放大器、RF-IC、开关IC中的任一个作为元件3配置于高频元件100的腔室C内，也可以将其他元件适当地配置于腔室C内。
高频元件100具备：支撑框体101，其具有框架形状；基板102，其形状和支撑框体101的矩形外形形状基本相同，形成于支撑框体101的一面101a上；高频元件100通过焊料等，贴装于模块基板2的规定位置处所形成的各焊盘电极4、5。支撑框体101由环氧树脂等常规的基板形成用热固化树脂形成，其框架形状的外周和基板102的外形一致地配置，其一面101a接合于基板102的另一主面102b。
另外，支撑框体101的另一面101b上形成有接地用电极103及信号用电极104，接地用电极103及信号用电极104分别通过焊料等，连接到模块基板2的贴装面2a的规定位置处所形成的各焊盘电极4、5。此外，在支撑框体101内，沿框架形状的圆周方向设置有多个由Cu、Al、Au、Ag等棒状金属构件构成的柱状过孔导体105a、105b。各过孔导体105a、105b各自的一端露出于基板101的一面101a，另一端连接到支撑框体101的另一面101b上所形成的接地用电极103或信号用电极104。
在本实施方式中，层叠多个陶瓷生片并烧结，由所获得的多层陶瓷基板形成基板102。陶瓷生片是将氧化铝及玻璃等的混合粉末和有机粘结剂及溶剂等一同混合，将所获得的浆料制成薄片而成，通过激光加工等方法，在陶瓷生片的规定位置形成过孔，在所形成的过孔中填充包含Ag或Cu等的导体浆料，形成层间连接用过孔导体106a、106b，并利用导体浆料进行印刷，形成各种面内电极107。之后，对各陶瓷生片进行层叠、压接，形成陶瓷层叠体，以约1000℃左右的较低温度进行所谓的低温烧结，形成基板102。
此外，在基板102的一主面102a上，形成有贴装用电极108a、108b，用于贴装各种元件。贴装用电极108a形成于基板102的一主面102a上，俯视时其至少一部分和形成于支撑框体101的另一面101b上的接地用电极103重合。此外，在接地用电极103及贴装用电极108a重合的位置处设置有过孔导体105a、106a，过孔导体106a的一端连接到贴装用电极108a，过孔导体106a的另一端连接到过孔导体105a的一端，借此，接地用电极103和贴装用电极108a相连接。如此，通过过孔导体105a、106a，构成沿层叠方向贯穿支撑框体101及基板102的、本发明的“层间连接导体”。
此外，设置于支撑框体101上的过孔导体105b的一端连接到基板102的过孔导体106b的另一端，过孔导体106b的一端连接到面内电极107，借此，支撑框体101的另一面101b的信号用电极104和基板102的一主面102a的贴装用电极108b通过面内电极107相连接。
另外，滤波器电路元件109在其接地端子109a和连接到接地用电极103的贴装用电极108a相连接的状态下，通过焊料等，贴装到基板102的一主面102a周缘部的贴装用电极108a、108b上。滤波器电路元件109可以是SAW滤波器或多个SAW滤波器组合形成的双工器，或者是构成LC滤波器的陶瓷器件等各种元件。此外，在基板102的一主面102a上可以利用绝缘树脂进行树脂密封。
另外，在其他贴装用电极108a、108b上，根据高频模块1(高频元件100)的使用目的，贴装有包括其他滤波器电路元件或各种IC的元件110、电阻或电感、电容器等各种芯片式元件111。此外，在基板102的靠近中央的区域，可以贴装不容易受到寄生元素影响的元件110、111，该寄生元素是指由于接地状态而产生的寄生电感、寄生电容等。并且，如上所述，在模块基板2的贴装面2a上贴装、配置元件3后，将高频元件100贴装于模块基板2的贴装面2a上，借此，将贴装于模块基板2的贴装面2a上的元件3配置于支撑框体101的内周面所包围的腔室C内的空间中。
另外，基板102可以由使用树脂或聚合物材料等的印刷基板、氧化铝等的陶瓷基板、玻璃基板、复合材料基板、单层基板、多层基板等形成，根据高频元件100的使用目的，适当地选择最佳材质形成基板102即可。
以下，对高频元件100的制造方法的一例进行说明。
首先，准备具有上述构成的基板102，通过焊料等，将形成过孔导体105a、105b的Cu等棒状金属导体的一端面连接、贴装到露出于基板102的另一主面102b的过孔导体106a、106b的另一端面上。接下来，将框架配置于基板102的另一主面102b上，以便将树脂仅填充到基板102的另一主面102b的周缘部。
接着，将环氧树脂等热固性树脂填充到框架内，以覆盖棒状金属导体。并且，针对在基板102的另一主面102b的周缘部形成为框架形状的树脂表面进行磨削等处理，从而在露出于树脂表面的棒状金属导体的另一端面上形成接地用电极103及信号用电极104，将具有框架形状的支撑框体101形成于基板102的另一主面102b上。
接下来，在基板102的一主面102a的各贴装用电极108a、108b上贴装各元件109～111，完成高频元件100。
另外，可以在形成于基板102的另一主面102b的周缘部的、具有框架形状的树脂层中，向形成为连接到各过孔导体106a、106b的贯穿孔中填充导体浆料，从而形成支撑框体101的过孔导体105a、105b。此外，也可以在露出于基板102的另一主面102b的过孔导体106a、106b的另一端面上，通过镀层生长，形成棒状过孔导体105a、105b，然后将框架配置于基板102的另一主面102b上，以便将树脂仅填充到基板102的另一主面102b的周缘部，将环氧树脂等热固性树脂填充到框架内，以覆盖棒状金属导体。还可以设置树脂层，以覆盖基板102的一主面102a以及各元件109～111。
如上所述，在该实施方式中，在具有框架形状的支撑框体101的一面101a上层叠有基板102。在支撑框体101的另一面101b上形成有接地用电极103。此外，贴装用电极108a形成于基板102的一主面102a上，俯视时其至少一部分和接地用电极103重合。在接地用电极103及贴装用电极108a重合的位置处设置有层间连接导体，其沿层叠方向贯穿支撑框体101及基板102，由过孔导体105a、106a构成。
另外，通过过孔导体105a、106a，贴装用电极108a以最短距离连接到接地用电极103，而滤波器电路元件109以其接地端子109a连接到该贴装用电极108a的状态，贴装于基板102的一主面102a上。也就是说，不使用多余布线图案地形成滤波器电路元件109的接地端子109a和接地用电极103的连接路径，滤波器电路元件109的接地端子109a和接地用电极103通过贴装用电极108a和过孔电极105a、106a直接连接。因此，接地用电极103配置于滤波器电路元件109的正下方，连接到贴装用电极108a的滤波器电路元件109的接地用端子109a通过过孔导体105a、106a，以最短距离连接到接地用电极103。
因此，可以将连接到滤波器电路元件109的接地用端子109a的贴装用电极108a、过孔导体105a、106a以及接地用电极103产生的多余的寄生电感、寄生电容抑制为最小限度，可以减小对滤波器电路元件109的影响，从而能以在没有寄生电感或寄生电容影响的状态下获得期望的频率特性的方式将滤波器电路元件109搭载于高频元件100上。其结果为，会对滤波器电路元件109产生影响的寄生元素得到抑制，从而可以提高高频模块1的特性。此外，由于可将元件3配置于支撑框体101的内周面所包围的腔室C内的空间中，从而可以提高高频模块1的元件集成度。也就是说，由于将元件配置于支撑框体101的内周面所包围的腔室C内的空间中，从而可以提供元件集成度得到提高的高频模块1。
此外，将易受到接地状态下所产生的寄生电感及寄生电容等寄生元素影响的滤波器电路元件109在良好地接地状态下贴装于基板102的一主面102a上，将难以受到接地状态下所产生的寄生电感及寄生电容等寄生元素影响的功率放大器、RF-IC及开关IC等元件3配置于支撑框体101的内周面所包围的空间中，从而可以在由接地状态引起的高频元件100特性劣化得到抑制的状态下提高高频模块1的元件集成度。
另外，以覆盖模块基板2上所贴装的元件3的方式贴装高频元件100，借此可以利用高频元件100屏蔽元件3所产生的噪声，抑制漏到外部的噪声。
此外，如图2(b)所示，在具有框架形状的支撑框体的另一面101b的全周，形成有接地用电极103及信号用电极104。因此，高频元件100在俯视时其周缘部分全周的位置连接到模块基板2的接地用焊盘4及信号用焊盘5，从而可以提高高频元件100相对于模块基板2的贴装强度。
另外，支撑框体101也可以由陶瓷基板或树脂基板以和基板102分开的方式形成。这种情况下，重叠支撑框体101及基板102以使基板102的另一主面102b接合到支撑框体101的一面101a即可。
此外，如果支撑框体101及基板102由同一构件形成，可以获得以下效果。即，由于支撑框体101及基板102由同一构件形成，因此在回流焊等加热循环中，可以抑制支撑框体101及基板102的连接部分产生由热膨胀系数差所引起的应力等。因此，可以防止支撑框体101和基板102的连接部分因热应力等而分离，从而可以提高高频元件100内的连接可靠性。
＜第2实施方式＞
参照图3，说明本发明的第2实施方式。图3是表示本发明第2实施方式所涉及的高频模块上所搭载的高频元件的图。
该实施方式中高频元件100a和上述第1实施方式的高频元件100的不同之处在于，如图3所示，在腔室C内配置元件3，并且在腔室C内填充环氧树脂等常规的模具用树脂112。此外，通过由焊料或导体浆料等导电性优异的金属材料形成的屏蔽构件113，将元件3接触配置于基板102上。其他构成和上述第1实施方式相同，因此标记相同符号，省略相关构成的说明。
如图3所示，在腔室C内通过屏蔽构件113将元件3接触配置于基板102上，然后以元件3的连接端子3a露出于树脂112的表面的方式向腔室C内填充树脂112，从而形成高频元件100a。此外，通过焊料等，将露出于树脂112的表面的连接端子3a和接地用电极103及信号用电极104一起连接到模块基板2的贴装面2a上的接地用焊盘电极4及信号用焊盘电极5。
在该实施方式中，可以获得和上述实施方式相同的效果，此外还能获得如下效果。即，由于将元件3配置于腔室C内，从而可以提供元件集成度得到提高的高频元件100。此外，由于元件3通过屏蔽构件113接触配置于基板102上，因此，当元件3为发热元件时，可以通过基板102提高元件3的散热性。此外，通过屏蔽构件113可以提高腔室C内的屏蔽性。
另外，通过未图示的散热过孔等，对屏蔽构件113进行接地，从而可以进一步提高上述效果。此外，并不一定需要屏蔽构件113，也可以将元件3接触配置于基板102的另一主面102b上，从而提高元件3的散热性。还可以在将元件3贴装于基板102的另一主面102b上的状态下，将树脂112填充到腔室C内。
＜第3实施方式＞
参照图4，说明本发明的第3实施方式。图4是表示本发明第3实施方式所涉及的高频模块上所搭载的高频元件的图。
该实施方式中高频元件100b和上述第1实施方式的高频元件100不同之处在于，如图4所示，由陶瓷材料或树脂材料等同一构件一体地形成支撑框体101及基板102，并层叠配置。其他构成和上述第1实施方式相同，因此标记相同符号，省略相关构成的说明。
如图4所示，在该实施方式中，高频元件100b上设置有过孔导体114a(相当于本发明的“层间连接导体”)和过孔导体114b，所述过孔导体114a贯穿支撑框体101及基板102，直接连接接地用电极103和贴装用电极108a，所述过孔导体114b连接信号用电极104和面内电极107。另外，高频元件100b例如按如下方式形成。即，在构成基板102的多个陶瓷生片的层叠体上，层叠构成支撑框体101的多个陶瓷生片且形成腔室C、具有开口的多个陶瓷生片，然后再烧结，从而形成支撑框体101及基板102一体形成的高频元件100b。
在该实施方式中，可以获得和上述实施方式相同的效果，此外还能获得如下效果。即，由于支撑框体101及基板102由同一构件一体形成，因此在回流焊等加热循环中，可以切实抑制支撑框体101及基板102的连接部分产生由热膨胀系数差所引起的应力等，从而可以进一步提高高频元件100b内的连接可靠性。
另外，本发明并不限定于上述各实施方式，只要不脱离其宗旨，除上述内容以外，还可以进行各种变更，例如，在上述实施方式中支撑框体101的内周俯视时的形状形成为和外形形状相似的形状，但也可以适当变更为椭圆形、圆形或多边形等。
工业上的实用性
可以将本发明广泛应用于具备滤波器电路元件的高频元件及具备其的高频模块中。
符号说明
1 高频模块
2 模块基板
3 元件
100、100a、100b 高频元件
101 支撑框体
101a 一面
101b 另一面
102 基板
103 接地用电极
105a、106a、114a 过孔导体(层间连接导体)
108a 贴装用电极
109 滤波器电路元件

Claims (4)

1.一种高频元件，其特征在于，
具备：支撑框体，其具有框架形状；
基板，其形状和所述支撑框体的外形形状相同，层叠于所述支撑框体的一面上；
接地用电极，其形成于所述支撑框体的另一面上；
贴装用电极，其形成于所述基板的一主面上，俯视时其至少一部分和所述接地用电极重合；
层间连接导体，其在所述接地用电极及所述贴装用电极重合的位置处沿层叠方向贯穿所述支撑框体及所述基板而设，对所述接地用电极和所述贴装用电极进行连接；以及
滤波器电路元件，其贴装于所述基板的一主面上；
所述滤波器电路元件的接地端子连接到所述贴装用电极，
在所述支撑框体的内周面所包围的空间中配置有元件以及屏蔽构件，
所述元件是倒片贴装的发热元件，
所述元件接触配置于所述屏蔽构件的一主面上，所述屏蔽构件配置成该屏蔽构件的另一面与所述基板的另一主面接触。
2.根据权利要求1所述的高频元件，其特征在于，所述元件是功率放大器、RF-IC、开关IC中的任一个。
3.根据权利要求1或2所述的高频元件，其特征在于，所述支撑框体及所述基板由同一构件形成。
4.一种高频模块，其是具备权利要求1至3中任一项所述的高频元件的高频模块，其特征在于，
具备贴装有所述高频元件的模块基板。
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Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9536824B2 (en) * 2014-11-06 2017-01-03 Origin Gps Ltd. Dual sided circuit for surface mounting
CN105070699B (zh) * 2015-07-31 2018-03-27 中国电子科技集团公司第二十六研究所 一种异构集成无源射频滤波器的射频前端模拟集成芯片
KR20170056391A (ko) * 2015-11-13 2017-05-23 삼성전기주식회사 프론트 엔드 모듈
US11355427B2 (en) * 2016-07-01 2022-06-07 Intel Corporation Device, method and system for providing recessed interconnect structures of a substrate
WO2018088410A1 (ja) * 2016-11-11 2018-05-17 株式会社村田製作所 スイッチｉｃ、高周波モジュールおよび通信装置
WO2018092529A1 (ja) * 2016-11-16 2018-05-24 株式会社村田製作所 高周波モジュール
KR102359559B1 (ko) * 2016-12-14 2022-02-08 가부시키가이샤 무라타 세이사쿠쇼 스위치 ic, 프론트 엔드 모듈 및 통신 장치
WO2018123699A1 (ja) * 2016-12-27 2018-07-05 株式会社村田製作所 高周波モジュール
WO2018168653A1 (ja) 2017-03-14 2018-09-20 株式会社村田製作所 高周波モジュール
WO2018186154A1 (ja) * 2017-04-04 2018-10-11 株式会社村田製作所 高周波モジュール及び通信装置
CN110771035B (zh) * 2017-06-21 2023-08-08 株式会社村田制作所 弹性波装置
CN109686719B (zh) * 2017-10-18 2021-09-21 群创光电股份有限公司 电子装置及包含其的显示设备
JP2019092019A (ja) * 2017-11-14 2019-06-13 株式会社村田製作所 弾性波装置、高周波フロントエンド回路及び通信装置
WO2019111873A1 (ja) 2017-12-05 2019-06-13 株式会社村田製作所 モジュール
WO2019111874A1 (ja) 2017-12-05 2019-06-13 株式会社村田製作所 モジュール
WO2019215988A1 (ja) * 2018-05-10 2019-11-14 株式会社村田製作所 高周波モジュール
KR102586888B1 (ko) 2018-11-27 2023-10-06 삼성전기주식회사 반도체 패키지
JP2020120185A (ja) * 2019-01-21 2020-08-06 株式会社村田製作所 フロントエンドモジュール及び通信装置
KR20210072940A (ko) * 2019-12-10 2021-06-18 삼성전기주식회사 전자부품 내장기판
WO2021212289A1 (zh) * 2020-04-20 2021-10-28 深圳市汇顶科技股份有限公司 激光发射装置
CN111224317B (zh) * 2020-04-20 2021-03-19 深圳市汇顶科技股份有限公司 激光发射装置
CN113438800B (zh) * 2021-06-29 2023-04-07 展讯通信（上海）有限公司 终端设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1400684A (zh) * 2001-07-27 2003-03-05 松下电器产业株式会社 天线共用器与通信设备
JP2003168901A (ja) * 2001-11-29 2003-06-13 Kyocera Corp 電子部品装置
JP2007103750A (ja) * 2005-10-06 2007-04-19 Murata Mfg Co Ltd 回路モジュール

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0012420D0 (en) * 2000-05-24 2000-07-12 Ibm Microcard interposer
US6404043B1 (en) * 2000-06-21 2002-06-11 Dense-Pac Microsystems, Inc. Panel stacking of BGA devices to form three-dimensional modules
JP2002118486A (ja) * 2000-10-06 2002-04-19 Matsushita Electric Ind Co Ltd 高周波複合スイッチモジュール
JP4258432B2 (ja) * 2004-05-21 2009-04-30 パナソニック株式会社 基板接合部材ならびにそれを用いた三次元接続構造体
JP4423210B2 (ja) * 2005-01-21 2010-03-03 京セラ株式会社 高周波モジュール及びそれを用いた通信機器
JP2007129459A (ja) 2005-11-02 2007-05-24 Murata Mfg Co Ltd 多層基板モジュール
CN101427613B (zh) * 2006-04-27 2010-11-03 松下电器产业株式会社 基板接合部件以及使用该基板接合部件的三维连接结构体
JP2009252893A (ja) * 2008-04-03 2009-10-29 Elpida Memory Inc 半導体装置
KR20100033012A (ko) * 2008-09-19 2010-03-29 주식회사 하이닉스반도체 반도체 패키지 및 이를 갖는 적층 반도체 패키지
US20110317386A1 (en) * 2009-03-19 2011-12-29 Panasonic Corporation Connecting structure, circuit device and electronic apparatus
TWI433618B (zh) * 2012-02-08 2014-04-01 Universal Scient Ind Shanghai 堆疊式基板結構
TWI581396B (zh) * 2012-10-17 2017-05-01 環旭電子股份有限公司 立體堆疊式封裝結構及其製作方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1400684A (zh) * 2001-07-27 2003-03-05 松下电器产业株式会社 天线共用器与通信设备
JP2003168901A (ja) * 2001-11-29 2003-06-13 Kyocera Corp 電子部品装置
JP2007103750A (ja) * 2005-10-06 2007-04-19 Murata Mfg Co Ltd 回路モジュール

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