CN104979297A - 用于电子模块的基板以及制造用于电子模块的基板的方法 - Google Patents

用于电子模块的基板以及制造用于电子模块的基板的方法 Download PDF

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CN104979297A
CN104979297A CN201510173264.1A CN201510173264A CN104979297A CN 104979297 A CN104979297 A CN 104979297A CN 201510173264 A CN201510173264 A CN 201510173264A CN 104979297 A CN104979297 A CN 104979297A
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substrate
electronic
recess
electronic module
electronic chip
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CN104979297B (zh
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F·布鲁齐
D·乔拉
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本发明的各实施方式总体上涉及用于电子模块的基板以及制造用于电子模块的基板的方法。具体地，各种实施例提供一种用于电子模块的基板，其中基板包括：传导材料；以及凹部，其形成在基板的一个主表面中并且被适配成容纳电子芯片。

Description

用于电子模块的基板以及制造用于电子模块的基板的方法
技术领域
各种实施例涉及一种用于电子模块的基板、一种电子模块以及一种制造用于电子模块的基板的方法。
背景技术
在很多技术领域中，使用电子模块(例如所谓的功率模块)来向电子部件或者设备提供或者切换功率。例如，一个可能的领域为汽车领域。大多数功率模块包括至少一个晶体管，例如IGBT(绝缘栅双极型晶体管)。在设计新的功率模块时，IGBT功率模块内的效率是主要的挑战。影响功率模块的效率和可能的切换频率的一个因素是杂散电感。杂散电感直接受到功率模块设计的影响，并且较少地受到模块基本物理特性的影响。常规IGBT功率模块设计倾向于牺牲杂散电感以便增加模块的功率密度。这通常包括：分离基底上的正(+)DC路径和负(-)DC路径，跨主电流路径横向地接合以方便将功率晶体管芯片接合至功率模块中的各种电势，和/或由于模块中存在的大量公共元件而提供重复布局以用于方便制造。在每种情况下，结果是增加了功率模块内的杂散电感并且从而降低了效率。另外，使用裸露的晶粒(dice)的标准功率模块当前还用于较低功率范围中，并且具有成本高的缺点，尤其对于小体积而言。
发明内容
各种实施例提供一种用于电子模块的基板，其中基板包括：传导材料；以及凹部，形成在基板的一个主表面中并且被适配成容纳电子芯片。
另外，各种实施例提供一种电子模块，电子模块包括根据示例性实施例的基板以及被放置在基板的凹部中的电子芯片。
另外，各种实施例提供一种制造用于电子模块的基板的方法，其中该方法包括：提供基板；以及在基板的一个主表面中形成凹部，其中凹部被适配成容纳电子芯片。
附图说明
在附图中，相似的附图标记贯穿不同的视图通常指代相同的部分。附图不一定按比例绘制。相反，重点通常在于说明本发明的原理。在以下描述中，参考以下附图来描述各种实施例，在附图中：
图1示出电子模块的部件的透视图；
图2示出包括绝缘层的图1的电子模块的透视图；以及
图3示出图2的电子模块的侧视图。
具体实施方式
下面，将解释半导体器件以及制造半导体器件的方法的另外的示例性实施例。应当注意，也可以将在一个特定示例性实施例的情境中描述的对特定特征的描述与其它示例性实施例进行组合。
本文使用词语“示例性”来意指“用作示例、实例或者说明”。本文被描述为“示例性”的任何实施例或者设计不一定要被理解为比其它实施例或者设计优选或者有利。
各种实施例提供一种制造电子模块的方法，其中该方法包括：提供根据示例性实施例的基板；在基板的凹部中布置电子芯片。优选地，电子芯片与基板直接地或者间接地电接触和/或热接触。例如，可以例如通过使用(传导性)环氧胶黏剂或者焊料来将电子芯片粘附至凹部中的接触区域。可选地，可以在基板的一个主表面上布置盖层或者绝缘层并且覆盖所布置的电子芯片。此外或者备选地，可以在基板的至少部分周围形成成型化合物(mold compound)，并且成型化合物可以形成电子模块的封装。
特别地，电子模块可以是功率模块。例如，电子芯片可以是裸片(die)、经封装的电子芯片或者预封装裸片。基板的凹部可以形成盲孔。优选地，凹部可以具有与意图被放置或者布置在凹部中的电子芯片的厚度对应或者适配的深度。优选地，电子芯片为经封装的电子芯片，例如可以包括模制的封装。例如，电子芯片可以是小外形晶体管(SOT)封装件或者小外形无引线(nonleaded)晶体管(SON)封装件。特别地，载体可以包括多个凹部。虽然可以关于其任何期望的应用对基板和电子模块的横向尺寸进行适配，但是基板的典型尺寸在两个横向维度上可以在10mm至200mm的范围内。
通过在用于电子模块的基板中提供凹部，可能使用可以被布置在凹部中的SOT和/或SON封装件来产生专用低成本功率子系统。这可以实现比标准功率模块更廉价的解决方案，其功率范围从几百瓦特直到10kW或者甚至更大。另外，部分围绕电子芯片的基板的传导材料可以使得能够显著降低功率封装件的杂散电感，这转而可以使得能够使用快速开关器件(IGBT、二极管和/或MOSFET)，从而显著降低功率损失。可能的应用可以是例如用于电焊机的功率模块。
下面，描述基板的示例性实施例。然而，还可以将关于这些实施例所描述的特征和要素与电子模块以及制造基板的方法的示例性实施例进行组合。
根据基板的示例性实施例，凹部具有被适配成完全容纳电子芯片的深度。
特别地，凹部的深度可以在1mm与10mm之间的范围内，优选地在2mm与7mm之间的范围内，更优选地在2.5mm与5.5mm之间的范围内。应当注意，凹部优选地可以具有能够将电子芯片与电子芯片或者裸片附接至其的基底或者载体一起容纳的适合的深度。
根据基板的示例性实施例，基板具有在2.5mm与7mm之间的范围内的厚度。
特别地，基板的厚度可以在3.0mm与6.0mm之间的范围内，优选地在3.5mm与5mm之间的范围内。由于降低的高度和总的寄生参数、由于基板的传导材料并且由于可能非常低的耦合电容，包括电子芯片(例如预封装晶粒)可以被布置到其中的凹部的相对低的基板的使用可以在高开关频率时确保高性能。
根据基板的示例性实施例，基板包括从由铝、黄铜和铜组成的组中选出的材料。
原则上，可以使用通常用于基板或者载体的任意合适的金属或者其它材料。基板可以包括这些材料中的一种或若干种材料，或者可以由这些材料中的一种或若干种材料组成。所述基板可以包括金属基复合材料或者其它烧结金属。特别地，材料应当具有适合于意图的应用的导热性和/或导电性。例如，可能提供相对地成本有效的基于铝的基板。
根据基板的示例性实施例，在凹部中形成接触区域。
特别地，接触区域或者多个接触区域可以形成接触焊盘、引脚或者接触端子，接触焊盘、引脚或者接触端子被适配成与电子芯片或者芯片封装件的端子或者焊盘电接触。例如，接触区域可以被适配用于表面安装技术，即，可以被适配为表面安装器件与接触区域接触。此外或者备选地，接触区域或者基板本身还可以用作散热器。此外，应当提及，电子芯片(包括电子芯片安装在其上的可能基底)可以通过胶黏剂(如环氧胶黏剂、焊料或者烧结层)附接至接触区域。
下面，描述电子模块的示例性实施例。然而，还可以将关于这些实施例所描述的特征和要素与基板以及制造基板的方法的示例性实施例进行组合。
根据电子模块的示例性实施例，电子芯片为预封装晶粒。
可能的低成本无引线(leadless)或者有引线(leaded)预封装晶粒的使用可以实现不同的贴装(pick-and-place)方法以及低成本的制造工艺。在使用预封装晶粒的情况下，由于SOT封装件和SON封装件所提供的机械和化学保护，电子模块或者器件对生产问题的敏感性也可能导致电子模块本身更高的可靠性。此外，这可以有力地降低对于朝着封装塑料盖的爬电距离的需求，并且可以降低电子模块或者功率模块的总高度。一旦其已经被布置或者组装在基板的凹部中，还可能在电子芯片或者预封装晶粒的顶部直接施加机械压力。因此，可能由于提供到基板或者散热器的更好的粘附而改善热阻。这一技术也可以实现双侧冷却解决方案。
另外，预封装晶粒的使用可以实现有时被制造商或者用户要求的电子芯片的更好的绝缘，以避免例如用户或者操作者可能与电子模块或者功率模块的摆动部分(如可以在高电压摆动的散热器)接触的可能性。除了双绝缘以及特别地用于基板的导电材料的使用，通过形成第二绝缘的一部分(特别地关于杂散场)，电子模块可以具有相对低的杂散电感，即使是在封装件(例如SON或者SOT)可能具有相对高的杂散电感的情况下。
此外，预封装晶粒的使用可以实现电子模块的高可靠性，尤其是在高温和高湿度应力的情况下(如在HTRB、HTGS、AC、THB和H3TRB测试中所描述的情况下)。
根据电子模块的示例性实施例，电子芯片附接至基板。
例如，电子芯片可以通过表面安装技术直接地或间接地附接至基板。例如，电子芯片或者裸片可以通过表面安装技术附接至基底或者载体，而基底或者载体通过例如胶黏剂附接至基板。优选地，电子芯片以如下方式附接至基板：电子芯片被凹部完全容纳。也就是说，包括可选的附接或者粘附层在内的电子芯片的厚度优选地小于凹部的深度。例如，在使用附接或者安装至PCB基底上或者甚至直接附接或者安装在基板上的凹部中的预封装SON和/或SOT(形成隔离子组件)时，基板也可以形成散热器。因此，可能避免分开的散热器以及用于支撑分开的或者分离的散热器的复杂机械结构，这转而可以显著降低制造工艺的成本。
根据电子模块的示例性实施例，电子芯片被布置在载体上。
载体或者基底然后可以附接至基板。特别地，载体可以是基底、直接接合铜(DBC)基底或者载体。
根据电子模块的示例性实施例，电子芯片被粘附至基板。
例如，环氧胶黏剂或者焊料可以用于将电子芯片粘附至基板，特别地，粘附在基板的凹部中。如已经提及的，这可以直接或者间接进行。
根据示例性实施例，电子模块还包括被布置在基板的一个主表面上的绝缘层。
例如，绝缘层可以包括合适的绝缘材料(如聚酰亚胺)的薄片或膜，或者可以由上述薄片或膜形成或者构成。通过提供这样的绝缘层或者盖层，可能例如通过焊接在电子模块的顶部布置PCB。备选地或者附加地，可以在一个主表面上布置传导层。应当提及，薄片或膜可以具有大于基板的面积或者尺寸的尺寸，或者覆盖大于基板的面积或者尺寸的区域。也就是说，薄片或膜可以比基板延伸得更远。备选地，薄片或膜的尺寸可以小于或者等于基板的尺寸或者面积。例如，薄片或膜可以正好覆盖基板。
根据示例性实施例，电子模块还包括至少部分封装基板以及被放置在基板的凹部中的电子芯片的成型化合物。
根据示例性实施例，电子模块还包括被布置成使电子芯片与电子模块的外部接触的端子。
特别地，端子可以是任意合适的端子，如咬合式端子、压入式端子、弹簧端子或者同时具有机械功能和电气功能的任何其它互锁端子。
根据示例性实施例，电子模块包括多个基板以及被放置在多个基板的多个凹部中的多个电子芯片。
特别地，在每个基板的每个凹部中，可以布置或者放置相同数目的电子芯片(可选地布置在基底或者载体上)，例如可以在每个凹部中放置1个、2个、3个或者甚至更多个电子芯片。然而，每个凹部和/或每个基板的电子芯片的数目可以不同。
根据电子模块的示例性实施例，多个基板中的至少两个基板被堆叠在彼此之上。
因此，可以形成电子芯片或者模块的堆叠，其中每个基板优选地包括被附接在基板的凹部中的至少一个电子芯片。通过将多个电子芯片堆叠在彼此之上，可能提供节省空间的电子模块。另外，通过将多个电子芯片堆叠在彼此之上，一个堆叠层或者级的基板可以形成用于在堆叠中被布置在下面的堆叠层或者级的盖层。
根据制造基板的方法的示例性实施例，通过来自由以下各项组成的组的一个工艺来形成凹部：钻削、蚀刻、冲切、冲压、切削、铣削、3D打印、挤压和/或冷挤压。
特别地，钻削或蚀刻可以通过激光、选择性或者非选择性蚀刻试剂等来执行。
下面，结合附图描述根据示例性实施例的、包括基板的电子模块的示例性实施例。
特别地，图1示意性地描绘包括其中形成凹部或者腔体102的基板101的电子模块100的部件的透视图。基板101包括(热和电)传导材料(如铜、铜合金、铝或铝合金或者任何其它合适的材料)，或者由上述传导材料构成。除了凹部102，基板101可以包括附加结构或者图案，如用于固定的通孔103和/或横向通道或者缺口104。应当提及，根据图1的实施例，凹部102由盲孔而非由通孔形成。凹部的底部上固定有基底或者载体105(如直接铜接合(DCB)封装体)。例如，基底105可以被胶合或者焊接至凹部102的底部。
在将基底105固定至基板101之前，向基底(例如DBC)组装电子芯片106(如预组装的SOT或者SON、VSON(IGBT/MOS))。标准的SMD贴装机器可以用于向基底上组装电子芯片。除了电子芯片，向基底焊接标准的和可能的低成本端子107。应当提及，凹部或者腔体足够深以容纳其上已安装有电子芯片106的基底。腔体或者凹部102可以避免对于特定塑料外壳的需要，因为基板形成外壳或者壳体的主要部件。因此，也可能通过避免使用特定塑料外壳而使用相对便宜的材料(如铝)的基板作为外壳来降低成本。除了使用硅橡胶(如硅胶)胶合基底外，还可以使用环氧树脂或者其它材料作为附加绝缘体。电子模块因此可以由于材料和所使用的工艺技术(如SMD贴装技术)而形成或者作为低成本功率混合子系统的一部分。
图2示意性地示出其上已布置有绝缘体材料(如聚酰亚胺，其形成被布置(焊接、胶合)在基板的凹部中的基底的绝缘的一部分)的薄层210或片的图1的实施例。为了将端子107用于电接触电子芯片，端子107突出到薄层210外。一旦电子模块被安装在板上(例如到PCB上)，或者一旦PCB板被焊接在电子模块之上，这一绝缘层210就可以确保爬电距离和净距离。薄层210还可以延伸超过基板或者电子模块的本体，使得可以能够避免形成散热器的基板直接面对被固定或者焊接在其上的板。
图3示意性地示出图2的电子模块的侧视图。特别地，图3示出基板101和端子107的侧壁，端子107在电子模块100的顶部上方延伸，以便使得基板的凹部中的电子芯片能够电接触。电子模块100可以形成极薄的子系统并且提供特定补偿路径，使得其可以在以高开关频率操作的系统中以及在需要减小的垂直尺寸的应用中被应用或者使用。
应当注意，术语“包括(comprising)”不排除其它要素或者特征，并且“一个(a)”或者“一个(an)”不排除多个。另外，可以将与不同实施例相关联进行描述的要素进行组合。还应当注意，不应当将附图标记理解为限制权利要求的范围。虽然已经参考特定实施例特别地示出和描述了本发明，但是本领域技术人员应当理解，在不偏离由所附权利要求限定的本发明的精神和范围的情况下，本文可以做出形式和细节方面的各种改变。本发明的范围因此由所附权利要求来指定，并且在权利要求的等同方案的含义和范围内进行的所有改变因此意在被包括在其中。

Claims (16)

1.一种用于电子模块的基板，所述基板包括：
传导材料；以及
凹部，形成在所述基板的一个主表面中并且被适配成容纳电子芯片。
2.根据权利要求1所述的基板，其中所述凹部具有被适配成完全容纳所述电子芯片的深度。
3.根据权利要求1所述的基板，其中所述基板具有在2mm与10mm之间的范围内的厚度。
4.根据权利要求1所述的基板，其中所述基板包括从由以下各项组成的组中选出的材料：
铝；
黄铜；
铜；以及
金属基复合材料。
5.根据权利要求1所述的基板，其中在所述凹部中形成接触区域。
6.一种电子模块，包括：
根据权利要求1所述的基板，以及
被放置在所述凹部中的电子芯片。
7.根据权利要求6所述的电子模块，其中所述电子芯片为预封装晶粒。
8.根据权利要求6所述的电子模块，其中所述电子芯片被附接至所述基板。
9.根据权利要求8所述的电子模块，其中所述电子芯片被粘附至所述基板。
10.根据权利要求6所述的电子模块，还包括被布置在所述基板的所述一个主表面上的绝缘层。
11.根据权利要求6所述的电子模块，还包括成型化合物，所述成型化合物至少部分地封装所述基板以及被放置在所述基板的所述凹部中的所述电子芯片。
12.根据权利要求6所述的电子模块，还包括端子，所述端子被布置成使所述电子芯片与所述电子模块的外部接触。
13.根据权利要求6所述的电子模块，包括多个根据权利要求1所述的基板，以及被放置在所述多个基板的多个凹部中的多个电子芯片。
14.根据权利要求13所述的电子模块，其中所述多个基板中的至少两个基板被堆叠在彼此之上。
15.一种制造用于电子模块的基板的方法，所述方法包括：
提供基板；
在所述基板的一个主表面中形成凹部，其中所述凹部被适配成容纳电子芯片。
16.根据权利要求15所述的方法，其中所述凹部通过来自由以下各项组成的组中的一个工艺来形成：
钻削；
切削；
铣削；
蚀刻；
冲切；
冲压；
挤压；
冷挤压；以及
3D打印。
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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10319659B2 (en) * 2017-10-13 2019-06-11 Semiconductor Components Industries, Llc Semiconductor package and related methods
JP7005373B2 (ja) 2018-02-09 2022-01-21 三菱電機株式会社 パワーモジュールおよび電力変換装置
DE102019202718B4 (de) 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Dünnes Dual-Folienpackage und Verfahren zum Herstellen desselben
DE102019202721B4 (de) 2019-02-28 2021-03-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. 3d-flexfolien-package
DE102019202716B4 (de) 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Flex-folien-package mit coplanarer topologie für hochfrequenzsignale und verfahren zum herstellen eines derartigen flex-folien-packages
DE102019202715A1 (de) * 2019-02-28 2020-09-03 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Folienbasiertes package mit distanzausgleich
DE102020102938A1 (de) 2020-02-05 2021-08-05 Marelli Automotive Lighting Reutlingen (Germany) GmbH Schaltungsträgerplatte und Verfahren zum Herstellen einer Schaltungsträgerplatte
US11735504B2 (en) 2020-11-18 2023-08-22 Semiconductor Components Industries, Llc Power module package baseplate with step recess design

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5986340A (en) * 1996-05-02 1999-11-16 National Semiconductor Corporation Ball grid array package with enhanced thermal and electrical characteristics and electronic device incorporating same
CN1471730A (zh) * 2001-01-17 2004-01-28 ���µ�����ҵ��ʽ���� 电子线路装置及其制造方法
CN101656248A (zh) * 2008-08-19 2010-02-24 南茂科技股份有限公司 具有凹槽的基板的芯片堆叠封装结构及其封装方法
CN101872749A (zh) * 2009-04-24 2010-10-27 南茂科技股份有限公司 凹穴芯片封装结构及使用其的层叠封装结构
CN101872757A (zh) * 2009-04-24 2010-10-27 南茂科技股份有限公司 凹穴芯片封装结构及使用其的层叠封装结构
CN101989589A (zh) * 2009-08-06 2011-03-23 三星电机株式会社 功率器件封装及其制造方法
CN103295979A (zh) * 2012-02-22 2013-09-11 乾坤科技股份有限公司 封装结构及其制造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5032896A (en) * 1989-08-31 1991-07-16 Hughes Aircraft Company 3-D integrated circuit assembly employing discrete chips
US5397917A (en) * 1993-04-26 1995-03-14 Motorola, Inc. Semiconductor package capable of spreading heat
US5552636A (en) 1993-06-01 1996-09-03 Motorola, Inc. Discrete transitor assembly
US5396403A (en) 1993-07-06 1995-03-07 Hewlett-Packard Company Heat sink assembly with thermally-conductive plate for a plurality of integrated circuits on a substrate
US6586829B1 (en) * 1997-12-18 2003-07-01 Si Diamond Technology, Inc. Ball grid array package
US6184463B1 (en) * 1998-04-13 2001-02-06 Harris Corporation Integrated circuit package for flip chip
JP2000208540A (ja) * 1998-08-25 2000-07-28 Texas Instr Inc <Ti> 薄型半導体チップスケ―ル・パッケ―ジを密封する方法
KR100890534B1 (ko) 2000-02-25 2009-03-27 이비덴 가부시키가이샤 다층프린트배선판 및 다층프린트배선판의 제조방법
DE10017741A1 (de) 2000-04-10 2001-10-25 Infineon Technologies Ag Gehäuse für Halbleiterchips
DE10213648B4 (de) 2002-03-27 2011-12-15 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul
TWI221664B (en) * 2002-11-07 2004-10-01 Via Tech Inc Structure of chip package and process thereof
JP4603368B2 (ja) * 2003-02-28 2010-12-22 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング 構造化された金属被覆を施されたパッケージボディを有するオプトエレクトロニクス素子、この種の素子を製作する方法、およびプラスチックを含むボディに、構造化された金属被覆を施す方法
TWI228806B (en) * 2003-05-16 2005-03-01 Advanced Semiconductor Eng Flip chip package
US7190589B2 (en) 2004-10-19 2007-03-13 Cinch Connectors, Inc. Electronic control enclosure
DE102006008807B4 (de) 2006-02-25 2010-10-14 Semikron Elektronik Gmbh & Co. Kg Anordnung mit einem Leistungshalbleitermodul und einem Kühlbauteil
US7791177B2 (en) * 2007-12-10 2010-09-07 Infineon Technologies Ag Electronic device
US8432678B2 (en) 2010-01-06 2013-04-30 Apple Inc. Component assembly
US8847376B2 (en) * 2010-07-23 2014-09-30 Tessera, Inc. Microelectronic elements with post-assembly planarization
US9337116B2 (en) 2010-10-28 2016-05-10 Stats Chippac, Ltd. Semiconductor device and method of forming stepped interposer for stacking and electrically connecting semiconductor die
US20120286297A1 (en) * 2011-05-09 2012-11-15 Taiwan Micropaq Corporation Led package structure and module thereof
US8525312B2 (en) * 2011-08-12 2013-09-03 Tessera, Inc. Area array quad flat no-lead (QFN) package
JP5588956B2 (ja) 2011-11-30 2014-09-10 株式会社 日立パワーデバイス パワー半導体装置
US9147637B2 (en) 2011-12-23 2015-09-29 Infineon Technologies Ag Module including a discrete device mounted on a DCB substrate

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5986340A (en) * 1996-05-02 1999-11-16 National Semiconductor Corporation Ball grid array package with enhanced thermal and electrical characteristics and electronic device incorporating same
CN1471730A (zh) * 2001-01-17 2004-01-28 ���µ�����ҵ��ʽ���� 电子线路装置及其制造方法
CN101656248A (zh) * 2008-08-19 2010-02-24 南茂科技股份有限公司 具有凹槽的基板的芯片堆叠封装结构及其封装方法
CN101872749A (zh) * 2009-04-24 2010-10-27 南茂科技股份有限公司 凹穴芯片封装结构及使用其的层叠封装结构
CN101872757A (zh) * 2009-04-24 2010-10-27 南茂科技股份有限公司 凹穴芯片封装结构及使用其的层叠封装结构
CN101989589A (zh) * 2009-08-06 2011-03-23 三星电机株式会社 功率器件封装及其制造方法
CN103295979A (zh) * 2012-02-22 2013-09-11 乾坤科技股份有限公司 封装结构及其制造方法

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