CN104851388B - 有机发光显示器及其制造方法 - Google Patents

有机发光显示器及其制造方法 Download PDF

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CN104851388B
CN104851388B CN201510072175.8A CN201510072175A CN104851388B CN 104851388 B CN104851388 B CN 104851388B CN 201510072175 A CN201510072175 A CN 201510072175A CN 104851388 B CN104851388 B CN 104851388B
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oxide semiconductor
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崔千基
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Samsung Display Co Ltd
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Abstract

公开了一种有机发光显示器及其制造方法。所述有机发光显示器包括像素电路以将电流供给至有机发光器件。像素电路包括开关晶体管和驱动晶体管。开关晶体管包括位于第一栅电极和氧化物半导体层之间的第一绝缘层。驱动晶体管包括位于有源层上的第二栅电极。第一绝缘层位于有源层和第二栅电极之间。

Description

有机发光显示器及其制造方法
相关申请的交叉引用
于2014年2月19日提交的、题为“有机发光显示装置及其制造方法”的第10-2014-0019212号韩国专利申请通过整体引用并入本文。
技术领域
本文中的一个或多个实施方式涉及有机发光显示器以及制造该有机发光显示器的方法。
背景技术
有机发光显示器利用有机发光器件(OLED)产生光。每个OLED包括位于空穴注入电极和电子注入电极之间的有机发射层。操作中，来自空穴注入电极的空穴和来自电子注入电极的电子在有机发射层中结合以形成激子。当激子从激发态跃迁至基态时，产生光以形成图像。
由于有机发光显示器是自发光的(例如，不需要背光源)，因此其可以以低压驱动，同时能够较为纤薄和轻便。此外，这种显示器具有宽视角、高对比度和快速响应速度。
发明内容
根据一个实施方式，有机发光显示器包括：基底；位于基底上的有机发光器件；以及将电流供给至有机发光器件的像素电路，其中像素电路包括位于基底上的开关晶体管和驱动晶体管，开关晶体管包括位于第一栅电极和氧化物半导体层之间的第一绝缘层，驱动晶体管包括位于有源层上的第二栅电极，以及位于有源层和第二栅电极之间的第一绝缘层。
氧化物半导体层可包括从由镓、铟、锌、铪和锡组成的组中所选择的一个或多个以及氧。第一栅电极可包括掺杂有杂质的多晶硅层。有源层可包括位于沟道区两侧的源区和漏区，其中源区和漏区掺杂有杂质。
显示器可包括位于氧化物半导体层和第二栅电极上的第二绝缘层，其中开关晶体管可包括穿过第二绝缘层连接至氧化物半导体层的第一源电极和第一漏电极。
驱动晶体管可包括穿过第一绝缘层和第二绝缘层分别连接至源区和漏区的第二源电极和第二漏电极。
像素电路可包括电容器，其中电容器包括位于基底上的第一电极和位于第一电极上的第二电极，其中第一绝缘层位于第一电极和第二电极之间。第一电极可包括掺杂有杂质的多晶硅层，以及第二电极包括氧化物半导体层。电容器可包括位于第二电极上的第三电极，其中第二绝缘层位于第二电极和第三电极之间。有机发光器件可包括位于阳极电极和阴极电极之间的有机发射层。
根据另一实施方式，制造有机发光显示器的方法包括：对位于基底上的多晶硅层进行图案化以形成第一栅电极的中间层和有源层的中间层；在第一栅电极的中间层和有源层的中间层上形成第一绝缘层；在有源层的中间层上方的第一绝缘层上形成第二栅电极；对第一栅电极的中间层和有源层的中间层掺杂杂质以形成第一电极和有源层；在第一绝缘层上形成氧化物半导体层，以使氧化物半导体层位于第一栅电极上；在第二栅电极和氧化物半导体层上形成第二绝缘层；以及形成第一源电极和第一漏电极以穿过第二绝缘层连接至氧化物半导体层。
有源层包括与第二栅电极重叠的沟道区以及位于沟道区两侧的源区和漏区，其中源区和漏区包含杂质。
该方法可包括形成第二源电极和第二漏电极以穿过第一绝缘层和第二绝缘层分别连接至源区和漏区。第一栅电极可以是开关晶体管的栅电极，第二栅电极可以是驱动晶体管的栅电极。氧化物半导体层可包括从由镓、铟、锌、铪和锡组成的组中所选择的一个或多个以及氧。
该方法可包括在基底上施加非晶硅层并使非晶硅层结晶以形成多晶硅层。该杂质可以是P型杂质。
图案化位于基底上的多晶硅层的操作还可包括图案化多晶硅层以形成电容器的第一电极的中间层，并且掺杂杂质的操作还可包括利用杂质对第一电极的中间层进行掺杂以形成电容器的第一电极。
形成氧化物半导体层的操作还可包括形成电容器的第二电极以与第一电极重叠。该方法可包括在第二绝缘层上形成电容器的第三电极以与第二电极重叠。
附图说明
通过参照附图对示例性实施方式进行详细描述，本发明的特征对本领域的技术人员而言将是显而易见的，其中：
图1示出了有机发光显示器的实施方式；
图2示出了像素电路的实施方式；
图3示出了像素电路中的晶体管和电容器的示例；以及
图4至图8示出了用于制造像素电路中的晶体管和电容器的方法的实施方式。
具体实施方式
在下文中将参照附图更充分地描述示例性实施方式；然而，它们可以以不同的形式实现并且不应被解释为受限于本文中阐述的实施方式。相反地，提供这些实施方式使得本公开将是详尽且完整的，并向本领域的技术人员充分地传达示例性实现。
为了说明清楚起见，在附图中层和区域的尺寸可能被放大。应理解，当层或元件被称作“位于|”另一层或基底“上”时，其可直接位于另一层或基底上，或者也可能存在插入层。此外，应理解当层被称作“在”另一层“之下”时，其可以直接在另一层之下，并且也可能存在一个或多个插入层。此外，还应理解当层被称作“在”两个层“之间”时，其可以是两个层之间的唯一层，或者也可能存在一个或多个插入层。在整个说明书中，相同的参考数字指代相同的元件。
图1示出了有机发光显示器100的实施方式，图2示出了像素电路的实施方式，以及图3示出了包括薄膜晶体管(TFT)和电容器的像素电路的结构的示例。
参照图1至图3，有机发光显示器100包括像素电路C，以向基底101上的OLED供给电流。基底101可包括，例如，透明玻璃材料(例如，SiO2)、陶瓷、塑料和/或不锈钢。由例如SiO2和/或SiNx形成的缓冲层可位于基底101上以提供平整度并防止杂质元素渗入基底101中。
基底101包括显示区域DA和非显示区域ND。显示区域DA包括多个像素，其中像素包括发射光以生成图像的OLED。非显示区域ND可包括焊盘单元以将电信号从供电装置或信号生成装置传输至显示区域DA。
像素中的每个包括用于将电流供给至OLED的像素电路C。OLED包括用作空穴注入电极的阳极电极、用作电子注入电极的阴极电极以及位于阳极电极和阴极电极之间的有机发射层。阳极电极连接至像素电路C，阴极电极连接至第二电源ELVSS(t)。OLED基于来自像素电路C的电流生成预定亮度的光。
像素电路C至少包括第一晶体管TR1、第二晶体管TR2和电容器C1。第一晶体管TR1包括位于基底101上的第一栅电极310、位于第一栅电极310上的氧化物半导体层320以及位于第一栅电极310和氧化物半导体层320之间的第一绝缘层102。第一源电极332和第一漏电极334连接至氧化物半导体层320。第一源电极332和第一漏电极334连接至氧化物半导体层320，同时穿透位于氧化物半导体层320上的第二绝缘层103。
第一栅电极310可以是或者可以包括例如掺杂有杂质(例如，诸如硼(B)的P型杂质)的多晶硅层。在另一实施方式中，杂质可以是诸如磷(P)的N型杂质。
氧化物半导体层320可以不掺杂杂质，并且可包括例如镓(Ga)、铟(In)、锌(Zn)或锡(Sn)，以及氧(O)或它们的组合。
第一晶体管TR1的第一栅电极310连接至扫描线。第一源电极332连接至数据线。第一漏电极334连接至第一节点N1。扫描信号Scan(n)被输入至第一栅电极310并且数据信号Data(t)被输入至第一源电极332。因此，第一晶体管TR1用作用于传输数据信号的开关晶体管。
第一晶体管TR1将数据电压传输至电容器C1，电容器C1存储所接收到的数据电压。第一晶体管TR1使用氧化物半导体层320作为有源层。由此，来自第一晶体管TR1的漏电流可以被降低为小于多晶硅层被用作有源层的情况。因此，存储在电容器C1中的电压的减少可以被降低，并且电容器C1可具有小尺寸。
第二晶体管TR2可包括位于基底101上的有源层210和位于有源层210上的第二栅电极220。第一绝缘层102位于有源层210和第二栅电极220之间。第二源电极232和第二漏电极234连接至有源层210。第二源电极232和第二漏电极234可连接至有源层210，并穿透位于第一绝缘层102和第二栅电极220上的第二绝缘层103。
有源层210可以是或者可以包括例如多晶硅层，其中，多晶硅层包括在预定的(例如，中心)区域处未掺杂杂质的沟道区212。源区214和漏区216位于沟道区212的相对侧并且掺杂有杂质。
第二源电极232和第二漏电极234分别连接至源区214和漏区216。杂质可以与第一栅电极310上掺杂的杂质相同或者不同。
第二晶体管TR2的第二栅电极220连接至第一节点N1。第二源电极232连接至第一电源ELVDD(t)。第二漏电极234连接至OLED的像素电极。因此，第二晶体管TR2用作用于根据数据信号驱动OLED的驱动晶体管。例如，第二晶体管TR2可将与存储在电容器C1中的电压和阈值电压之间的差值的平方值成比例的输出电流供给至OLED。
尤其在第二晶体管TR2的有源层210包括多晶硅层的情况下，有源层210可具有优良的电子迁移率。因此，第二晶体管TR2可具有小尺寸。
电容器C1包括位于基底101上的第一电极410和位于第一电极410上的第二电极420。第一绝缘层102位于第一电极410和第二电极420之间。电容器C1还包括位于第二电极420上的第三电极430。第二绝缘层103位于第二电极420和第三电极430之间。因此，第一绝缘层102和第二绝缘层103可用作电容器C1的介电层。
第一电极410可包括与第一栅电极310相同或不同的材料，例如，掺杂有杂质的多晶硅层。第二电极420可包括与氧化物半导体层320相同或不同的材料。
第三电极430可包括与第一源电极332、第一漏电极334、第二源电极232和/或第二漏电极234的材料相同或不同的材料。
电容器C1可通过并联连接第一电极410与第二电极420之间以及第二电极420与第三电极430之间的两个电容器而形成以增加密度。由此可减小电容器C1的尺寸。电容器C1连接在第一节点N1和第二晶体管TR2的第一电极(例如，第一电源ELVDD(t))之间。电容器C1存储与从第一晶体管TR1传输的电压和从第一电源ELVDD(t)供给的电压之间的差值相对应的电压。
在图2和图3中，像素电路包括两个晶体管TR1和TR2以及一个电容器C1。在其他实施方式中，像素电路可包括三个或三个以上TFT以及两个或两个以上电容器，和/或可根据需要包括附加的配线以形成多种结构。
图4至图8是示出了用于制造包括图3中的电容器和TFT的像素电路的方法的实施方式的剖视图。
参照图4，该方法包括在基底101上形成多晶硅层，并且图案化多晶硅层以形成第一栅电极的中间层202和有源层的中间层201。随后，在第一栅电极的中间层202和有源层的中间层201上形成第一绝缘层102。此外，当图案化多晶硅层时，可形成电容器的第一电极的中间层203。
在形成多晶硅层之前，可在基底101上形成缓冲层。缓冲层可包括例如SiO2和/或SiNx，并且可通过使用多种沉积方法形成，例如但不限于等离子体增强化学气相淀积(PECVD)法、常压CVD(APCVD)法以及低压CVD(LPCVD)法。
多晶硅层可通过使例如非晶硅结晶形成。可使用以下方法使非晶硅结晶，例如，快速热退火(RTA)法、固相结晶(SPC)法、准分子激光退火(ELA)法、金属诱导结晶(MIC)法、金属诱导横向结晶(MILC)法和/或连续侧向固化(SLS)法。
第一绝缘层102可包括单层或多层SiO2或SiNx，并且可使用PECVD方法、APCVD方法或LPCVD方法形成。
参照图5，第二栅电极220形成在第一绝缘层102上从而位于有源层的中间层201上。栅电极220可包括：例如，Au、Ag、Cu、Ni、Pt、Pd、Al、和/或Mo，或者诸如Al:Nd合金和Mo:W合金的合金。
参照图6，有源层的中间层201、第一栅电极的中间层202和第一电极的中间层203掺杂有杂质以分别形成有源层210、第一栅电极310和第一电极410。例如，杂质可以是诸如B的P型杂质或者诸如P的N型杂质。
当掺杂杂质时，有源层210利用第二栅电极220作为自对准掩模。因此，有源层210可在与第二栅电极220重叠的位置处包括沟道区212。源区214和漏区216位于沟道区212的相对侧并且掺杂有杂质。
第一栅电极310和第一电极410可以是或者可包括例如掺杂有杂质的多晶硅层。因为第一栅电极310和第一电极410与有源层210同时形成，因此所使用的掩模的数量小于第一栅电极310和第一电极410由金属形成的情况下所使用的掩模的数量。相应地，制造方法可以被简化。
参照图7，氧化物半导体层320形成在第一绝缘层102上，第二绝缘层103形成在氧化物半导体层320和第二栅电极220上。当形成氧化物半导体层320时，第二电极420可使用与氧化物半导体层320的材料相同的材料形成在第一电极410上。
氧化物半导体层320位于第一栅电极310上，并且可包括Ga、In、Zn和Sn中的一个或多个以及O。由于氧化物半导体层320在图6中杂质的掺杂工艺之后形成，因此氧化物半导体层320没有掺杂杂质。因此，可防止由氧化物半导体层320上掺杂杂质所导致的第一晶体管(图2的TR1)特性的改变。从而，可减小或防止第一晶体管(图2的TR1)的可靠性的退化。
此外，如上所述，因为用作开关晶体管的第一晶体管(图2的TR1)的有源层形成为氧化物半导体层320，因此可减小来自第一晶体管(图2的TR1)的漏电流并且可实现电容器(图2的C1)的尺寸减小。
第二绝缘层103可形成为包括一个或多个有机绝缘材料，例如，聚酰亚胺、聚酰胺、丙烯酸树脂、苯并环丁烯和/或酚醛树脂。第二绝缘层103可使用例如旋转涂覆方法形成。此外，第二绝缘层103可由无机绝缘材料形成，例如，SiO2、SiNx、Al2O3、CuOx、Tb4O7、Y2O3、Nb2O5和/或Pr2O3。
在另一实施方式中，第二绝缘层103可形成为具有多层结构，其中有机绝缘材料和无机绝缘材料交替地堆叠。
第二绝缘层103可用作其上将形成OLED(参见图2)的阴极电极的平坦化层，或者用作用于保护氧化物半导体层320和第二栅电极220的钝化层。
在第二绝缘层103形成之后，第一绝缘层102和第二绝缘层103被图案化以形成分别暴露源区214和漏区216的第一通孔h1和第二通孔h2。此外，第二绝缘层103被图案化以形成暴露氧化物半导体层320的第三通孔h3和第四通孔h4。
参照图8，第一源电极332和第一漏电极334形成为穿透第二绝缘层103以连接至氧化物半导体层320。第一源电极332和第一漏电极334分别填充在第三通孔h3和第四通孔h4中以建立与氧化物半导体层320的连接。
此外，第二源电极232和第二漏电极234形成为穿透第一绝缘层102和第二绝缘层103以分别连接至源区214和漏区216。第二源电极232和第二漏电极234分别填充在第一通孔h1和第二通孔h2中，并且连接至源区214和漏区216。
第三电极430形成在第二绝缘层103上以与第二电极420重叠。
通过总结和回顾，根据上述实施方式中的一个或多个，像素电路具有用作开关晶体管的第一晶体管TR1。第一晶体管TR1形成为包括氧化物半导体层320以减小漏电流。因此，可减小电容器C1的尺寸。此外，由于氧化物半导体层320没有掺杂杂质，因此可防止由于杂质的掺杂引起的第一晶体管TR1的特性和可靠性的退化。
此外，像素电路的第二晶体管TR2(例如，驱动晶体管)形成为包括掺杂有杂质的多晶硅层以实现优良的电子迁移率。由此，可减小第二晶体管TR2的尺寸。
因此，根据以上实施方式中的一个或多个，具有优良电子迁移率的多晶硅层和具有减小的漏电流的氧化物半导体层可被用作晶体管的有源层。
本文中已经公开了示例性实施方式，并且尽管采用了具体术语，但是这些术语仅仅使用和应被解释成通用和描述性含义，而不是用于限制的目的。除非另有指示，否则在某些情况下正如本领域技术人员将随着本申请的提交而明确的，结合特定实施方式而描述的特征、特性和/或元件可被单独使用或者与结合其他实施方式描述的特征、特性和/或元件结合使用。相应地，本领域技术人员应理解，在不背离如所附权利要求书中记载的本发明的精神和范围的情况下可在形式和细节上进行多种修改。

Claims (17)

1.一种有机发光显示器，包括：
基底；
有机发光器件，位于所述基底上；以及
像素电路，将电流供给至所述有机发光器件，
其中所述像素电路包括位于所述基底上的开关晶体管，驱动晶体管和电容器，所述开关晶体管包括位于第一栅电极和氧化物半导体层之间的第一绝缘层，所述驱动晶体管包括位于有源层上的第二栅电极，以及位于所述有源层和所述第二栅电极之间的所述第一绝缘层，所述电容器包括位于所述基底上的第一电极和位于所述第一电极上的第二电极，其中所述第一绝缘层位于所述第一电极和所述第二电极之间。
2.如权利要求1所述的显示器，其中
所述氧化物半导体层包括镓、铟、锌、铪或锡中的一个或多个以及氧。
3.如权利要求1所述的显示器，其中
所述第一栅电极包括掺杂有杂质的多晶硅层。
4.如权利要求3所述的显示器，其中
所述有源层包括位于沟道区两侧的源区和漏区，所述源区和所述漏区掺杂有杂质。
5.如权利要求4所述的显示器，还包括：
位于所述氧化物半导体层和所述第二栅电极上的第二绝缘层，其中所述开关晶体管包括穿过所述第二绝缘层连接至所述氧化物半导体层的第一源电极和第一漏电极。
6.如权利要求5所述的显示器，其中
所述驱动晶体管包括穿过所述第一绝缘层和所述第二绝缘层分别连接至所述源区和所述漏区的第二源电极和第二漏电极。
7.如权利要求4所述的显示器，其中：
所述第一电极包括所述掺杂有杂质的多晶硅层，以及所述第二电极包括所述氧化物半导体层。
8.如权利要求1所述的显示器，其中所述电容器包括：
位于所述第二电极上的第三电极，
其中第二绝缘层位于所述第二电极和所述第三电极之间。
9.根据权利要求1所述的显示器，其中
所述有机发光器件包括位于阳极电极和阴极电极之间的有机发射层。
10.一种制造有机发光显示器的方法，所述方法包括：
图案化位于基底上的多晶硅层以形成第一栅电极的中间层、有源层的中间层和电容器的第一电极的中间层；
在所述第一栅电极的中间层和所述有源层的中间层上形成第一绝缘层；
在所述有源层的中间层上方的所述第一绝缘层上形成第二栅电极；
对所述第一栅电极的中间层、所述有源层的中间层和所述第一电极的中间层掺杂杂质以形成第一栅电极、有源层和所述电容器的所述第一电极；
在所述第一绝缘层上形成氧化物半导体层，以使所述氧化物半导体层位于所述第一栅电极上，其中形成所述氧化物半导体层还包括形成所述电容器的第二电极以与所述第一电极重叠；
在所述第二栅电极和所述氧化物半导体层上形成第二绝缘层；以及
形成第一源电极和第一漏电极，以穿过所述第二绝缘层连接至所述氧化物半导体层。
11.如权利要求10所述的方法，其中所述有源层包括：
沟道区，与所述第二栅电极重叠，以及
源区和漏区，位于所述沟道区的两侧，所述源区和所述漏区包含杂质。
12.如权利要求11所述的方法，还包括：
形成第二源电极和第二漏电极，以穿过所述第一绝缘层和所述第二绝缘层分别连接至所述源区和所述漏区。
13.根据权利要求10所述的方法，其中：
所述第一栅电极为开关晶体管的栅电极，以及
所述第二栅电极为驱动晶体管的栅电极。
14.如权利要求10所述的方法，其中
所述氧化物半导体层包括镓、铟、锌、铪或锡中的一个或多个以及氧。
15.根据权利要求10所述的方法，还包括：
在所述基底上施加非晶硅层并使所述非晶硅层结晶以形成所述多晶硅层。
16.如权利要求10所述的方法，其中
所述杂质为P型杂质。
17.如权利要求10所述的方法，还包括：
在所述第二绝缘层上形成所述电容器的第三电极以与所述第二电极重叠。
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