CN1047872C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

Info

Publication number
CN1047872C
CN1047872C CN96106746A CN96106746A CN1047872C CN 1047872 C CN1047872 C CN 1047872C CN 96106746 A CN96106746 A CN 96106746A CN 96106746 A CN96106746 A CN 96106746A CN 1047872 C CN1047872 C CN 1047872C
Authority
CN
China
Prior art keywords
silicon
silicon chip
side wall
semiconductor device
sidewall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN96106746A
Other languages
English (en)
Other versions
CN1144401A (zh
Inventor
朴賛光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of CN1144401A publication Critical patent/CN1144401A/zh
Application granted granted Critical
Publication of CN1047872C publication Critical patent/CN1047872C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种半导体器件及其制造方法，其中在第二硅基片的边缘部分上形成厚的侧壁氧化膜或多晶硅层。在氧化膜或多晶硅层的侧壁上，有效半导体基片在其边缘部分的厚度增加了，由此在该边缘部分获得提高的阈值电压。即，通过实施侧壁氧化膜的形成来防止半导体器件栅氧化膜直接形成在有效硅基片的每侧壁上。结果，可防止因由有效半导体基片在其边缘部分的厚度减小而导致阈值电压下降所引起的电性能的下降。

Description

半导体器件及其制造方法
本发明涉及具有绝缘层上硅(SOI)结构半导体器件及其制造方法，特别是涉及制造一种半导体器件的方法，在该半导体器件中，在绝缘膜的边缘形成侧壁氧化物膜或多晶硅层，该绝缘膜适用于把半导体器件的有效半导体基片的侧壁同半导体器件的栅氧化膜相绝缘。
在半导体器件的制造中，SOI结构的形成涉及在相邻元件间获得绝缘，由此获得优良的电特性。通过在下硅基片上形成硅氧化膜作为绝缘层和在硅氧化膜上形成另一个硅基片(将被用作为有效基片)，例如单晶硅层来制成SOI结构。
参照图1A和1B描述现有的SOI结构。
图1A是表示具有SOI结构的金属氧化物硅场效应晶体管(MOSFET)的构型的示图。在图1A中表示出了用于硅基片(未示出)上的有源区1和栅电极2的掩模的各个位置。
图1B是沿图1A的I—I线剖开的截面图。硅氧化膜4淀积在硅基片3上。在硅氧化膜4上形成具有梯形截面结构。在生成的结构的所需部分上顺序形成栅氧化膜6和栅电极7。
如图1B所示，第二硅基片5具有倾斜结构，其中，其在有源区边缘处的厚度小于其在有源区中部的厚度。由于这种结构，耗尽区被限于第二硅基片5的厚度上。结果，耗尽块的电荷QB受到第二硅基片5的厚度的限制，由此减小了半导体器件的阀值电压，如下列等式所表示：
VT＝VFB＋QB/COX……(1)
COX＝εOX/tOX
其中，VT代表阈值电压，VFB代表平带电压，QB代表块电荷，COX代表氧化膜的电容，εOX代表氧化膜的介电常数，tOX代表栅氧化膜的厚度。
等式(1)表示：即使当在该部分上的掺杂率升高也不可能提高在第二硅基片5的下边缘部8处的阈值电压。这意味着，在第二硅基片5的中部和边缘部分之间在阈值电压上存在差值。如图2所示，当漏电流随着栅电压的变化而变化时，漏电流特性就会存在转折点。其结果，就难于控制具有SOI结构的半导体器件的阈值电压。进而，SOI元件的特性取于第二硅基片的边缘形状。这引起了半导体器件的特性上的很大变化。
因此，本发明的目的就是为了解决上述问题而提供一种半导体器件及其制造方法，其中在第二硅基片的边缘部分形成厚的侧壁氧化膜或多晶硅膜，由此提高该部分的阈值电压。
根据本发明的一个方案，具有绝缘层上硅结构的半导体器件包括：第一硅基片；在第一硅基片上形成的第一硅氧化膜；具有形成在有源区的第一硅氧化膜上的梯形截面结构的第二硅基片；在第二硅基片的每个侧壁上形成的侧壁绝缘膜；在第二硅基片的需要区域形成栅氧化膜；在栅氧化膜上形成的栅电极；分别被确定在第二基片的不同栅极相重叠的部分上的源/漏掺杂扩散区。
侧壁绝缘膜由掺入了具有与第二硅基片的相反的导电类型的杂质离子的材料所制成。掺杂区可以被确定在第二硅基片的侧壁与侧壁绝缘膜之间。侧壁多晶硅层也可以置入在第二硅基片的侧壁与侧壁绝缘膜之间。
根据本发明的另一个方案，具有绝缘层上硅结构的半导体器件包括：第一硅基片；在第一硅基片上形成的第一硅氧化膜；具有形成在有源区的第一硅氧化膜上的梯形截面结构的第二硅基片；在第二硅基片的每个侧壁上形成的侧壁氧化膜；在侧壁氧化膜上形成的侧壁多晶硅膜，该侧壁多晶硅膜具有与第二硅基片相反的导电类型；在第二硅基片的所需部分上形成的栅氧化膜；在栅氧化膜上形成的栅电极；分别确定在第二基片的不与栅电极相重叠的部分上的源/漏掺杂扩散区。
根据本发明的另一个方案，用于制造具有绝缘层上硅结构的半导体器件的方法包括下列步骤：在第一硅基片上淀积第一硅氧化膜，然后在第一硅氧化膜上淀积硅基片层；使硅基片层构图，由此形成具有梯形截面结构并布置在有源区的第一硅氧化膜上的第二硅基片；在第二硅基片的每个侧壁上形成掺入了具有不同于第二硅基片的导电类型的杂质离子的侧壁绝缘膜；使侧壁绝缘膜退火以把掺在侧壁绝缘膜中的杂质离子扩散到第二硅基片的侧壁中，由此形成掺杂区；依次在第二硅基片的所需部分上形成栅氧化膜和栅电极；把高浓度杂质离子注入第二基片的不与栅电极重叠的部分，由此形成源/漏掺杂扩散区。
根据本发明的又一个方案，用于制造具有绝缘层上硅结构的半导体的方法包括下列步骤：在第一硅基片上淀积第一硅氧化膜，然后在第一硅氧化膜上淀积硅基片层，对硅基片层构图，由此形成具有梯形截面结构并布置在有源区的第一硅氧化膜上的第二硅基片；在第二硅基片的形成之后在所得到的生成结构上淀积掺入了杂质离子的绝缘膜和多晶硅层；各向异性地刻蚀多晶硅层和绝缘膜，由此形成分别形成在第二硅基片的相对侧壁上的侧壁氧化膜和侧壁多晶硅层；依次在第二硅基片的所需部分上形成栅氧化膜和栅电极；把高浓度的杂质离子注入第二基片的不与栅电极相重叠的部分，由此形成源/漏掺杂扩散区。
侧壁多晶硅层由掺入了具有与第二硅基片相反导电类型的杂质离子的材料制成。淀积掺杂多晶硅层的步骤可以由在绝缘膜上淀积未掺杂多晶硅层并然后把杂质离子注入未掺杂多晶硅层中的步骤所构成。
根据本发明，由在第二硅基片的边缘上厚厚地形成了侧壁氧化膜或多晶硅层，就能在第二硅基片的边缘上获得提高的阈值电压。
下面通过参照附图对实施例的描述可以更清楚地了解本发明其他目的和方案。
图1A是表示具有现有SOI结构的MOSFET的构型的示图；
图1B是沿图1A的I—I线剖的截面图；
图2是表示具有现有SOI结构的MOSFET的工作特性的曲线图；
图3A至3E表示根据本发明第一实施例的制造具有SOI结构的MOSFET的方法的连续步骤的截面图；
图4是沿图1的II—III线剖的截面图，但表示的是根据图3A至3E的方法而制造的MOSFET；
图5是类似于图4的示图，表示根据本发明的第二实施例的具有SOI结构的MOSFET；
图6是类似于图4的示图，表示根据本发明的第二实施例的具有SOI结构的MOSFET。
图3A至3E和图4表示根据本发明第一实施例的制造具有SOI结构的MOSFET的方法。
根据该方法，首先制备第一硅基片11，然后如图3A所示，依次形成第一硅氧化膜12和第二硅基片13。
然后使用可以是图1A所示的有效区掩模的一个掩模来各向异性地刻蚀第二硅基片13，以使其成为具有图3B所示的倾斜侧壁的梯形图形。
然后在图3B所示的生成结构上淀积第二硅氧化膜18，如图3C所示那样。
以后，各向异性地刻蚀第二硅氧化膜18，由此分别在第二硅基片13的倾斜侧壁上形成侧壁硅氧化膜16，以便于在第二硅基片12的每个侧壁的边缘获得提高的阈值电压，如图3D所示。
然后如图3E所示，在生成结构的所需部分上形成栅氧化膜14。再在栅氧化膜14上形成栅电极15。
使用栅氧化膜14和栅电极15作为一个掩模，杂质离子被高浓度地注入到第二硅基片13的不与栅电极15重叠的部分中，由此在第二硅基片13中形成源/漏掺杂扩散区17。图4表示出生成结构。图4是沿图1A的II—III线剖的截面图，而图3E是沿图1A的I—I线剖的截面图。
该结构分别在使用绝缘膜的第二硅基片的边缘上具有侧壁膜。因此，可以通过增加绝缘膜的厚度来获得提高的阈值电压，这可以从等式(2)中看出(在等式(2)中，tOX＝cOX·εOX)。
图5表示根据本发明的第二实施例的具有SOI结构的MOSFET。
如图5所示，通过在第一硅基片21上首先淀积第一硅氧化膜22而形成该结构。具有梯形截面结构的第二硅基片23然后形成在第一硅氧化膜22上。使用例如磷硅酸玻璃(PSG)或硼硅酸玻璃(BSG)的材料，在第二硅基片23的每个侧壁上形成侧壁绝缘膜29。为了在第二硅基片23的边缘上获得提高的阈值电压，则以800℃至1，100℃的温度范围来使侧壁绝缘膜29退火。通过退火，在侧壁绝缘膜29中的杂质离子被扩散到第二硅基片23的侧壁中，由此，形成的掺杂区30分别沿着第二硅基片23的侧壁延伸到所需深度。然后在生成结构的所需部分上形成栅氧化膜24。再在栅氧化膜24上形成栅电极25。
根据这实施例，侧壁绝缘膜29具有与第二硅基片23相反的导电类型。其退火步骤以同栅电极25形成后的用于源/漏掺杂扩散区的退火步骤同时进行。
另一方面，图6表示根据本发明第三实施例的具有另一个SOI结构的MOSFET。
如图6所示，通过在第一硅基片31上首先淀积第一硅氧化膜32而形成该结构。然后在第一硅氧化膜32上形成具有梯形截面结构的第二硅基片33。之后，在第二硅基片33上依次淀积掺入了具有与第二硅基片33相反导电类型的杂质离子的氧化膜和多晶硅层。接着，以在第二硅基片33的两侧壁上仅留下其的方式来非均质地刻蚀氧化膜和多晶硅层。结果，在第二硅基片33的两侧壁上分别形成侧壁氧化膜40和侧壁多晶硅层39。然后在生成结构的所需部分上形成栅氧化膜34。再在栅氧化膜34上形成栅电极35。
可以使用未掺杂的多晶硅层来代替该掺杂的多晶硅层。在此情况下，将接着把杂质离子掺入未掺杂的多晶硅层。
如从上述所了解的，根据本发明在第二硅基片上厚厚地形成侧壁氧化膜或侧壁多晶硅层。因此，能在第二硅基片的边缘获得提高的阈值电压。换句话说，实现侧壁氧化膜的形成是为了防止栅氧化膜直接形成在第二硅基片的每个侧壁上。结果，就能防止因阈值电压的下降而造成的电特性的下降。
虽然为了说明而描述本发明的优选实施例，但本领域普通技术人员在不背离权利要求所描述的内容及范围的条件下可以进行各种改型、添加和代换。

Claims (10)

1.一种具有绝缘层上硅结构的半导体器件，包括：
第一硅基片；
在第一硅基片上形成的第一硅氧化膜；
具有形成在有源区的第一硅氧化膜上的梯形截面结构的第二硅基片；
该半导体器件的特征在于：
在第二硅基片的每个侧壁上形成的侧壁绝缘膜；
在第二硅基片的所需部分上形成的栅氧化膜；
在栅氧化膜上形成的栅电极；和
分别确定在第二基片的不与栅电极重叠的部分中的源/漏掺杂扩散区。
2.根据权利要求1的半导体器件，其特征在于侧壁绝缘膜由掺入了具有与第二硅基片相反导电类型的杂质离子的材料所制成。
3.根据权利要求1的半导体器件，其特征在于进一步包括确定在第二硅基片的侧壁和侧壁绝缘膜之间的掺杂区。
4.根据权利要求1的半导体器件，其特征在于进一步包括：置入第二硅基片的侧壁和侧壁绝缘膜之间的侧壁多晶硅层。
5.根据权利要求1的半导体器件，其特征在于还包括形成在侧壁绝缘膜上的侧壁多晶硅膜，该侧壁多晶硅膜的导电类型与第二硅基片的导电类型相反。
6.用于制造具有绝缘层上硅结构的半导体器件的方法，包括下列步骤：
在第一硅基片上淀积第一硅氧化膜，然后在第一硅氧化膜上淀积硅基片层；
使硅基片层构图，由此形成具有梯形截面结构并布置在有源区的第一硅氧化膜上的第二硅基片；
在第二硅基片的每个侧壁上形成掺入了具有与第二硅基片不同导电类型的杂质离子的侧壁绝缘膜；
以把掺在侧壁绝缘膜中的杂质离子扩散到第二硅基片的侧壁中的方式使侧壁绝缘膜退火，由此形成掺杂区；
依次在第二硅基片的所需部分上形成栅氧化膜和栅电极；以及
在第二基片的不与栅电极重叠的部分中注入高浓度的杂质离子，由此形成源/漏掺杂扩散区。
7.根据权利要求6的用于制造具有绝缘层上硅结构的半导体器件的方法，还包括以下步骤：在侧壁绝缘膜上淀积掺杂的侧壁多晶硅膜，掺入的杂质离子的导电类型与第二硅基片的导电类型相反。
8.根据权利要求6的用于制造具有绝缘层上硅结构的半导体器件的方法，还包括以下步骤：在侧壁绝缘膜上淀积未掺杂的侧壁多晶硅膜；将其导电类型与第二硅基片的导电类型相反的杂质离子掺入到未掺杂的多晶硅膜中。
9.根据权利要求6的用于制造具有绝缘层上硅结构的半导体器件地，其中退火步骤在800℃到1000℃的温度范围内进行。
10.根据权利要求6的用于制造具有绝缘层上硅结构的半导体器件的方法，其中用于形成掺杂区的退火步骤可以与用于形成源/漏杂质扩散区的退火步骤同时进行。
CN96106746A 1995-06-30 1996-07-01 半导体器件及其制造方法 Expired - Fee Related CN1047872C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019950018864A KR0164079B1 (ko) 1995-06-30 1995-06-30 반도체 소자 및 그 제조방법
KR18864/95 1995-06-30

Publications (2)

Publication Number Publication Date
CN1144401A CN1144401A (zh) 1997-03-05
CN1047872C true CN1047872C (zh) 1999-12-29

Family

ID=19419285

Family Applications (1)

Application Number Title Priority Date Filing Date
CN96106746A Expired - Fee Related CN1047872C (zh) 1995-06-30 1996-07-01 半导体器件及其制造方法

Country Status (4)

Country Link
US (2) US5773330A (zh)
JP (1) JPH0923010A (zh)
KR (1) KR0164079B1 (zh)
CN (1) CN1047872C (zh)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766424A (ja) * 1993-08-20 1995-03-10 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
US6909114B1 (en) * 1998-11-17 2005-06-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having LDD regions
US6501098B2 (en) 1998-11-25 2002-12-31 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device
US6365917B1 (en) * 1998-11-25 2002-04-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
EP2264771A3 (en) * 1998-12-03 2015-04-29 Semiconductor Energy Laboratory Co., Ltd. MOS thin film transistor and method of fabricating same
US6469317B1 (en) 1998-12-18 2002-10-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US6524895B2 (en) 1998-12-25 2003-02-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
US6777254B1 (en) 1999-07-06 2004-08-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
KR100331559B1 (ko) * 1999-10-22 2002-04-06 윤종용 소이 구조의 반도체 소자 및 그 제조방법
US7525165B2 (en) * 2000-04-17 2009-04-28 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and manufacturing method thereof
US6562671B2 (en) * 2000-09-22 2003-05-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor display device and manufacturing method thereof
US8067772B2 (en) 2006-12-05 2011-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7968884B2 (en) * 2006-12-05 2011-06-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US7851277B2 (en) 2006-12-05 2010-12-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing same
US8581260B2 (en) * 2007-02-22 2013-11-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including a memory
CN101577290B (zh) * 2008-05-06 2010-12-15 上海华虹Nec电子有限公司 顶部带有硬质掩膜层的多晶硅栅极结构的制备方法
KR101836067B1 (ko) * 2009-12-21 2018-03-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 박막 트랜지스터와 그 제작 방법
TWI535028B (zh) * 2009-12-21 2016-05-21 半導體能源研究所股份有限公司 薄膜電晶體
US8476744B2 (en) 2009-12-28 2013-07-02 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor with channel including microcrystalline and amorphous semiconductor regions
US9230826B2 (en) 2010-08-26 2016-01-05 Semiconductor Energy Laboratory Co., Ltd. Etching method using mixed gas and method for manufacturing semiconductor device
US8704230B2 (en) 2010-08-26 2014-04-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4727044A (en) * 1984-05-18 1988-02-23 Semiconductor Energy Laboratory Co., Ltd. Method of making a thin film transistor with laser recrystallized source and drain

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4263709A (en) * 1977-11-17 1981-04-28 Rca Corporation Planar semiconductor devices and method of making the same
JPS59155167A (ja) * 1983-02-24 1984-09-04 Toshiba Corp 半導体装置の製造方法
JPS59130465A (ja) * 1983-11-28 1984-07-27 Hitachi Ltd Ｍｉｓ半導体装置の製造方法
JPS60173875A (ja) * 1984-02-20 1985-09-07 Toshiba Corp 半導体装置の製造方法
GB2211022B (en) * 1987-10-09 1991-10-09 Marconi Electronic Devices A semiconductor device and a process for making the device
US5028564A (en) * 1989-04-27 1991-07-02 Chang Chen Chi P Edge doping processes for mesa structures in SOS and SOI devices
FR2651068B1 (fr) * 1989-08-16 1994-06-10 France Etat Procede de fabrication de transistor mos mesa de type silicium sur isolant
JPH03169025A (ja) * 1989-11-29 1991-07-22 Mitsubishi Electric Corp 半導体装置の製造方法
US5008723A (en) * 1989-12-29 1991-04-16 Kopin Corporation MOS thin film transistor
US5039621A (en) * 1990-06-08 1991-08-13 Texas Instruments Incorporated Semiconductor over insulator mesa and method of forming the same
US5304831A (en) * 1990-12-21 1994-04-19 Siliconix Incorporated Low on-resistance power MOS technology
US5185280A (en) * 1991-01-29 1993-02-09 Texas Instruments Incorporated Method of fabricating a soi transistor with pocket implant and body-to-source (bts) contact
JP3092761B2 (ja) * 1991-12-02 2000-09-25 キヤノン株式会社 画像表示装置及びその製造方法
US5394358A (en) * 1994-03-28 1995-02-28 Vlsi Technology, Inc. SRAM memory cell with tri-level local interconnect
US5482871A (en) * 1994-04-15 1996-01-09 Texas Instruments Incorporated Method for forming a mesa-isolated SOI transistor having a split-process polysilicon gate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4727044A (en) * 1984-05-18 1988-02-23 Semiconductor Energy Laboratory Co., Ltd. Method of making a thin film transistor with laser recrystallized source and drain

Also Published As

Publication number Publication date
US6104065A (en) 2000-08-15
JPH0923010A (ja) 1997-01-21
KR0164079B1 (ko) 1998-12-01
CN1144401A (zh) 1997-03-05
KR970004078A (ko) 1997-01-29
US5773330A (en) 1998-06-30

Similar Documents

Publication Publication Date Title
CN1047872C (zh) 半导体器件及其制造方法
CN1280919C (zh) 功率mos场效应管及其制造方法
CN1171318C (zh) 具有低导通电阻的高压功率金属氧化物半导体场效应晶体管
CN1041471C (zh) 半导体器件及其制造方法
CN1128473C (zh) 通过栅形成的绝缘体上硅互补金属氧化物半导体体接触
KR100237279B1 (ko) Misfet, 상보형misfet 및 그 제조방법
CN100359701C (zh) 具有改进的驱动电流特性的晶体管及其制作方法
CN1695252A (zh) 具有增加的导通电阻的沟槽mosfet器件
CN1152419C (zh) 功率半导体器件及其制造方法
KR19990022910A (ko) 반도체장치의 제작
CN1507057A (zh) 多重栅极结构及其制造方法
CN1449587A (zh) 带放大栅极氧化物完整结构的半导体沟槽器件
CN1726597A (zh) 垂直绝缘栅晶体管及其制作方法
CN1094654C (zh) 隔离栅半导体器件及其制造方法
CN1274028C (zh) 具有减小导通电阻的双扩散场效应晶体管
CN1093687C (zh) 晶体管及其制造方法
KR20020038955A (ko) 전력 트랜지스터, 메모리 디바이스 및 반도체 디바이스제조 방법
CN1132238C (zh) 半导体元件及其制造方法
CN1949541A (zh) 微电子器件和制造微电子器件的方法
CN1879224A (zh) 低能量多沟道全耗尽量子井互补式金氧半导体场效晶体管
CN1211084A (zh) 采用微掺杂漏极结构的半导体器件及其制备方法
CN1148274A (zh) 沟槽型dmos晶体管及其制造方法
CN1592960A (zh) 在半导体衬底中形成窄沟槽的方法
CN1091948C (zh) Mos器件及其制造方法
CN1076520C (zh) 半导体器件及其制造方法

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 19991229

Termination date: 20130701