CN104752420B - 显示设备的抗静电装置及其制造方法 - Google Patents
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Abstract
公开了一种显示设备的抗静电装置及其制造方法,所述抗静电装置具有高静电放电(ESD)速度,并且降低了功耗。所述抗静电装置包括有源层由氧化物形成的第一开关薄膜晶体管(TFT)、有源层由氧化物形成的第二开关TFT、以及有源层由非晶硅形成的均衡器TFT。
Description
本申请要求2013年12月26日提交的韩国专利申请号10-2013-0164464的优先权,在此以引用的方式包含其全部内容
技术领域
本发明涉及显示设备的抗静电装置及其制造方法,其具有高静电放电(ESD)速度,并降低功耗。
背景技术
随着如移动通信终端、智能电话、平板电脑、笔记本电脑等各种便携式电子设备的发展,可应用于这些便携式电子设备的平板显示(FPD)设备的需求正在增加。
已经开发了液晶显示(LCD)设备、等离子显示面板(PDP)、场发射显示(FED)设备、发光二极管显示设备、有机发光显示设备等,作为FPD设备。
图1是常规LCD设备的示意图,图2是现有技术的抗静电装置的等效电路图。
参考图1和2,LCD设备包括液晶面板10,其中多个像素设置成矩阵型以显示图像;驱动电路单元(未示出),提供信号和用于驱动液晶面板10的电源。
在LCD设备中,当静电被产生并输入至像素时,图像无法正常显示,像素和线路可能会受损。因此,抗静电装置20被并行连接到数据线DL的输入端和栅线GL的输入端。
当产生静电时,抗静电装置20分散静电以保护有源区的像素。当产生高电压静电时,抗静电装置20首先感测到静电信号,并且由于多个内部薄膜晶体管(TFT)中每一个TFT的绝缘层被损坏,所以抗静电装置20保护形成在有源区中的像素。
现有技术的抗静电装置20包括两个开关TFT 22和24,以及一个均衡器TFT 26。
因为栅极以二极管连接方式连接到源极,所以第一开关TFT 22和第二开关TFT 24作为二极管来工作,并防止电流在两个方向上流动。
在现有技术的抗静电装置20中,第一开关TFT 22、第二开关TFT 24以及均衡器TFT26全都由一种有源层形成。
当第一开关TFT 22、第二开关TFT 24以及均衡器TFT 26中的每一TFT都是氧化物半导体TFT时,基于静电流入的工作速度高。但另一方面,在氧化物半导体TFT中,大量电流被泄漏,因此,功耗增加。
当第一开关TFT 22、第二开关TFT 24以及均衡器TFT 26中的每一TFT都是非晶硅(a-Si)TFT时,泄漏电流量小。但另一方面,在a-Si TFT中,基于静电流入的响应时间慢,因此,无法快速地阻止静电。
发明内容
因此,本发明旨在提供一种显示设备的抗静电装置及其制造方法,基本上克服现有技术的局限和不足导致的一个或多个问题。
本发明的一个方面旨在提供一种抗静电装置,其中通过使用对静电脉冲作出快速响应的开关TFT,提高ESD性能。
本发明的另一方面旨在提供一种抗静电装置,其中通过使用泄露电流数量小的均衡器TFT,降低功耗。
本发明的另一方面旨在提供一种抗静电装置的制造方法,所述抗静电装置包括对静电脉冲作出快速响应的开关TFT。
本发明的另一方面旨在提供一种抗静电装置的制造方法,所述抗静电装置包括泄露电流数量小的均衡器TFT。
除了本发明的上述目标之外,下面对本发明的其它特征和优点进行描述,本领域技术人员从下面的描述可以清楚地理解这些特征和优点。
本发明附加的优点和特征一部分在下面的说明中提出,一部分本领域技术人员在审查时可以明显看出,或者在实施本发明时得知。本发明的目标和其它优点可以通过说明书和权利要求以及附图中特别指出的结构实现和获得。
为了实现这些和其它的优点,根据本发明的目的,正如在此具体和广义地描述的那样,提供一种显示设备的抗静电装置,该抗静电装置包括:第一开关薄膜晶体管(TFT),其中有源层由氧化物形成;第二开关TFT,其中有源层由氧化物形成,均衡器TFT,其中有源层由非晶硅形成。
根据本发明的另一方面,提供一种制造抗静电装置的制造方法,所述抗静电装置包括多个开关薄膜晶体管(TFT),并且包括均衡器TFT,所述方法包括:在基板上形成的缓冲层上,用非晶硅形成光屏蔽部;形成第一栅绝缘层以覆盖光屏蔽部;在第一栅绝缘层上的开关TFT区中,用氧化物形成的有源层;形成第二栅绝缘层以覆盖有源层;在第二栅绝缘层上形成多个开关TFT中的每一TFT的栅极,在第一栅绝缘层上的均衡器TFT区中形成均衡器TFT的栅极;形成层间绝缘部以覆盖多个开关TFT中的每一TFT的栅极以及均衡器TFT的栅极;对层间绝缘部的一部分进行蚀刻以形成多个接触孔,所述接触孔暴露有源层的顶部和光屏蔽部的顶部;形成多个开关TFT中的每一TFT的将要与有源层相连的源极和漏极,形成均衡器TFT的将要与光屏蔽部相连的源极和漏极;形成钝化层以覆盖多个开关TFT和均衡器TFT。
应该理解的是,上述对本发明的一般性描述和下面的详细说明是示例性的和解释性的,旨在对要求保护的本发明作进一步说明。
附图说明
附图用于进一步理解本发明,包含在本申请中,构成本申请的一部分,图解发明的实施例,并且和说明书一起解释本发明的原理。图中:
图1是常规LCD设备的示意图;
图2是现有技术的抗静电装置的等效电路图;
图3是根据本发明实施例的抗静电装置的等效电路图;
图4是根据本发明实施例的抗静电装置的平面布置图;
图5是开关TFT的沿图4的线A1-A2的横截面图,以及均衡器TFT的沿图4的线B1-B2的横截面图;
图6是a-Si TFT和氧化物TFT中的每一TFT的直流(DC)特性图;
图7是a-Si TFT和氧化物TFT中的每一TFT的电子迁移率特性图;以及
图8-14是根据本发明实施例的抗静电装置的图形。
具体实施方式
现在详细参考本发明的实施方式,其例子在附图中示出。只要可能,对于相同或者相似的部件在附图中采用同一附图标记。
在说明书中,在给每个附图中的元件添加附图标记时,应该注意的是,只要有可能,采用已经用于指代其它附图中的同一元件的同样的附图标记。
说明书中的术语应该如下理解。
单数形式“一个”也包括复数形式,除非上下文清楚地指出。术语“第一”、“第二”用于将一个元件和另一个元件区分开来。这些元件不应该受到这些术语的限制。
在对本发明的实施例进行说明时,当结构(例如电极、线路、配线、层或者接点)被描述为形成在另一结构的上部/下部或者在另一结构上/下时,这种描述应该被理解为包括该结构彼此接触的情形和第三结构设置在其间的情形。
术语“上部/下部”和“上/下”用于参考附图描述根据本发明实施例的具有内置接触传感器的LCD设备及其制造方法。因此,在生产过程中和在生产结束之后,术语“上部/下部”和“上/下”在结构上可能会不同。
下面,参考附图对根据本发明实施例的抗静电装置进行详细描述。本发明提供一种抗静电装置及其驱动方法,该抗静电装置包括具有快速响应时间的多个开关TFT和泄漏电流数量小的均衡器TFT。
图3是根据本发明实施例的抗静电装置的等效电路图。
参考图3,根据本发明实施例的抗静电装置100包括第一开关TFT 110、第二开关TFT 120和均衡器TFT 130。
因为栅极以二极管连接方式连接到源极,所以第一开关TFT 110和第二开关TFT120作为二极管来工作,电流仅仅在一个方向上流动。
这里,第一开关TFT 110和第二开关TFT 120由对信号具有快速响应时间的氧化物半导体TFT形成,因而当静电流入线路时,第一开关TFT 110和第二开关TFT 120对静电脉冲作出快速响应。均衡器TFT 130由a-Si TFT形成,a-Si TFT的工作速度比氧化物半导体TFT慢,但具有优秀的漏电流特性。
第一开关TFT 110的源极连接到被施加数据电压Vdata的数据线,漏极连接到第二开关TFT 120的漏极和均衡器TFT 130的栅极。
第二开关TFT 120的源极连接到低电平电源Vss,漏极连接到第一开关TFT 110的漏极和均衡器TFT 130的栅极。
均衡器TFT 130的源极连接到第一开关TFT 110的源极,漏极连接到第二开关TFT120的源极。均衡器TFT 130的栅极连接到第一开关TFT 110和第二开关TFT 120的漏极。
当没有将高电压施加至第一开关TFT 110、第二开关TFT 120和均衡器TFT 130时,第一开关TFT 110、第二开关TFT 120和均衡器TFT 130截止。
当将高电压施加至第一开关TFT 110时,第一开关TFT 110导通,并将高电压分散至后端(与均衡器TFT 130的栅极相连的端子)。当将高电压施加至第二开关TFT 120时,第二开关TFT 120导通,并将高电压分散至后端(与均衡器TFT 130的栅极相连的端子)。
第一开关TFT 110和第二开关TFT 120导通,并且当将高电压施加至与均衡器TFT130的栅极相连的端子时,均衡器TFT 130导通。因此,高电压被分散到第一开关TFT 110和第二开关TFT 120的源极。即均衡器TFT 130在两个方向上分散当均衡器TFT 130导通时施加的高电压。当均衡器TFT 130将高电压分散至后端(与第一开关TFT 110和第二开关TFT120的源极相连的端子)时,第一开关TFT 110、第二开关TFT 120和均衡器TFT 130截止。
在根据本发明实施例的抗静电装置100中,第一开关TFT 110和第二开关TFT 120分别设置在均衡器TFT 130的两端。因此,线路中产生的正(+)静电和负(-)静电全部被释放,因此能够防止高电压静电流入有源区。
图4是根据本发明实施例的抗静电装置的平面布置图。图5是开关TFT的沿图4的线A1-A2的横截面图,以及均衡器TFT的沿图4的线B1-B2的横截面图。
参考图4和5,对第一开关TFT 110的结构和第二开关TFT 120的结构进行详细描述。
开关TFT
第一开关TFT 110和第二开关TFT 120形成为顶栅共面TFT结构。第一开关TFT 110和第二开关TFT 120具有相同的结构,因此以第一开关TFT 110的结构为例进行说明。
在基板上形成缓冲层101,在缓冲层101上形成光屏蔽部102。这里,光屏蔽部102由a-Si形成。
形成第一栅绝缘层(G11)103,以覆盖光屏蔽部102。在这种情况下,第一栅绝缘层(G11)103可以形成为与有源区中形成的TFT的栅绝缘层相同的厚度。
这里,第一栅绝缘层(G11)103由SiO2或者SiNx形成,厚度为 另一个例子是,可利用化学气相沉积(CVD)工艺,通过沉积正硅酸乙酯(TEOS)或者中间温度氧化物(MTO)形成第一栅绝缘层(G11)103。
在第一栅绝缘层(G11)103上形成有源层104。在与光屏蔽部102重叠的区域中形成有源层104。
这里,有源层104由氧化物半导体材料形成,如氧化铟锌(IZO)或者氧化铟镓锌(IGZO)。有源层104也可以由金属氧化物形成。
在有源层104上形成第二栅绝缘层(G12)105。在这种情况下,第二栅绝缘层(G12)105以比有源区中形成的TFT的栅绝缘层薄的厚度形成。因此,与有源区中形成的像素TFT相比,第一开关TFT 110和第二开关TFT 120具有更快的开关速度。
这里,第二栅绝缘层(G12)105由SiO2或者SiNx形成,厚度为 另一个例子是,可利用CVD工艺,通过沉积TEOS或MTO形成第二栅绝缘层(G12)105。
在第二栅绝缘层(G12)105上形成栅极106。形成层间绝缘部(ILD)107,以覆盖栅极106。对层间绝缘部107的一部分进行蚀刻以暴露有源层104,从而形成源极/漏极的接触孔。
在层间绝缘部107上形成与有源层104相连的源极/漏极108。在层间绝缘部107上面的一侧形成源极S,以将其连接至有源层104。在层间绝缘部107上面的另一侧形成漏极D,以将其连接至有源层104。
这里,源极/漏极108可以由MoTi形成,但并不局限于此。源极S和漏极D可以由铝(Al)、银(Ag)、金(Au)、镍(Ni)、锆(Zr)、镉(Cd)、铪(Hf)、钨(W)、钽(Ta)、铬(Cr)形成,或者由它们的合金形成。
如上所述,第一开关TFT 110被配置为具有有源层104、第二栅绝缘层(G12)105、源极S和漏极D。形成钝化层(PAS)109,以覆盖第一开关TFT 110。
均衡器TFT
接下来,详细描述均衡器TFT 130的结构。
在基板上形成缓冲层101,在缓冲层101上形成光屏蔽部102。
这里,光屏蔽部102由a-Si形成。均衡器TFT 130利用由a-Si形成的光屏蔽部102作为有源层。
形成第一栅绝缘层(G11)103,以覆盖光屏蔽部102。
这里,第一栅绝缘层(G11)103由SiO2或者SiNx形成,厚度为 另一个例子是,可利用CVD工艺,通过沉积TEOS或MTO形成第一栅绝缘层(G11)103。
在第一栅绝缘层(G11)103上形成栅极106。形成层间绝缘部(ILD)107,以覆盖栅极106。对层间绝缘部107的一部分进行蚀刻以暴露有源层104,从而形成源极/漏极的接触孔。
在层间绝缘部107上形成与有源层104相连的源极/漏极108。在层间绝缘部107上面的一侧形成源极S,以将其连接至有源层104。在层间绝缘部107上面的另一侧形成漏极D,以将其连接至有源层104。
这里,源极/漏极108可以由MoTi形成,但并不局限于此。源极S和漏极D可以由铝(Al)、银(Ag)、金(Au)、镍(Ni)、锆(Zr)、镉(Cd)、铪(Hf)、钨(W)、钽(Ta)、铬(Cr)形成,或者由它们的合金形成。
如上所述,均衡器TFT 130被配置为具有由a-Si形成且用作有源层的光屏蔽部102、第一栅绝缘层(G11)103、源极S和漏极D。形成钝化层(PAS)109,以覆盖第一开关TFT110。
图6是a-Si TFT和氧化物TFT中的每一TFT的直流(DC)特性图,图7是a-Si TFT和氧化物TFT中的每一TFT的电子迁移率特性图。
参考图6和7,a-Si TFT具有0.24cm2/V·s的慢电子迁移率。但是,a-SiTFT的泄漏电流量小。
而另一方面,氧化物TFT具有10-30cm2/V·s的快电子迁移率。但是,氧化物TFT的泄漏电流量大。
在根据本发明实施例的抗静电装置中,第一TFT 110和第二开关TFT 120的有源层以及均衡器TFT 130的有源层采用不同的材料(即,氧化物和a-Si),因此能够有效避免基于静电的电流。
在根据本发明实施例的抗静电装置中,将氧化物半导体应用于第一TFT110和第二开关TFT 120的有源层,所以第一TFT 110和第二开关TFT 120对静电脉冲作出快速响应。此外,将具有优良漏电流特性的a-Si应用于均衡器TFT 130的有源层。
即,由具有快速工作速度的氧化物TFT来形成应当对静电脉冲作出灵敏相应的第一和第二开关TFT 110和120,因此提高了ESD性能。此外,由a-SiTFT形成需要漏电流量很小的均衡器TFT 130,因此能够降低功耗。
图8-14是根据本发明实施例的抗静电装置的图形。
参考图8,在基板上形成缓冲层101,在缓冲层101上沉积a-Si。
随后,通过执行利用第一掩模的光刻工艺和蚀刻工艺,对沉积的a-Si进行构图。通过对a-Si构图,在开关TFT区和均衡器TFT区形成光屏蔽部102。
随后,参考图9,形成第一栅绝缘层(G11)103,以覆盖在开关TFT区和均衡器TFT区中形成的光屏蔽部102。
这里,第一栅绝缘层(G11)103由SiO2或者SiNx形成,厚度为 。另一个例子是,可利用CVD工艺,通过沉积TEOS或MTO形成第一栅绝缘层(G11)103。
随后,在第一栅绝缘层(G11)103上的开关TFT区中形成有源层104。有源层104形成在与光屏蔽部102重叠的区域中。
这里,有源层104由氧化物半导体材料形成,如氧化铟锌(IZO)或者氧化铟镓锌(IGZO)。有源层104也可以由金属氧化物形成。
在第一栅绝缘层(G11)103上沉积氧化物半导体材料,然后,通过执行利用第二掩模的光刻工艺和蚀刻工艺,形成有源层104。
随后,参考图10,在整个基板上涂布SiO2或SiNx,然后,通过执行利用第三掩模的光刻工艺和蚀刻工艺,在开关TFT区中的有源层104上形成第二栅绝缘层(G12)105。
另一个例子是,可利用CVD工艺,通过沉积TEOS或MTO形成第二栅绝缘层(G12)105。
参考图11,在开关TFT区中,在第二栅绝缘层(G12)105上形成栅极106。同时,在均衡器TFT的第一栅绝缘层(G11)103上形成栅极106。
在整个基板上涂布金属材料,如铝(Al)、银(Ag)、金(Au)、镍(Ni)、锆(Zr)、镉(Cd)、铪(Hf)、钨(W)、钽(Ta)或铬(Cr),然后,通过执行利用第四掩模的光刻工艺和蚀刻工艺,在开关TFT区和均衡器TFT区中形成栅极106。
参考图12,形成层间绝缘部107,以覆盖在开关TFT区和均衡器TFT区中形成的栅极106。
通过执行利用第五掩模的光刻工艺和蚀刻工艺,对层间绝缘部107的一部分进行蚀刻以暴露开关TFT区中的有源层104的顶部,从而形成源极/漏极的接触孔107a。
同时,对层间绝缘部107的一部分进行蚀刻以暴露均衡器TFT区中的光屏蔽部102的顶部,从而形成源极/漏极的接触孔107a。
随后,参考图13,在层间绝缘部107上形成与有源层104相连的源极/漏极108。
在整个基板上涂布导电金属材料,然后,通过执行利用第六掩模的光刻工艺和蚀刻工艺,在层间绝缘部107上面的一侧形成与有源层104相连的源极S。在层间绝缘部107上面的另一侧形成与有源层104相连的漏极D。
同时,通过执行利用第六掩模的光刻工艺和蚀刻工艺,在层间绝缘部107上面的一侧形成与光屏蔽部102相连的源极S。在层间绝缘部107上面的另一侧形成与光屏蔽部102相连的漏极D。
这里,源极S和漏极D可以由MoTi形成,但并不局限于此。源极S和漏极D可以由铝(Al)、银(Ag)、金(Au)、镍(Ni)、锆(Zr)、镉(Cd)、铪(Hf)、钨(W)、钽(Ta)或铬(Cr)形成,或者由它们的合金形成。
如上所述,均衡器TFT 130被配置为具有由氧化物半导体材料形成的有源层104、第二栅绝缘层(G12)105、源极S和漏极D。
均衡器TFT 130被配置为具有由a-Si形成且用作有源层的光屏蔽层102、第一栅绝缘层(G11)103、源极S和漏极D。
随后,参考图14,形成钝化层(PAS)109,以覆盖第一开关TFT 110和均衡器TFT130。
在上述根据本发明实施例的抗静电装置制造方法中,第一开关TFT 110和第二开关TFT 120中的每一TFT的绝缘层厚度不同于均衡器TFT 130的绝缘层厚度,因此第一开关TFT 110和第二开关TFT 120的开关特性不同于均衡器TFT 130的的开关特性。即,第一开关TFT 110和第二开关TFT 120的开关速度不同于均衡器TFT 130的的开关速度。
上文描述的是采用相同的制造工艺同时形成第一开关TFT 110、第二开关TFT 120和均衡器TFT 130。
但是,本发明并不局限于此。例如,可以首先形成第一开关TFT 110和第二开关TFT120,并通过随后的工艺,在第一开关TFT 110和第二开关TFT 120之间形成均衡器TFT 130。
抗静电装置设置在显示面板的数据线和栅线的输入端,因此具有等于或高于额定电压的高电压且流向线路的静电被释放。在这种情况下,抗静电装置可以被配置为具有两个二极管和一个均衡器TFT。
在上述根据本发明实施例的抗静电装置制造方法中,第一开关TFT 110和第二开关TFT 120的有源层由氧化物半导体形成,因此能够提高ESD性能。此外,由a-Si形成的光屏蔽部102被形成为均衡器TFT 130的有源层,因此能够降低功耗。
根据本发明实施例的抗静电装置包括对静电脉冲作出快速响应的开关TFT,所以提高了ESD性能。
根据本发明实施例的抗静电装置包括泄漏电流量小的均衡器TFT,所以降低了功耗。
根据本发明实施例的抗静电装置制造方法制造对静电脉冲作出快速响应的开关TFT。
根据本发明实施例的抗静电装置制造方法制造泄漏电流量小的均衡器TFT。
对本领域技术人员来说,显然可以在不脱离本发明的精神或范围的情况下,对本发明作出各种修改和变更。因此,本发明旨在覆盖落在权利要求及其同等变换的范围内的对本发明作出的修改和变更。
Claims (8)
1.一种显示设备的抗静电装置,所述抗静电装置包括:
第一开关薄膜晶体管(TFT),其中有源层由氧化物形成;
第二开关薄膜晶体管,其中有源层由氧化物形成;
均衡器薄膜晶体管,其中有源层由非晶硅形成,
其中所述均衡器薄膜晶体管包括:
光屏蔽部,所述光屏蔽部由非晶硅形成,并用作有源层;
在所述光屏蔽部上形成的第一栅绝缘层;
与所述光屏蔽部的一侧相连的源极;和
与所述光屏蔽部的另一侧相连的漏极,
其中在所述第一开关薄膜晶体管和第二开关薄膜晶体管之中的每一个中,在所述由氧化物形成的有源层下方形成由非晶硅形成的光屏蔽部,并且在所述由非晶硅形成的光屏蔽部和所述由氧化物形成的有源层之间形成绝缘层。
2.根据权利要求1所述的抗静电装置,
其中所述第一开关薄膜晶体管和第二开关薄膜晶体管中的每一薄膜晶体管的栅绝缘层的厚度不同于所述均衡器薄膜晶体管的栅绝缘层的厚度。
3.根据权利要求1所述的抗静电装置,其中所述第一开关薄膜晶体管和第二开关薄膜晶体管中的每一薄膜晶体管的开关速度不同于所述均衡器薄膜晶体管的开关速度。
4.根据权利要求1所述的抗静电装置,其中所述第一开关薄膜晶体管和第二开关薄膜晶体管中的每一薄膜晶体管包括:
由氧化物形成的有源层;
在所述有源层上形成的第二栅绝缘层;
与所述有源层的一侧相连的源极;和
与所述有源层的另一侧相连的漏极。
5.根据权利要求1所述的抗静电装置,其中,
所述第一开关薄膜晶体管和第二开关薄膜晶体管中的每一薄膜晶体管的栅极和源极彼此连接,所述第一开关薄膜晶体管和第二开关薄膜晶体管中的每一薄膜晶体管作为二极管来工作,
所述第一开关薄膜晶体管和第二开关薄膜晶体管的漏极连接至所述均衡器薄膜晶体管的栅极,
所述均衡器薄膜晶体管的源极连接至所述第一开关薄膜晶体管的源极,以及
所述均衡器薄膜晶体管的漏极连接至所述第二开关薄膜晶体管的源极。
6.一种抗静电装置的制造方法,所述抗静电装置包括多个开关薄膜晶体管(TFT),并且包括均衡器薄膜晶体管,所述方法包括:
在基板上形成的缓冲层上,用非晶硅形成光屏蔽部;
形成第一栅绝缘层,以覆盖所述光屏蔽部;
在所述第一栅绝缘层上的开关薄膜晶体管区中,用氧化物形成有源层;
形成第二栅绝缘层,以覆盖所述有源层;
在所述第二栅绝缘层上形成所述多个开关薄膜晶体管中的每一薄膜晶体管的栅极,在所述第一栅绝缘层上的均衡器薄膜晶体管区中形成所述均衡器薄膜晶体管的栅极;
形成层间绝缘部,以覆盖所述多个开关薄膜晶体管中的每一薄膜晶体管的栅极和所述均衡器薄膜晶体管的栅极;
对所述层间绝缘部的一部分进行蚀刻,以形成多个接触孔,所述接触孔暴露所述有源层的顶部和所述光屏蔽部的顶部;
形成所述多个开关薄膜晶体管中的每一薄膜晶体管的将要与所述有源层相连的源极和漏极,形成所述均衡器薄膜晶体管的将要与所述光屏蔽部相连的源极和漏极;以及
形成钝化层,以覆盖所述多个开关薄膜晶体管和所述均衡器薄膜晶体管,
其中所述光屏蔽部被形成为所述均衡器薄膜晶体管的有源层。
7.根据权利要求6所述的方法,其中所述第一栅绝缘层的厚度不同于所述第二栅绝缘层的厚度。
8.根据权利要求6所述的方法,其中所述多个开关薄膜晶体管中的每一薄膜晶体管的第二栅绝缘层的厚度要比在显示面板的有源区中形成的薄膜晶体管的栅绝缘层的厚度薄。
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