CN104749841B - 薄膜晶体管阵列基板及其制造方法 - Google Patents

薄膜晶体管阵列基板及其制造方法 Download PDF

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CN104749841B
CN104749841B CN201410802335.5A CN201410802335A CN104749841B CN 104749841 B CN104749841 B CN 104749841B CN 201410802335 A CN201410802335 A CN 201410802335A CN 104749841 B CN104749841 B CN 104749841B
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colour filter
film transistor
thin
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color filter
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CN104749841A (zh
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金载凡
全佑烈
尹暻善
咸有志
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LG Display Co Ltd
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    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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Abstract

为了防止光泄露并补偿显示区和非显示区之间台阶,提供了一种薄膜晶体管阵列基板及其制造方法,所述薄膜晶体管阵列基板包括:具有显示区和非显示区的基板;在基板的显示区中通过彼此交叉的多条栅极线和多条数据线限定的多个像素区;与相邻像素区之间对应的公共线,所述公共线被设置成与栅极线平行;在每个像素区中的薄膜晶体管和滤色器;在相邻像素区之间的第一虚拟滤色器;在基板上的非显示区中的第二虚拟滤色器,在所述第二虚拟滤色器的上表面提供有至少一个凹陷;和在基板的整个表面上方的保护膜,用以覆盖第一和第二虚拟滤色器并填充所述凹陷。

Description

薄膜晶体管阵列基板及其制造方法
本申请要求2013年12月30日提交的韩国专利申请No.10-2013-0166575的权益,在此通过参考将其并入本文,就如在此全部列出一样。
技术领域
本发明涉及薄膜晶体管阵列基板。更具体地,本发明涉及薄膜晶体管阵列基板及其制造方法,以防止光泄露并补偿显示区和非显示区之间的台阶。
背景技术
随着信息依赖型社会的发展,对显示设备的需求快速增加。响应于这种需求,近些年,已经研究了各种显示设备,诸如液晶显示器(LCD)、等离子体显示面板(PDP)、电致发光显示器(ELD)和真空荧光显示器(VFD),且其中一些显示器用作各种设备的显示器。
通常,液晶显示设备包括提供有滤色器的滤色基板、提供有薄膜晶体管的薄膜晶体管阵列基板、和形成在滤色基板和薄膜晶体管阵列基板之间的液晶单元。具体地,在薄膜晶体管阵列基板的显示区中,多条栅极线和多条数据线彼此交叉以限定多个像素区,在各像素区中形成薄膜晶体管。此外,形成在滤色基板上的滤色器分别形成在像素区中,当薄膜晶体管操作时发出与滤色器对应颜色的光。
当将薄膜晶体管阵列基板结合到滤色器阵列基板以形成显示设备时,在非显示区中不能完全屏蔽光泄露。因此,在相邻像素区和非显示区中产生光泄露,不利地引起显示质量变差。
发明内容
因此,本发明涉及一种薄膜晶体管阵列基板及其制造方法,其基本避免了由于现有技术的限制和不足导致的一个或多个问题。
本发明的一个目的是提供一种薄膜晶体管阵列基板及其制造方法,以防止光泄露并补偿显示区和非显示区之间的台阶。
将在之后的说明书中部分地列出本发明的其他优势、目的和特征,且一旦查阅了下文,一部分优势、目的和特征对于本领域技术人员是显而易见的,或者可通过实践本发明获知。通过所撰写的说明书及其权利要求以及所附附图中特别指出的结构可认识或者获得本发明的目的和其他优势。
为了获得这些目的和其他优势并且根据本发明的目的,如所体现并在本文中广泛描述的,一种薄膜晶体管阵列基板,包括:具有显示区和非显示区的基板;在基板的显示区中通过彼此交叉的多条栅极线和多条数据线限定的多个像素区;与相邻像素区之间对应的公共线,所述公共线设置成与栅极线平行;在每个像素区中的薄膜晶体管和滤色器;在相邻像素区之间的第一虚拟滤色器;在基板上的非显示区中的第二虚拟滤色器,在所述第二虚拟滤色器的上表面提供有至少一个凹陷;和在基板的整个表面上方的保护膜,用以覆盖第一和第二虚拟滤色器并填充所述凹陷,
在本发明的另一方面,提供一种用于制造薄膜晶体管阵列基板的方法,包括:在基板上的显示区中形成彼此平行的多条栅极线和多条公共线;形成与栅极线交叉以限定多个像素区的多条数据线;在每个像素区中形成薄膜晶体管和滤色器;在相邻像素区之间形成第一虚拟滤色器;在基板上的非显示区中形成第二虚拟滤色器,所述第二虚拟滤色器在上表面具有至少一个凹陷;和在基板的整个表面上方形成保护膜以覆盖第一和第二虚拟滤色器并填充所述凹陷。
将理解,本发明上文的一般描述和下文的具体描述是示意性和说明性的且意在提供如所要求保护的本发明的进一步解释。
附图说明
本文包括附图以提供本发明的进一步理解,附图结合到本申请中并构成本申请的一部分,附图示出了本发明的实施例且与文字描述一起用于解释本发明的原理。附图中:
图1是示出根据本发明的薄膜晶体管阵列基板的平面图;
图2是示出图1的像素区的平面图;
图3A是沿着图2的I-I’取得的截面图;
图3B是沿着图2的II-II’取得的截面图;
图4A和4B是示出根据本发明的显示区和非显示区的截面图;
图5A至5E是示出用于形成薄膜晶体管阵列基板的显示区的方法的截面图;和
图6A至6E是示出用于形成薄膜晶体管阵列基板的非显示区的方法的截面图。
具体实施方式
现在将具体参考本发明的优选实施例,其实例于附图中示出。只要可以,在所有附图使用相同参考数字表示相同或相似部件。
以下,将参考附图具体描述根据本发明的薄膜晶体管阵列基板及其制造方法。
图1是示出根据本发明的薄膜晶体管阵列基板的平面图,图2是示出图1的像素区的平面图。此外,图3A是沿着图2的I-I’取得的截面图,图3B是沿着图2的II-II’取得的截面图。此外,图4A和4B是示出根据本发明的显示区和非显示区的截面图。
如图1中所示,根据本发明的薄膜晶体管阵列基板包括在基板100的显示区中由彼此交叉的多条栅极线GL和多条数据线DL限定的多个像素区200。薄膜晶体管形成在每个像素区200中,且薄膜晶体管连接到像素电极(未示出)。此外,连接到被设置成与栅极线GL平行的公共线CL的公共电极(未示出)与像素电极(未示出)交替以产生横向电场(transverseelectric field)。特别是,根据本发明的薄膜晶体管阵列基板具有COT(TFT上的滤色器)结构,在COT结构中在基板100上的各像素区200中进一步形成红色、绿色和蓝色滤色器140。
第一虚拟滤色器140a形成为与栅极线GL和公共线CL之间的间隙交叠。在提供于薄膜晶体管阵列基板底部中的背光单元(未示出)发出的光当中,第一虚拟滤色器140a防止彼此平行的栅极线GL和公共线CL之间的光泄露。
此外,尽管未示出,将光屏蔽柱状衬垫料形成在结合到薄膜晶体管阵列基板同时与薄膜晶体管阵列基板面对的滤色器阵列基板上,从而防止光泄露,但是,光屏蔽柱状衬垫料不能完全屏蔽光泄露。因此,根据本发明的薄膜晶体管阵列基板还包括在基板100的非显示区中的第二虚拟滤色器140b。第一和第二虚拟滤色器140a和140b具有其中红色滤色器和蓝色滤色器以此顺序叠置的结构,在第二虚拟滤色器140b的顶部提供有至少一个凹陷170。
具体地,如图2、3A、3B、4A和4B中所示,薄膜晶体管阵列基板100包括由在基板100上彼此交叉的多条栅极线GL和多条数据线DL限定的多个像素区200。薄膜晶体管形成在每个像素区200中,且薄膜晶体管连接到像素电极160a。此外,公共电极160b与像素电极160a交替以在其间产生横向电场。
响应于提供至栅极线GL的扫描信号,薄膜晶体管使提供至数据线125a的像素信号能够充入(filled)且保持在像素电极160a中。为了这个目的,薄膜晶体管包括栅极105、栅极绝缘膜110、半导体层115、源极120a和漏极120b。
栅极105从栅极线GL突出或者被限定为栅极线GL的一部分。此外,连接到公共电极160b的公共线CL与栅极线GL间隔开且设置成与栅极线GL平行。
栅极线GL、栅极105和公共线CL具有叠层结构,包括含有金属材料的两层或多层,所述金属材料诸如是Al/Cr、Al/Mo、Al(Nd)/Al、Al(Nd)/Cr、Mo/Al(Nd)/Mo、Cu/Mo、Ti/Al(Nd)/Ti、Mo/Al、Mo/Ti/Al(Nd)、Cu合金/Mo、Cu合金/Al、Cu合金/Mo合金、Cu合金/Al合金、Al/Mo合金、Mo合金/Al、Al合金/Mo合金、Mo合金/Al合金或者Mo/Al合金,或者栅极线GL、栅极105和公共线CL是包括含有金属材料的单层的结构,所述金属材料诸如是Mo、Ti、Cu、AlNd、Al、Cr、Mo合金、Cu合金或Al合金。
半导体层115经由栅极绝缘膜110与栅极105交叠且包括顺序叠置的有源层(未示出)和欧姆接触层(未示出)。欧姆接触层用于降低源极和漏极120a和120b与有源层之间的电接触电阻,欧姆接触层被选择性去除以暴露出有源层,去除了欧姆接触层的区域被限定为沟道区。
源极120a连接到数据线DL并接收数据线DL的数据信号。漏极120b经由半导体层115的沟道区面对源极120a并将数据线DL的数据信号提供至像素电极160a。
此外,形成第一保护膜130a以覆盖薄膜晶体管。第一保护膜130a由诸如SiNx或SiOx的无机绝缘材料形成。红、蓝和绿色滤色器140分别形成在第一保护膜130a上的像素区中。
此外,第一虚拟滤色器140a提供于第一保护膜130a上的相邻像素区200之间。第一虚拟滤色器140a覆盖栅极线GL和公共线CL之间的间隙,第一虚拟滤色器140a具有与栅极线GL交叠的一侧和与公共线CL交叠的另一侧。第一虚拟滤色器140a防止彼此平行的栅极线GL和公共线CL之间的光泄露并具有其中红色滤色器R和蓝色滤色器B以此顺序叠置的结构。
特别是,在非显示区中还提供第二虚拟滤色器140b。与第一虚拟滤色器140a相似,第二虚拟滤色器140b防止非显示区中的光泄露且具有其中红色滤色器和蓝色滤色器以此顺序叠置的结构。
薄膜晶体管阵列基板结合到被提供有光屏蔽柱状衬垫料的滤色器阵列基板(未示出),使得所述基板彼此相对。这一点上,光屏蔽柱状衬垫料不能完全屏蔽自背光单元发出的光并传输紫色光。因此,如上文所述,根据本发明的薄膜晶体管阵列基板包括具有顺序叠置红色滤色器R和蓝色滤色器B的结构的第一和第二虚拟滤色器140a和140b,从而屏蔽紫色光。
在第二虚拟滤色器140b的上表面上提供有至少一个凹陷170。凹陷170补偿设置在第一虚拟滤色器140a上表面上的第二保护膜130b和设置在第二虚拟滤色器140b上表面上的第二保护膜130b之间的台阶。
具体地,第二保护膜130b形成在基板100的整个表面上方使其覆盖滤色器140、第一虚拟滤色器140a和第二虚拟滤色器140b。第二保护膜130b由有机绝缘材料形成,优选地由光敏化合物(PAC)形成。
这一点上,如上所述,第一虚拟滤色器140a防止相邻像素区200之间的光泄露并具有相当小的宽度。在另一方面,第二虚拟滤色器140b形成在基板100的非显示区的整个表面上方,且由此具有比第一虚拟滤色器140a的上表面宽的上表面。因此,当使用有机绝缘材料在基板100的整个表面上方形成第二保护膜130b时,有机绝缘材料在固化之前流入到具有小宽度的第一虚拟滤色器140a中。因此,比第二虚拟滤色器140a的上表面薄的第二保护膜130b形成在第一虚拟滤色器140a上,由此引起第二保护膜130b形成台阶,且由此导致光泄露以及污染显示设备以及由此导致质量变差。
但是,根据本发明的薄膜晶体管阵列基板包括在第二虚拟滤色器140b的上表面上的至少一个凹陷170,所述凹陷170填充有用于形成第二保护膜130b的有机绝缘材料。因此,有机绝缘材料尽管流入到第一虚拟滤色器140a中,也能补偿第二保护膜130b的台阶。
这种情况下,如图4A中所示,可通过选择性去除蓝色滤色器B形成凹陷170,或者如图4B中所示,通过去除蓝色滤色器B和红色滤色器R形成凹陷170。特别是,凹陷170完全穿过第二虚拟滤色器140a并具有选自圆形、椭圆形和多边形的形状。
像素电极160a形成在第二保护膜130b上。像素电极160a连接到经由形成在第一和第二保护膜130a和130b中的漏极接触孔150a暴露的薄膜晶体管的漏极。像素电极160a由诸如氧化锡(TO)、氧化铟锡(ITO)、氧化铟锌(IZO)或者氧化铟锡锌(ITZO)的透明导电材料形成。
此外,与像素电极160a交替以产生电场的公共电极160b进一步形成在第二保护膜130b上。公共电极160b经由公共接触孔150b连接到公共线CL,通过选择性去除栅极绝缘膜110和第一和第二保护膜130a和130b,该公共接触孔150b暴露出公共线CL。
也就是,如上所述,根据本发明的薄膜晶体管阵列基板包括在相邻像素区之间的第一虚拟滤色器140a,使其与栅极线GL和公共线CL交叠,且在非显示区中形成第二虚拟滤色器140b。这种情况下,在第二虚拟滤色器140b的上表面上提供有至少一个凹陷170。所述凹陷170补偿在第一和第二虚拟滤色器140a和140b上形成的第二保护膜130b的台阶。
以下,将参考所附附图具体描述根据本发明制造薄膜晶体管阵列基板的方法。
图5A至5E是示出形成薄膜晶体管阵列基板的显示区的方法的截面图,图6A至6E是示出形成薄膜晶体管阵列基板的非显示区的方法的截面图。
首先,如图5A和6A中所示,栅极线GL和公共线CL彼此平行地形成在基板100上,薄膜晶体管经由栅极绝缘膜110形成在由栅极线GL和数据线DL的交叉限定的每个像素区中。
具体地,通过诸如溅射的沉积将第一金属层形成在基板100上,之后将第一金属层图案化以形成栅极线GL、栅极105和公共线CL。此外,使用诸如氧化硅(SiOx)或氮化硅(SiNx)的材料在包括栅极线GL、栅极105和公共线CL的基板100的整个表面上方形成栅极绝缘膜110。
之后,具有其中有源层和欧姆接触层以此顺序叠置的结构的半导体层115形成在栅极绝缘膜110上,第二金属层形成在包括该半导体层115的栅极绝缘膜110的整个表面上方。此外,图案化第二金属层以形成源极和漏极120a和120b以及数据线DL。
此外,如图5B和6B中所示,形成第一保护膜130a以覆盖薄膜晶体管。第一保护膜130a优选由诸如SiNx或SiOx的无机绝缘材料形成。之后,如图5C和6C中所示,将红、蓝和绿色滤色器140分别形成在第一保护膜130a上的像素区中。
在相邻的像素区之间形成第一虚拟滤色器140a,使其覆盖栅极线GL和公共线CL之间的间隙。第一虚拟滤色器140a具有与栅极线GL交叠的一侧和与公共线CL交叠的另一侧。第一虚拟滤色器140a具有其中红色滤色器R和蓝色滤色器B以此顺序叠置的结构。第一虚拟滤色器140a防止栅极线GL和公共线CL之间的间隙中的光泄露。
同时,在非显示区中还形成第二虚拟滤色器140b。与第一虚拟滤色器140a相似,第二虚拟滤色器140b防止非显示区中的光泄露并具有其中红色滤色器和蓝色滤色器以此顺序叠置的结构。第二虚拟滤色器140b被提供有至少一个凹陷170,通过选择性去除蓝色滤色器B或者去除蓝色滤色器B和红色滤色器R形成所述凹陷170。凹陷170具有选自圆形、椭圆形和多边形的形状。
此外,如图5D和6D中所示,第二保护膜130b形成在基板100的整个表面上方,使其覆盖滤色器140、第一虚拟滤色器140a和第二虚拟滤色器140b。第二保护膜130b由有机绝缘材料形成,优选地由光敏化合物(PAC)形成。这种情况下,第二虚拟滤色器140b的凹陷170被填充有有机绝缘材料。
之后,如图5E和6E中所示,像素电极160a和公共电极160b形成在第二保护膜130b上。像素电极160a连接到通过形成在第一和第二保护膜130a和130b中的漏极接触孔150a暴露的薄膜晶体管的漏极120b。公共电极160b经由通过选择性去除栅极绝缘膜110和第一及第二保护膜130a和130b形成的公共接触孔150b连接到公共线CL。
像素电极160a和公共电极160b由诸如氧化锡(TO)、氧化铟锡(ITO)、氧化铟锌(IZO)或者氧化铟锡锌(ITZO)的透明导电材料形成。此外,公共电极160b与像素电极160a交替以产生横向电场。
根据本发明的薄膜晶体管阵列基板包括在相邻像素区之间形成的第一虚拟滤色器140a,使其与栅极线(GL)和公共线CL交叠,在非显示区中形成第二虚拟滤色器140b。这种情况下,在第二虚拟滤色器140b的上表面上提供有至少一个凹陷170,所述凹陷170补偿设置在第一虚拟滤色器140a的上表面上的第二保护膜130b和设置在第二虚拟滤色器140b的上表面上的第二保护膜130b之间的台阶。
如根据前文显而易见的,根据本发明的薄膜晶体管阵列基板及其制造方法具有以下优势。
首先,在相邻像素区之间形成第一虚拟滤色器,使其覆盖栅极线GL和公共线CL之间的间隙,且在非显示区中形成第二虚拟滤色器,从而防止光泄露。
其次,第二虚拟滤色器具有填充有第二保护膜的至少一个凹陷170。因此,可以补偿设置在第一虚拟滤色器的上表面上的第二保护膜和设置在第二虚拟滤色器的上表面上的第二保护膜之间的台阶,从而防止污染显示设备并提高质量。
对本领域技术人员显而易见的是,可在本发明中做出各种修改和变化而不脱离本发明的精神和范围。由此,本发明意在覆盖本发明的这种修改和变化,只要其落入所附权利要求及其等价物的范围内即可。

Claims (11)

1.一种薄膜晶体管阵列基板,包括:
具有显示区和非显示区的基板;
在基板的显示区中通过彼此交叉的多条栅极线和多条数据线限定的多个像素区;
对应于相邻像素区之间的公共线,所述公共线被设置成与栅极线平行;
在每个像素区中的薄膜晶体管和滤色器;
在相邻像素区之间的第一虚拟滤色器;
在基板上的非显示区中的第二虚拟滤色器,在所述第二虚拟滤色器的上表面提供有至少一个凹陷;
在基板的整个表面上方的保护膜,用以覆盖第一和第二虚拟滤色器并填充所述凹陷;和
在保护膜上的每个像素区中的像素电极和公共电极。
2.如权利要求1所述的薄膜晶体管阵列基板,其中所述第一和第二虚拟滤色器具有其中红色滤色器和蓝色滤色器以此顺序叠置的结构。
3.如权利要求2所述的薄膜晶体管阵列基板,其中通过选择性去除蓝色滤色器提供所述凹陷。
4.如权利要求2所述的薄膜晶体管阵列基板,其中通过选择性去除蓝色滤色器和红色滤色器提供所述凹陷。
5.如权利要求1所述的薄膜晶体管阵列基板,其中所述第一虚拟滤色器覆盖栅极线和公共线之间的间隙,所述第一虚拟滤色器与栅极线和公共线交叠。
6.如权利要求1所述的薄膜晶体管阵列基板,其中所述凹陷具有选自圆形、椭圆形和多边形的形状。
7.一种制造薄膜晶体管阵列基板的方法,包括:
在基板上的显示区中形成彼此平行的多条栅极线和多条公共线;
形成与栅极线交叉以限定多个像素区的多条数据线,在每个像素区中形成薄膜晶体管和滤色器;
在相邻像素区之间形成第一虚拟滤色器;
在基板上的非显示区中形成第二虚拟滤色器,所述第二虚拟滤色器在上表面具有至少一个凹陷;
在基板的整个表面上方形成保护膜以覆盖第一和第二虚拟滤色器并填充所述凹陷;和
在保护膜上的每个像素区中形成像素电极和公共电极。
8.如权利要求7所述的方法,其中通过顺序叠置红色滤色器和蓝色滤色器完成形成所述第一虚拟滤色器的步骤。
9.如权利要求8所述的方法,其中通过顺序叠置红色滤色器和蓝色滤色器,之后选择性去除蓝色滤色器完成形成所述第二虚拟滤色器的步骤。
10.如权利要求8所述的方法,其中通过顺序叠置红色滤色器和蓝色滤色器,之后选择性去除蓝色滤色器和红色滤色器完成形成所述第二虚拟滤色器的步骤。
11.如权利要求7所述的方法,其中通过覆盖栅极线和公共线之间的水平间隙和与所述栅极线和公共线交叠完成形成所述第一虚拟滤色器的步骤。
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