CN104733327B - 用于对准微电子组件的方法 - Google Patents
用于对准微电子组件的方法 Download PDFInfo
- Publication number
- CN104733327B CN104733327B CN201410778317.8A CN201410778317A CN104733327B CN 104733327 B CN104733327 B CN 104733327B CN 201410778317 A CN201410778317 A CN 201410778317A CN 104733327 B CN104733327 B CN 104733327B
- Authority
- CN
- China
- Prior art keywords
- component
- conducting wire
- micromodule
- contact zone
- alignment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 56
- 239000007788 liquid Substances 0.000 claims abstract description 42
- 238000009736 wetting Methods 0.000 claims abstract description 37
- 239000000463 material Substances 0.000 claims abstract description 33
- 239000004020 conductor Substances 0.000 claims abstract description 26
- 230000002940 repellent Effects 0.000 claims abstract description 16
- 239000005871 repellent Substances 0.000 claims abstract description 16
- 230000009471 action Effects 0.000 claims abstract description 10
- 238000001704 evaporation Methods 0.000 claims abstract description 7
- 230000008020 evaporation Effects 0.000 claims abstract description 6
- 238000002161 passivation Methods 0.000 claims description 23
- 230000000295 complement effect Effects 0.000 claims description 4
- 230000007246 mechanism Effects 0.000 claims description 4
- 238000004377 microelectronic Methods 0.000 claims 3
- 239000010410 layer Substances 0.000 description 91
- 239000000758 substrate Substances 0.000 description 56
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 19
- 230000002209 hydrophobic effect Effects 0.000 description 16
- 230000008569 process Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 5
- 241001365789 Oenanthe crocata Species 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000001465 metallisation Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 238000011282 treatment Methods 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000006835 compression Effects 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 230000002708 enhancing effect Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000007363 ring formation reaction Methods 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 238000001338 self-assembly Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/09—Structure, shape, material or disposition of the bonding areas after the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02123—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body inside the bonding area
- H01L2224/0213—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02123—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body inside the bonding area
- H01L2224/0214—Structure of the auxiliary member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02123—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body inside the bonding area
- H01L2224/02145—Shape of the auxiliary member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/0217—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02175—Flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/0218—Structure of the auxiliary member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02185—Shape of the auxiliary member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02233—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body not in direct contact with the bonding area
- H01L2224/0224—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02233—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body not in direct contact with the bonding area
- H01L2224/0225—Structure of the auxiliary member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02233—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body not in direct contact with the bonding area
- H01L2224/02255—Shape of the auxiliary member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08135—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/08145—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08151—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/08221—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/08225—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/09—Structure, shape, material or disposition of the bonding areas after the connecting process of a plurality of bonding areas
- H01L2224/0901—Structure
- H01L2224/0903—Bonding areas having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/10135—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/10145—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10165—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16147—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16148—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/1701—Structure
- H01L2224/1703—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80003—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/80004—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus being a removable or sacrificial coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a permanent auxiliary member being left in the finished device, e.g. aids for protecting the bonding area during or after the bonding process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/8013—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/80132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8012—Aligning
- H01L2224/80143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/802—Applying energy for connecting
- H01L2224/80201—Compression bonding
- H01L2224/80203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80896—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically insulating surfaces, e.g. oxide or nitride layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80905—Combinations of bonding methods provided for in at least two different groups from H01L2224/808 - H01L2224/80904
- H01L2224/80907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/81002—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a removable or sacrificial coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/8113—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/81132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/81141—Guiding structures both on and outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81905—Combinations of bonding methods provided for in at least two different groups from H01L2224/818 - H01L2224/81904
- H01L2224/81907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06593—Mounting aids permanently on device; arrangements for alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3192—Multilayer coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Feeding Of Articles To Conveyors (AREA)
Abstract
本发明涉及用于对准微电子组件的方法。根据本发明,第一微电子组件到第二微电子组件的接收表面的对准通过由毛细作用力产生的自对准,结合静电对准,来实现。后者通过沿对应组件的周边提供至少一个第一电导线以及沿第二组件的接收表面上的要放置所述组件的位置的周边提供至少一个第二电导体来实现。由导线围绕的接触区覆盖有润湿层。电导线可被嵌入在沿所述周边行进以创建可润湿能力对比的抗湿材料带中。可润湿能力对比在维持接触区之间的一滴对准液体方面是可操纵的,以通过毛细作用力来获得自对准。通过对导线施加适当的电荷,实现了静电自对准,它改进了通过毛细作用力获得的对准并在液体的蒸发期间维持所述对准。
Description
技术领域
本发明涉及组装微电子组件的方法,尤其是诸如集成电路芯片等半导体组件。本发明具体地涉及微电子组件组装件中的各组件的对准。
背景技术
芯片堆叠期间不精确的对准导致顶部和底部芯片之间未对准的互连,并且因此导致较不可靠的接合质量,这从而降低了堆叠芯片内的数据流。IC芯片通过机器人拾取并放下方法在逐芯片的基础上或通过将多个芯片附连到搬运器并将这些芯片置于基板上来被堆叠在基板上或以叠堆形式堆叠在其他IC上。在这些技术中的任一技术中,已知的是各单独芯片相对于它们在基板上或先前堆积的芯片上的预期位置的自对准可被应用。这可通过使得要彼此面对的各表面亲水并且在放置芯片时在这些表面之间引入一滴水。自对准通过毛细作用力来建立,这得自于这两个组件之间的充水空间中的液体的表面张力。一旦这两个表面被对准,所述组件的微凸块之间的电接合可通过热压缩、直接接合、或回流技术来实现,通过加热组装件或通过使组装件在室温下晾干,各组件之间的液体被蒸发。
这些技术在正确对准方面遭受多个不精确性。对准对于遍布同一晶片放置的多个芯片而言是不一致的。在接合期间,对准可能失去,尤其是在使用热压缩时。最后,随着各单独IC的大小减少以及因而其重量降低,例如通过背面研磨,基于表面张力的对准不能将IC正确地对准,因为重量不足以发展出用于自对准的毛细作用力。同样,在IC的厚度降低时,IC的弯曲可能由于不同层的内应力而发生。所有这些上述因素统一对整体未对准作出贡献。
发明内容
本发明涉及一种用于将第一微电子组件与第二组件的接收表面对准的方法,如所附权利要求书中公开的。一种用于将第一微电子组件与第二微电子组件对准的方法,所述第一和第二组件两者都包括接触区,所述接触区由润湿层覆盖,所述组件两者包括用于将对准液体包含在所述润湿层上的装置,其中所述组件中的每一个还提供有沿相应接触区的周线行进的一个或多个导线。换言之,导线靠近所述周线附近来行进,在所述周线的内部或外部。该方法包括下列步骤:
-将一定量的所述对准液体施加到所述第二组件的接触区,
-在其接触区面向所述第二组件的接触区的情况下放置所述第一组件,使得液体与两层润湿层都接触,从而通过毛细作用力建立所述接触区的自对准,
-以实现所述接触区的静电对准的方式,换言之,以实现第一和第二组件的导线之间的力的方式,来施加电势,以例如对所述组件中的至少一个的导线充电,从而将这两个组件的导线对准,这进而将这些组件对准并使这些组件保持对准以用于进一步的接合过程。
-在所述液体蒸发时维持所述静电对准。
根据本发明的方法的一实施例,在所述组件中的至少一个上,用于将液体包含在所述润湿层上的所述装置包括沿所述接触区的周线行进的至少一个抗湿材料带。在后一实施例中,所述导线可被嵌入或位于所述抗湿材料带的顶部。
根据本发明的方法的一实施例,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括围绕所述接触区的垂直侧壁。
根据本发明的方法的一实施例,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括所述导线本身,并且其中所述导线被提供有抗湿属性。
根据本发明的方法的另一实施例,所述组件中的一个组件包括一对导线而另一组件包括单个导线,并且其中相反电势被施加以对所述一对导线充电,同时没有电势被施加到所述单个导线。所述一对导线可包括交指型横向扩展。
在本发明的方法中,所述第一和第二组件可各自包括至少一个导线,其中第一和第二电势被施加以对所述第一和第二组件的导线充电,所述第一和第二电势是相反的。
根据本发明的方法的一实施例,所述组件中的至少一个上的导线存在于所述组件的顶部。根据本发明的方法的另一实施例,所述组件中的至少一个上的导线被包括在作为所述组件的一部分的钝化层中。
根据本发明的方法的一实施例,所述组件之一的导线位于绕所述组件的接触区的周线行进的凹陷中,并且其中另一组件的导线从所述组件的表面向外延伸,使得通过共形锁钥机制来进一步增强对准。
本发明同样涉及一种用于将第一微电子组件接合到第二微电子组件的方法,其中所述第一和第二组件根据如前述权利要求中的任一项所述的方法来对准,此后是建立所述组件之间的永久接合的步骤。
本发明同样涉及一种两个或更多个微电子组件的组装件,包括与第二微电子组件对准的至少一个第一微电子组件,所述第一和第二组件两者包括接触区,所述接触区由润湿层覆盖,所述组件中的每一个提供有用于将对准液体包含在所述润湿层上的装置,其中所述组件中的每一个还提供有沿相应接触区的周线行进的一个或多个导线,所述第一和第二组件的导线面向彼此,并且其中所述组件中的至少一个提供有用于向其导线施加电荷的装置。
根据本发明的组装件的一实施例,在所述组件中的至少一个上,用于将液体包含在所述润湿层上的所述装置包括沿所述接触区的周线行进的至少一个抗湿材料带。在后一实施例中,所述导线可被嵌入或位于所述抗湿材料带的顶部。
根据本发明的组装件的一实施例,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括围绕所述接触区的垂直侧壁。
根据本发明的组装件的一实施例,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括所述导线本身,并且其中所述导线提供有抗湿属性。
在根据本发明的组装件中,所述组件之一可包括一对导线,所述一对导线可连接到用于向该对导线施加相反充电电势的装置,而另一组件包括单个导线,所述单个导线不可连接到用于向该单个导线施加充电电势的任何装置。所述另一组件上的单个导线可通过来自包括一对或多对的相反地充电的导线的第一微组件的电荷感应来充电。
根据本发明的组装件的一实施例,所述第一和第二组件包括至少一个导线,所述组件中的至少一个上的导线可连接到用于对所述组件的导线施加充电电势的装置。
根据本发明的组装件的一实施例,所述组件中的至少一个上的导线存在于所述组件的顶部。根据本发明的组装件的另一实施例,所述组件中的至少一个上的导线被包括在作为所述组件的一部分的钝化层中。
根据本发明的组装件的一实施例,所述组件之一的导线位于绕所述组件的接触区的周线行进的凹陷中,并且其中另一组件的导线从所述组件的表面向外延伸。
在本说明书中,术语‘钝化层’要被理解成介电层、或包括至少一个介电层的层堆叠、或其中嵌入有金属线的介电层,如在IC处理的后段制程生产步骤中产生的金属化层。
附图说明
图1示出本发明的方法的第一实施例,其中基板提供有两条平行导线且芯片提供有单个导线,以建立静电对准。
图2示出第二实施例,其中基板和芯片各自提供有单个导线。
图3示出第三实施例,其中基板上的双导线提供有交指型扩展。
图4a和4b示出另一实施例,其中导线被包括在要对准的组件中,并且其中用于将对准液体维持在表面上的装置是由垂直侧壁形成的。
图5a到5d示出用于图4a和4b中示出的组件的对准过程。
图6a和6b示出图1中示意性地示出的一组组件的更详细视图。
图7示出根据本发明的方法对准的多个组件的堆叠。
图8和9示出根据本发明的方法和组装件的另选实施例。
图10a和10b示出其中通过共形锁钥机制将进一步增强对准的实施例。
具体实施方式
根据本发明,如上所述,第一微电子组件到第二微电子组件的接收表面的对准通过由毛细作用力产生的自对准,结合由静电力驱动的静电对准,来实现。后者通过沿第一组件的接触区的周边提供至少一个第一电导线以及沿第二组件的接收表面上的要放置所述组件的位置处的接触区的周边提供至少一个第二电导线来实现。接触区(即,在这两个组件的组装件中需要对准的区域)是互补的,意味着它们具有相同的形状以及基本上相同的大小。同样,第一和第二组件上的导体(给定这些导体沿接触区的周线行进)是互补的,意味着它们在接触区的平面上具有对应的形状,并且在这两个组件被对准时,第一组件的导线面向第二组件的导线。
接触区进一步覆盖有润湿层或可被处理以用于在该区域中创建润湿属性。在本说明书的上下文中,润湿层或润湿材料被定义为增强给定对准液体对润湿层的可润湿能力的层或材料。在本说明书的上下文中,对准液体被定义为施加来通过毛细作用力建立自对准的液体,如在介绍部分中所述。润湿层的最突出示例是亲水层,即通过在施加到该层的一滴水和层表面之间展示非常低的接触角来增强对对准液体水的接触的层。要对准的组件进一步提供有用于将自对准液体包含在所述润湿层上(即,接触区上)的装置。‘覆盖有润湿层’意味着接触区的上表面上的材料具有润湿属性。
根据一个实施例,电导线被嵌入在沿所述周边行进的抗湿材料带中。在本说明书的上下文中,抗湿材料被定义为与上述润湿材料相反,即阻止该材料与给定对准液体之间的接触的材料。在此,主要示例是在所述材料层与施加到它的一滴水之间展示高接触角或低可润湿能力的憎水材料。润湿和抗湿材料在维持接触区之间的一滴对准液体方面是可操纵的,以通过毛细作用力来获得自对准。通过对导线施加适当的电荷,实现了静电自对准,它改进了通过毛细作用力获得的对准并在对准液体的蒸发期间维持所述对准在这一液体蒸发时,组件之间的空隙减小,这造成静电对准力的增加。以此方式,在整个组装过程期间确保了高质量对准。
参考附图描述了多个不同的实施例。在每一情况下,描述了芯片3到基板1的对准,这表示在所附权利要求书中引用的‘第一和第二组件’的示例。然而,要注意,本方法适用于任何类型的组件到任何类型的基板的对准,包括例如IC芯片的堆叠组装件中芯片到另一芯片的对准。为易于描述起见,使用术语‘憎水’、‘亲水’且施加的对准液体是水,但贯穿本说明书,这些术语中的任一个可由更一般的‘润湿’、‘抗湿’以及‘对准液体’来替换。
图1示出了第一实施例。基板1具有其上要放置芯片3的接触区2。在芯片与基板的组装件中,芯片的接触区4要与基板的接触区2对准。接触区2/4提供有要在结合过程中接合在一起的焊球或微凸块(未示出)。接触区2/4覆盖有亲水层5。这些接触区可以是覆盖有亲水涂层或遭受致使接触区2/4表面亲水的处理的钝化层。基板的接触区2被沿接触区2的周线行进的一对导线6和7围绕。导线6/7相互平行。导线6/7嵌入在憎水材料带8中。导线分别连接到接触引线9和10,导线通过它们可被充电。芯片2提供有沿芯片的接触区4的周线以闭合环路来行进的单个导线11。单个导线11同样嵌入在憎水材料带12中。在芯片被置于基板顶部时,单个导线11面向双导线6/7之间的区域。在对准过程期间,基板上的导线6和7被用相反的电荷充电,如在图1中详细示出的。单个导线11没有从连接到所述导线11的外部源接收到电荷。因此,经由靠近双导线6/7在所述单个导线11中感应出电荷,以增强单个导线11与双导线6/7的对准并且因此增强芯片的接触区4到基板的接触区2的对准。有利地,这一实施例不需要用于对芯片中的导线11充电的接触引线。
这一实施例的对准过程可包括以下步骤:
-将水施加到基板的接触区2。作为层5的亲水特性的结果,水遍布整个区域2。水量取决于接触区2/4的大小。水通过周围的憎水材料带8被包含在这一区域中。
-用其覆盖有亲水层5的接触区4在面向基板的覆盖有另一亲水层5的接触区2的情况下来放置芯片3,使得水接触这两个亲水接触区2/4,从而允许通过毛细作用力来建立自对准。这一步骤可以通过预对准芯片(将它置于与基板的接触区的大致对准中)、将芯片保持在预对准位置直至水完全接触这两个接触区2和4、随后释放芯片,使得它可以在水上自由移动以便发生自对准。
-施加电势以例如用相反电荷向导线6和7充电,从而通过上述静电对准来建立对准。导线可在芯片3被置于基板1上之前或之后被充电。这一步骤的结果是相对于彼此对准但尚未最后接合在一起的基板和芯片的组装件,
-加热该组装件以从而通过蒸发来移除水,或使组装件晾干直至水已蒸发。在水蒸发时,两组件之间的空隙减小,这进而增加所述组件之间的静电拉力,从而帮助最终接合。
在这些步骤之后是芯片与基板之间的最终接合的实现,例如通过回流接合或直接接合。电荷可以在实现最终接合的步骤之前或之后被移除。
图2中示出了第二实施例。在这种情况下,基板1和芯片3两者提供有围绕它们的相应接触区2/4的单个导线15和16,每一导线嵌入在憎水材料带17/18中,其中接触区本身被亲水层5覆盖。导线15/16分别提供有接触引线19/20,通过该接触引线可经由外部源施加电势来对导线充电。对准过程可包括与上述相同的步骤,其中静电对准通过用相反电荷对线15/16充电来实现(参见图2中的细节),使得线彼此吸引以建立对准。可能地,导线15或16中只有一个可主动连接到充电电势,而另一导体不能(即,接触引线19/20之一不存在)。在这种情况下,另一导线将通过靠近第一导线而与第一导线相反地充电,并且静电对准将发生。在图2的实施例中,一个以上导线可存在于基板和/或芯片中。如果多个导线存在于一个组件中,则在对准过程中,所有所述导体随后用相同电荷类型(+或-)来充电。
图3中示出的第三实施例是第一实施例的变型,但其中平行导线6和7提供有交指型横向扩展21。导线6和7再次用相反电荷充电,如在图1的实施例中一样。这创建了较高的对准力,从而提高了基板1和芯片3之间的静电对准的程度。
图4a和4b示出了另一实施例。如前一实施例一样,基板1包括一对导线6/7。导线可以通过接触垫9/10来充电。铜微凸块25在接触区2中示出。基板被垂直侧壁24围绕,限定了接触表面2与侧壁24之间的边23。如在图4a的截面图中看到的,接触区2对应于整个上基板表面。导线对6/7被嵌入在第一钝化层26中,并且覆盖有第二钝化层27,第二钝化层与微凸块的上表面出于同一水平。第二钝化层27也是润湿层,或者它可被润湿层覆盖,或者它可能已经经受润湿处理。用于将一滴水包含在接触区2上的装置由垂直侧壁24形成,它通过所谓的‘边缘锁定’效应来包含水。可任选地,侧壁24进一步被憎水材料覆盖。
要接合到图4a的基板的芯片3在图4b中示出。它被提供有形成闭环的单个非充电导线11,导线11也嵌入在第一钝化层28中且被第二钝化层29覆盖,第二钝化层29也是润湿层或被润湿层覆盖或它可已经经受润湿处理。微凸块30同样与第二钝化层29的上表面处于同一水平。芯片同样提供有垂直侧壁31,在侧壁31和接触区表面之间具有尖锐边缘32。芯片的接触区4与由垂直壁31作为边界的总体区域相对应。换言之,导线沿接触区4的周线行进,但位于接触区之下,并且被包括在接触区的覆盖区中,代替位于所述覆盖区之外并且因而围绕接触区(如在图1到3的情况)。将水维持在接触区4上同样通过边缘锁定效应来实现。钝化层26和28可完全或部分地与基板或芯片的后段制程部分中的最后金属化层相对应(如果基板是例如中间芯片或作为芯片堆叠的一部分的芯片的话,参见下文)。对准导体6/7/11因而可作为芯片或基板本身的生产过程的一部分来在芯片或基板上产生,代替之后被施加到基板或芯片的顶部(图1到3的实施例中的情况)。在图4a和4b的实施例中,导线因而被包括在要对准的组件中,而在图1到3的实施例中,导线被施加到组件的顶部。要注意,图1到3的实施例中的任一个在导体的类型方面(例如,图3中的具有交指型扩展21的导体)可被包括在组件中,例如作为组件的最后BEOL层中的金属线。
图5a到5d示出图4a和4b的基板和芯片的对准过程。在图5a中,一滴水33被施加到基板的接触区2。该滴水通过润湿层27的效应来润湿接触区,并且通过边缘锁定效应被包含在表面上。随后,芯片3被放置(预对准并释放),且水滴通过毛细作用力效应建立两个接触区2和4之间的自对准(图5b)。在水蒸发时(图5c),可能通过加热该组装件,静电对准确保获得并维持完美对准,静电对准力随基板与芯片之间的空隙减小而变得更强。在所有水已蒸发或以其他方式移除时,静电力确保在实际接合过程中对准保持不变,其中例如通过钝化层27和29之间的接合来建立微凸块之间的电连接(图5d)。这些可以是可使用或不使用压力/热来形成接合(已知为‘直接接合’技术)的氧化物/金属互连层。
图6a和6b示出图1已示出的实施例的更详细视图。在此,微凸块35被示出在基板1上和芯片3上。可以看到,导体6/7和11实际上被嵌入在润湿层5中,它们从润湿层5中稍微伸出。憎水带8和12位于润湿层5的上表面上。润湿层5被沉积在钝化层36上,钝化层36完全或部分地与芯片或基板的后段制程部分的顶部金属化层相对应(如果例如基板是插入基板的话)。
本发明的方法可应用来产生若干组件或多个堆的堆叠,例如载体基板上的一个或多个芯片堆叠。这在图7中示出。堆叠中除最上芯片之外的每一芯片在该芯片的两侧上提供有亲水接触表面5。同样在该芯片的两侧上,提供导线来实现上述静电对准。在图7所示的示例中,基板1上的两个芯片40/41的堆叠中的中间芯片40提供有绕其下接触表面的单个导线以及绕其上接触表面的双导线。中间芯片40与上芯片41之间的对准根据图1的实施例发生,其中中间芯片40担当基板的角色。中间芯片40的上表面上的导线需要用来自外部源的电荷来补充。这可例如通过提供在中间芯片40内行进的所谓的‘透硅通孔’45来完成。通过在钝化层36中提供的金属线37的方式,芯片的顶表面上的导体随后可通过与在基板1上的导体相同的源来充电。
两个进一步实施例在图8和9中示出。图8示出了图4a和4b的实施例的变型,其中导线6/7和11被包括在钝化层26和28中(例如,IC芯片或插入层的最后BEOL层),并且同时嵌入在也被包括在所述钝化层中的憎水材料带8/12中。钝化层26/28本身是亲水的或通过施加亲水涂层或处理来变成亲水的。接触区2/4是分别由憎水带8/12包围的区域。图10a和10b是基本上图1和6a和6b的实施例,其中上表面被钝化层60/61拉平到凸块35的水平,钝化层60/61例如是适于用在直接接合技术中的氧化物层。
根据一实施例,进一步对准装置被添加到上述静电和毛细作用力引起的对准装置。这被称为基于共形锁钥的对准,通过对要对准的组件之一上的导线的合适处理来获得。用于共形锁钥的不同方法可取决于要对准的(微)组件的要求来改编。一种这样的方法在图10a和10b中示出。基板1同样提供有覆盖了亲水层5和嵌入在憎水带8中的双导线6/7的接触区2。芯片的接触区4也同样提供有亲水层5和单个闭环导线11,用于通过导线6/7和11的相反充电进行静电对准。然而,基板的导线6/7现在被提供在沿基板的接触区2的周线行进的凹陷50中。凹陷50的横截面与芯片上的憎水带12的形状相对应,使得凹陷和该带可以按锁钥的方式来彼此适合,以建立芯片与基板之间的对准。共形锁钥特征可以与上述静电对准实施例中的任一个相组合,以及与落入本发明的范围内的任何其他实施例相组合。凹陷50可以在芯片上代替在基板上。
其他锁钥对准装置可以存在来作为图10a和10b的机构的替换或补充(其中憎水带形成适合到另一组件中的对应凹陷的‘钥匙’)。微凸块35可被产生作为一个组件上的凸块以及另一组件上的对应凹接合垫,如本领域中已知的‘插入接合’。表面上的其他特征可被用作适合到相对表面上的对应凹陷中的‘钥匙’,例如球形钥匙/凹陷、六边形钥匙/凹陷、锥形钥匙/凹陷。
本发明的一般原理的其他实施例或变型在所附权利要求书的范围内,例如:接触区的周线可以不同于矩形。根据一实施例,在导线被包括在作为要对准的组件的一部分的钝化层中时,抗湿材料带可被置于导线之外。在图4a和4b的情况下,例如,这将意味着垂直侧壁24被围绕接触区2和4的憎水材料区替换。上述实施例的若干组合将被本领域技术人员理解为处于所附权利要求书的范围内。例如,图4a和4b、6a和6b、8、9和10a和10b的实施例可容易地与图2的导线一起实现,即要对准的组件中的每一个上的一个导线15/16。要对准的组件可被提供有用于包含对准液体的不同装置,例如基板上的憎水材料带以及芯片上的垂直侧壁。
在其中要对准的组件之一被提供有非充电导线11的上述实施例中,这一导线已被描述为闭环。但是,这不是必需的。例如,可以使用沿接触区的周线行进的一系列导线,每一导线可通过靠近相对组件中的正和负充电的导线6/7而被分开充电。
在以上描述和权利要求书中引用的‘抗湿材料带’优选地形成绕接触区的闭环。然而,根据特定实施例,该带可被非抗湿的区域中断,假定这些区域的大小足够小而不能造成对准液体从接触区泄漏。带的宽度与有效面积的大小和要包含的对准液体的量有关,并且可由本领域技术人员确定。同样,带中的开口的可允许大小取决于所使用的液体的类型。
上述实施例中示出的或在根据本发明的任何实施例中应用的对准导线6/7/11/15/16不一定必需被嵌入在要对准的组件的抗湿材料带中或钝化层中。根据本发明的各实施例,要对准的组件中的至少一个的导线不被嵌入在任何材料中,例如在抗湿材料带的顶部或钝化层的顶部,如组件的BEOL部分的最后金属化层。必须注意以下情况:导体在对准过程期间没有物理接触,例如通过适当地调整铜接触凸块的大小。
施加用来经由通过外部源提供的电势对导线充电的电压可以取决于接触区的大小以及与组件相关的其他参数而变化。它可以是DC或AC电压。例如,取决于具体参数,可施加10和1000V之间的DC电压。
相对于要对准的组件,接触区2和4优选地尽可能大。例如,芯片的接触区4优选地与芯片的表面区域相对应(如图4a和4b的情况),或与芯片的表面减去憎水带8/12/17/18的表面相对应。如上所述,用于静电对准的导线可以在接触区之下或与接触区相邻。
在根据本发明的任何实施例中,‘用于将对准液体包含在接触区上的装置’可通过用于创建第一和第二区域之间的可润湿能力对比的任何装置来实现。例如,导线本身可以通过将自组装的单层(SAM)施加到所述导体来被给出抗湿属性。获得可润湿能力对比的另一方式是硅凹陷蚀刻。
在其中示出单个导线的任何实施例中(图1/3/4a和4b中的11或图2中的15/16),它们可由多个线来替换。在图1的实施例中,平行线6/7可由平行的各组正和负充电的线来替换。
作为示例,以下描述一种用于在组件上产生导线的可能方法。在玻璃载体基板上,通过物理气相沉积来沉积一层钼。该层通过标准光刻/等离子体蚀刻来图案化以形成导线。在导线的顶部和整个基板上,通过等离子增强型物理气相沉积以高温来执行SiO2和SiN的后续沉积,此后这些层被再次图案化以至少在导线的顶部形成SiO2和SiN的堆叠。SiO2和SiN的堆叠可能被提供有抗湿涂层或处理,形成图1和6a和6b中所示的抗湿带8/12。
虽然在附图和以上描述中已示出并描述了本发明,但此类例示和描述应被认为是说明性的或示例性的而不是限制性的。通过对附图、公开内容以及所附权利要求的研究,本领域普通技术人员在实施所要求保护的发明时可理解和实现所公开实施例的其他变型。在权利要求中,“包括”一词不排除其他要素或者步骤,并且不定冠词“一”或“一个”不排除复数形式。在相互不同的从属权利要求中描述了特定措施的事实并不意味着这些措施的组合不能用于产生良好效果。权利要求中的任何附图标记都不应解释为范围的限制。
以上描述详细说明了本发明的某些实施例。然而,应当理解,不管以上在文本中显得如何详细,本发明可以其他方式实现并且因此不限于所公开的实施例。应当注意的是,在描述本发明的某些特征或方面时,特定术语的使用不应当用来暗示术语在本文中被重定义以受限于包括与所述术语相关联的本发明的特征或方面的任何特定特性。
除非特别指明,否则存在于、沉积或产生在另一层或基板‘上’的层的描述包括以下选项:
●所述层存在于、被直接产生或沉积在所述另一层或基板上,即与所述另一层或基板物理接触,以及
●所述层存在于、被产生或沉积在所述层与所述另一层或基板之间的一个中间层或中间层的叠层上。
Claims (15)
1.一种用于将第一微电子组件(3)与第二微电子组件(1)对准的方法,所述第一微电子组件和第二微电子组件两者都包括接触区(4,2),所述接触区由润湿层(5)覆盖,所述组件两者包括用于将对准液体包含在所述润湿层上的装置,其中所述组件(1,3)中的每一个还提供有沿相应接触区的周线行进的一个或多个导线(6,7,11,15,16),所述方法包括以下步骤:
-将一定量的所述对准液体施加到所述第二微电子组件的接触区(2),
-在其接触区(4)面向所述第二微电子组件的接触区(2)的情况下放置所述第一微电子组件,使得液体接触这两个润湿层(5),从而通过毛细作用力建立所述接触区(2,4)的自对准,
-以实现所述接触区(4,2)的静电对准的方式施加电势,以对所述组件中的至少一个的导线充电,
-在所述液体蒸发时维持所述静电对准,
其中,所述第一微电子组件和第二微电子组件的接触区是互补的。
2.如权利要求1所述的方法,其特征在于,在所述组件中的至少一个上,用于将液体包含在所述润湿层上的所述装置包括沿所述接触区(2,4)的周线行进的至少一个抗湿材料带(8,12,17,18)。
3.如权利要求2所述的方法,其特征在于,所述导线被嵌入所述抗湿材料带的顶部或位于所述抗湿材料带的顶部。
4.如权利要求1所述的方法,其特征在于,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括围绕所述接触区(2,4)的垂直侧壁(24,31)。
5.如权利要求1所述的方法,其特征在于,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括所述导线本身,并且其中所述导线提供有抗湿属性。
6.如权利要求1所述的方法,其特征在于,所述组件中的一个组件包括一对导线(6,7)而另一组件包括单个导线(11),并且其中相反电势被施加以对所述一对导线充电,同时没有电势被施加到所述单个导线。
7.如权利要求6所述的方法,其特征在于,所述一对导线(6,7)包括交指型横向扩展(21)。
8.如权利要求1所述的方法,其特征在于,所述第一微电子组件和第二微电子组件各自包括至少一个导线(15,16),并且其中第一和第二电势被施加以对所述第一微电子组件和第二微电子组件的导线(15,16)充电,所述第一和第二电势是相反的。
9.如权利要求1所述的方法,其特征在于,所述组件中的至少一个上的所述导线(6,7,11,15,16)存在于所述组件的顶部。
10.如权利要求1所述的方法,其特征在于,所述组件中的至少一个上的所述导线(6,7,11,15,16)被包括在作为所述组件的一部分的钝化层(26,28)中。
11.如权利要求1所述的方法,其特征在于,所述组件之一的导线位于绕所述组件的接触区的周线行进的凹陷(22)中,并且其中另一组件的导线从所述组件的表面向外延伸,使得通过共形锁钥机制来进一步增强对准。
12.一种用于将第一微电子组件接合到第二微电子组件的方法,其中所述第一微电子组件和第二微电子组件根据如前述权利要求中的任一项所述的方法来对准,此后是建立所述组件之间的永久接合的步骤。
13.一种两个或更多个微电子组件的组装件,包括与第二微电子组件(1)对准的至少一个第一微电子组件(3),所述第一微电子组件和第二微电子组件两者包括接触区(4,2),所述接触区由润湿层(5)覆盖,所述第一微电子组件和第二微电子组件的接触区是互补的,所述组件中的每一个提供有用于将对准液体包含在所述润湿层上的装置,其中所述组件(1,3)中的每一个还提供有沿相应接触区的周线行进的一个或多个导线(6,7,11,15,16),所述第一微电子组件和第二微电子组件的导线面向彼此,并且其中所述组件中的至少一个提供有用于向其导线施加电荷的装置。
14.如权利要求13所述的组装件,其特征在于,在所述组件中的至少一个上,用于将液体包含在所述润湿层上的所述装置包括沿所述接触区的周线行进的至少一个抗湿材料带(8,12,17,18)。
15.如权利要求13到14中的任一项所述的组装件,其特征在于,在所述组件中的至少一个上,用于将液体维持在所述润湿层上的所述装置包括围绕所述接触区(2,4)的垂直侧壁(24,31)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP13198464 | 2013-12-19 | ||
EP13198464.3 | 2013-12-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104733327A CN104733327A (zh) | 2015-06-24 |
CN104733327B true CN104733327B (zh) | 2018-11-23 |
Family
ID=49886699
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410778317.8A Active CN104733327B (zh) | 2013-12-19 | 2014-12-15 | 用于对准微电子组件的方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US9601459B2 (zh) |
EP (1) | EP2889900B1 (zh) |
CN (1) | CN104733327B (zh) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2889900B1 (en) * | 2013-12-19 | 2019-11-06 | IMEC vzw | Method for aligning micro-electronic components using an alignment liquid and electrostatic alignment as well as corresponding assembly of aligned micro-electronic components |
CN104752239B (zh) * | 2013-12-31 | 2019-07-23 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件、制备方法及封装方法 |
US10068181B1 (en) * | 2015-04-27 | 2018-09-04 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafer and methods for making the same |
US10538056B2 (en) * | 2015-09-11 | 2020-01-21 | Himax Display, Inc. | Assembly structure, method to form assembly structure and method to form close-loop sealant structure |
US10032751B2 (en) * | 2015-09-28 | 2018-07-24 | Invensas Corporation | Ultrathin layer for forming a capacitive interface between joined integrated circuit components |
US10553455B2 (en) * | 2016-03-17 | 2020-02-04 | Tokyo Electron Limited | Method for aligning chip components relative to substrate by using liquid |
US9773741B1 (en) | 2016-08-17 | 2017-09-26 | Qualcomm Incorporated | Bondable device including a hydrophilic layer |
US11764198B2 (en) * | 2017-03-02 | 2023-09-19 | Ev Group E. Thallner Gmbh | Method and device for bonding of chips |
FR3063832B1 (fr) * | 2017-03-08 | 2019-03-22 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede d'auto-assemblage de composants microelectroniques |
US11121301B1 (en) | 2017-06-19 | 2021-09-14 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafers and their methods of manufacture |
CN109285825B (zh) * | 2017-07-21 | 2021-02-05 | 联华电子股份有限公司 | 芯片堆叠结构及管芯堆叠结构的制造方法 |
US10141475B1 (en) * | 2017-12-24 | 2018-11-27 | Mikro Mesa Technology Co., Ltd. | Method for binding micro device to conductive pad |
US10643880B2 (en) * | 2018-02-13 | 2020-05-05 | Mikro Mesa Technology Co., Ltd. | Method for transferring micro device |
US10312218B1 (en) * | 2018-07-20 | 2019-06-04 | Mikro Mesa Technology Co., Ltd. | Method for binding micro device to substrate |
US10593853B1 (en) * | 2019-01-30 | 2020-03-17 | Mikro Mesa Technology Co., Ltd. | Method for binding micro device on substrate |
US10986737B2 (en) * | 2019-03-28 | 2021-04-20 | Mikro Mesa Technology Co., Ltd. | Method of restricting micro device on conductive pad |
US10959336B2 (en) * | 2019-03-28 | 2021-03-23 | Mikro Mesa Technology Co., Ltd. | Method of liquid assisted binding |
CN111834248B (zh) * | 2019-04-23 | 2023-11-07 | 美科米尚技术有限公司 | 用于转移微型元件的方法 |
US10797009B1 (en) * | 2019-07-09 | 2020-10-06 | Mikro Mesa Technology Co., Ltd. | Method for transferring micro device |
US10777527B1 (en) * | 2019-07-10 | 2020-09-15 | Mikro Mesa Technology Co., Ltd. | Method for transferring micro device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102009050426B3 (de) * | 2009-10-22 | 2011-03-31 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zum ausgerichteten Aufbringen von Bauteilen auf einem Trägersubstrat und ein Verfahren zur Herstellung eines Trägersubstrats dafür und ein Verfahren zur Bestückung eines Zielsubstrats damit. |
CN102696098A (zh) * | 2009-12-28 | 2012-09-26 | 东京毅力科创株式会社 | 安装方法和安装装置 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5866281A (en) * | 1996-11-27 | 1999-02-02 | Wisconsin Alumni Research Foundation | Alignment method for multi-level deep x-ray lithography utilizing alignment holes and posts |
US5919606A (en) * | 1997-05-09 | 1999-07-06 | University Technology Corporation | Liquid crystal cell and method for assembly thereof |
US6049974A (en) | 1998-04-29 | 2000-04-18 | National Semiconductor Corporation | Magnetic alignment apparatus and method for self-alignment between a die and a substrate |
US6536106B1 (en) * | 1999-06-30 | 2003-03-25 | The Penn State Research Foundation | Electric field assisted assembly process |
US6433411B1 (en) * | 2000-05-22 | 2002-08-13 | Agere Systems Guardian Corp. | Packaging micromechanical devices |
US6518679B2 (en) | 2000-12-15 | 2003-02-11 | International Business Machines Corporation | Capacitive alignment structure and method for chip stacking |
CA2448736C (en) * | 2001-06-05 | 2010-08-10 | Mikro Systems, Inc. | Methods for manufacturing three-dimensional devices and devices created thereby |
DE10144704B4 (de) * | 2001-09-11 | 2007-10-04 | Infineon Technologies Ag | Verfahren zum Verbinden eines Bauelements mit einem Träger |
US6879143B2 (en) * | 2002-04-16 | 2005-04-12 | Motorola, Inc. | Method of selectively aligning and positioning nanometer-scale components using AC fields |
US6916584B2 (en) * | 2002-08-01 | 2005-07-12 | Molecular Imprints, Inc. | Alignment methods for imprint lithography |
US6710436B1 (en) * | 2002-12-12 | 2004-03-23 | Sun Microsystems, Inc. | Method and apparatus for electrostatically aligning integrated circuits |
US7087456B2 (en) * | 2003-10-07 | 2006-08-08 | Zyvex Corporation | Stiction resistant release process |
US7446926B2 (en) * | 2004-09-27 | 2008-11-04 | Idc, Llc | System and method of providing a regenerating protective coating in a MEMS device |
US20060234405A1 (en) * | 2005-04-13 | 2006-10-19 | Best Scott C | Semiconductor device with self-aligning contactless interface |
US20080083818A1 (en) * | 2006-10-06 | 2008-04-10 | Asml Netherlands B.V. | Measuring the bonding of bonded substrates |
US7946174B2 (en) * | 2007-12-07 | 2011-05-24 | METAMEMS Corp. | Decelerometer formed by levitating a substrate into equilibrium |
US8580612B2 (en) * | 2009-02-12 | 2013-11-12 | Infineon Technologies Ag | Chip assembly |
US8926065B2 (en) * | 2009-08-14 | 2015-01-06 | Advanced Liquid Logic, Inc. | Droplet actuator devices and methods |
US8102064B2 (en) | 2010-04-08 | 2012-01-24 | Nanya Technology Corp. | Electrical alignment mark set and method for aligning wafer stack |
WO2012133760A1 (ja) * | 2011-03-30 | 2012-10-04 | ボンドテック株式会社 | 電子部品実装方法、電子部品実装システムおよび基板 |
JP2012256737A (ja) | 2011-06-09 | 2012-12-27 | Sony Corp | 半導体装置及び半導体装置の製造方法 |
US20130199831A1 (en) * | 2012-02-06 | 2013-08-08 | Christopher Morris | Electromagnetic field assisted self-assembly with formation of electrical contacts |
US9223317B2 (en) * | 2012-06-14 | 2015-12-29 | Advanced Liquid Logic, Inc. | Droplet actuators that include molecular barrier coatings |
KR101681437B1 (ko) * | 2012-09-23 | 2016-11-30 | 도호쿠 다이가쿠 | 칩 지지 기판, 칩 지지 방법, 3차원 집적 회로, 어셈블리 장치 및 3차원 집적 회로의 제조 방법 |
EP2889900B1 (en) * | 2013-12-19 | 2019-11-06 | IMEC vzw | Method for aligning micro-electronic components using an alignment liquid and electrostatic alignment as well as corresponding assembly of aligned micro-electronic components |
-
2014
- 2014-11-13 EP EP14192965.3A patent/EP2889900B1/en active Active
- 2014-12-15 CN CN201410778317.8A patent/CN104733327B/zh active Active
- 2014-12-19 US US14/576,637 patent/US9601459B2/en active Active
-
2017
- 2017-03-13 US US15/457,744 patent/US9799632B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102009050426B3 (de) * | 2009-10-22 | 2011-03-31 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zum ausgerichteten Aufbringen von Bauteilen auf einem Trägersubstrat und ein Verfahren zur Herstellung eines Trägersubstrats dafür und ein Verfahren zur Bestückung eines Zielsubstrats damit. |
CN102696098A (zh) * | 2009-12-28 | 2012-09-26 | 东京毅力科创株式会社 | 安装方法和安装装置 |
Also Published As
Publication number | Publication date |
---|---|
US20170186733A1 (en) | 2017-06-29 |
EP2889900A3 (en) | 2015-10-28 |
US9601459B2 (en) | 2017-03-21 |
EP2889900A2 (en) | 2015-07-01 |
US9799632B2 (en) | 2017-10-24 |
CN104733327A (zh) | 2015-06-24 |
US20150179605A1 (en) | 2015-06-25 |
EP2889900B1 (en) | 2019-11-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104733327B (zh) | 用于对准微电子组件的方法 | |
CN104576798B (zh) | 太阳能电池模块及其制造方法 | |
CN106531700B (zh) | 一种芯片封装结构及其封装方法 | |
CN107146779B (zh) | 指纹识别芯片的封装结构及封装方法 | |
CN105957845A (zh) | 一种带有电磁屏蔽的芯片封装结构及其制作方法 | |
US11342308B2 (en) | Semiconductor device and manufacturing method for semiconductor device | |
US8866273B2 (en) | Lead frame and semiconductor package structure thereof | |
CN103824867B (zh) | 电连接晶圆的方法和用该方法制造的半导体设备 | |
US9403672B2 (en) | Chip package and method of manufacturing the same | |
CN103137566A (zh) | 用于形成集成电路的方法 | |
KR20170118203A (ko) | 금속 규화물을 사용하여 형성된 마이크로전자 조립체 및 제조 방법 | |
CN104979226B (zh) | 一种铜的混合键合方法 | |
CN109390353A (zh) | 半导体元件及其制作方法 | |
CN106129038A (zh) | 集成电路芯片及其制作方法 | |
CN105938820A (zh) | 电子装置及其电子封装 | |
CN108155160A (zh) | 指纹识别芯片的封装结构及封装方法 | |
US10340229B2 (en) | Semiconductor device with superior crack resistivity in the metallization system | |
CN207977307U (zh) | 指纹识别芯片的封装结构 | |
KR101662386B1 (ko) | 지지 기판을 이용한 플렉서블 소자 제조 방법 및 이에 의하여 제조된 플렉서블 소자 | |
CN207503967U (zh) | 指纹识别芯片的封装结构 | |
CN207038516U (zh) | 硅通孔芯片的二次封装体 | |
CN105575827B (zh) | 用于把半导体管芯附接到载体的方法 | |
CN105742197B (zh) | 一种键合晶圆结构及其制备方法 | |
WO2011148445A1 (ja) | 半導体装置及びその製造方法 | |
CN107644845A (zh) | 指纹识别芯片的封装结构及封装方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |