CN103824867B - 电连接晶圆的方法和用该方法制造的半导体设备 - Google Patents

电连接晶圆的方法和用该方法制造的半导体设备 Download PDF

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CN103824867B
CN103824867B CN201310573253.3A CN201310573253A CN103824867B CN 103824867 B CN103824867 B CN 103824867B CN 201310573253 A CN201310573253 A CN 201310573253A CN 103824867 B CN103824867 B CN 103824867B
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wafer
contact hole
conductive region
docking contact
docking
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CN103824867A (zh
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全寅均
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SK Hynix Inc
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Siliconfile Technologies Inc
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Abstract

本发明涉及用于电连接晶圆的方法，该方法通过氧化物至氧化物接合方法物理地接合两个晶圆，并随后通过对接接触结构电连接这个两个晶圆。晶圆通过相对简单的方法彼此物理接合，并随后通过TSV或对接接触孔彼此电连接。因此，由于可以简化制造工艺，故可以减少工艺错误，并且可以改善产品产量。

Description

电连接晶圆的方法和用该方法制造的半导体设备
技术领域
本发明涉及电连接两个晶圆的方法，尤其涉及使用对接接触结构电连接晶圆的方法，这种方法根据氧化物至氧化物（oxide-to-oxide）接合方法物理接合两个晶圆并随后使用对接接触结构电连接两个晶圆。
背景技术
最近，通过减小晶圆上的设备的尺寸来减小集成电路的物理尺寸的方法已经到达极限。为了突破上述极限，竖直堆叠两个或更多个晶圆的方法已经被提出。
图1是通过金属至金属接合方法制造的传统半导体设备的截面图。
为了便于说明，假设图1的半导体设备是图像传感器的一部分。该半导体设备包括上部晶圆110和下部晶圆120。上部晶圆110包括光电二极管PD以及浮置扩散器（floatingdiffusion）FD，其中光电二极管PD用于生成与从顶部入射的光的量相对应的电荷，浮置扩散器FD用于临时地储存这些电荷。下部晶圆120包括除了光电二极管PD之外的构成图像传感器的元件。
参照图1，内部实施有不同元件的两个晶圆彼此接合在一起。在图1中，A、B、C和D代表形成有金属（作为导电材料）或多晶硅的区域。形成在上部晶圆110中的区域A和C必须分别电连接至形成在下部晶圆120中的区域B和D。
当半导体制造工艺完成时，晶圆的上表面通过绝缘材料覆盖。因此，当两个晶圆的上表面彼此物理接合时，这两个晶圆彼此电绝缘。因此，为了电连接两个晶圆，必须在这两个晶圆的接合部分上形成导电材料。导电材料必须彼此物理接合。
参照图1，导电材料诸如铜（Cu）可形成在形成于上部晶圆110中的区域A和C的表面上和形成于下部晶圆120中的区域B和D的表面上。
根据上面描述的传统金属至金属（metal-to-metal）的接合方法，两个晶圆110和120通过形成于上部晶圆110和下部晶圆120的区域A至D的表面上的导电层彼此电连接。因此，晶圆的厚度不可避免地增加了。在晶圆厚度增加的情况下，用于在形成于这两个晶圆110和120中的元件之间进行电连接的导线的长度也增加了。因此，无法忽视由导线阻抗导致的功率损耗。
此外，在制造晶圆中的每一个时，必须在接合工艺中单独执行形成用于电连接的导电层的工艺。因此，不可避免地增加了执行该工艺所需的时间。
发明内容
因此，本发明致力于解决现有技术中出现的问题，本发明的目的是提供一种使用对接接触结构电连接晶圆的方法，在接合晶圆时，该方法使用氧化物至氧化物接合方法作为物理接合工艺并使用TSV或对接接触方法作为电接合工艺，从而简化了多余的工艺。
本发明的另一个目的是提供一种半导体设备，其通过使用对接接触结构的电连接晶圆的方法制造，在接合晶圆时，该方法使用氧化物至氧化物接合方法作为物理接合工艺并使用TSV或对接接触方法作为电接合工艺，从而简化了多余的工艺。
为了实现上述目的，根据本发明的一个方面，提供了一种用于电连接晶圆的方法，该方法使用对接接触孔结构将受到一系列工艺的第一晶圆和第二晶圆电连接。该方法包括：通过绝缘体至绝缘体接合方法物理地接合第一晶圆和第二晶圆；以及通过使用硅穿孔（TSV）或对接接触孔的金属至金属接合方法将第一晶圆的第一导电区域电连接至第二晶圆的与第一导电区域相对应的第二导电区域。
根据本发明的另一个方面，提供了一种半导体设备，其包括彼此电连接的第一晶圆和第二晶圆。第一晶圆包括构成CMOS图像传感器的多个元件中的一个或多个，以及第二晶圆包括像素驱动电路和构成CMOS图像传感器的多个元件中除了形成于第一晶圆中的元件之外的其它元件。
附图说明
在结合附图阅读了下面的详细描述之后，本发明的上述目的、以及其它特征和优点将变得显而易见，在附图中：
图1是通过金属至金属接合方法制造的传统半导体设备的截面图；
图2是通过根据本发明的一个实施方式的用于电连接晶圆的方法制造的半导体设备的截面图；
图3A示出两个晶圆彼此物理接合；
图3B示出从第一晶圆的基板向第一导电区域形成第一对接接触孔；以及
图3C示出从第一导电区域向第二导电区域形成第二对接接触孔。
具体实施方式
现在将更加详细地参照本发明的优选实施方式，该优选实施方式的实施例在附图中示出。在整个附图和说明书中，相同的参考标号将尽可能的表示相同或相似的部件。
图2是通过根据本发明的一个实施方式的用于电连接晶圆的方法制造的半导体设备的截面图。
参照图2，根据本发明的一个实施方式的用于半导体设备的物理接合工艺是通过氧化物至氧化物接合方法实施的。根据该氧化物至氧化物接合方法，覆盖有氧化物的上部晶圆210和下部晶圆220彼此物理接合。因此，两个晶圆210和220彼此电绝缘。当应用该方法时，可以只考虑两个晶圆210和220之间的对准。因此，可以相对容易地执行该接合工艺。
图2示出两个晶圆210和220根据氧化物至氧化物接合方法彼此接合。然而，这仅仅是一个实施例，作为氧化物至氧化物接合方法的替代，两个晶圆210和220可通过另一种接合方法彼此接合。
在图1的传统半导体设备中，两个晶圆110和120之间的接合部被分为导体（Cu）和氧化物。然而，在图2的实施方式中，两个晶圆210和220之间的整个接合部都是氧化物。在图2中，F表示在物理接合之后形成的对接接触孔。对接接触孔将在下面进行描述。
形成于第一晶圆210中的第一导电区域A和C通过第一对接接触孔E和第二对接接触孔F电连接至形成于第二晶圆220中的第二导电区域B和D，其中第一对接接触孔E穿过第一晶圆210的基板形成于第一导电区域A和C中，第二对接接触孔F分别形成在第一导电区域A和C与第二导电区域B和D之间。
第一对接接触孔E填充有绝缘材料，第二对接接触孔F填充有导电材料。因此，仅所需部分可电连接至彼此。
图2示出第一对接接触孔E的截面积比第二对接接触孔F的截面积更大。然而，第一和第二对接接触孔E和F可具有相同的截面积。对本领域技术人员来说，第一和第二对接接触孔E和F被形成为具有不同截面积还是相同截面积不是特殊技术。因此，文中将省略其详细描述。
当形成第一和第二对接接触孔E和F时，可以在不考虑第一和第二对接接触孔E和F是具有不同的截面积或是相同的截面积的情况下常规地执行接下来的工艺：涂覆光刻胶、将掩模中形成的预定图案反射至光刻胶上，并且光刻胶被烘焙并随后被蚀刻。
下面将描述制造图2的半导体设备的工艺。
图3A至3C是示出制造图2的半导体设备的工艺的截面图。
图3A示出两个晶圆彼此物理接合。
图3B示出从第一晶圆的基板向第一导电区域形成第一对接接触孔；以及
图3C示出从第一导电区域向第二导电区域形成第二对接接触孔。
参照图3A，当两个晶圆210和220物理地彼此接合时，形成于两个晶圆210和220的表面上的氧化物彼此接合。因此，这种方法被称为氧化物至氧化物接合方法，并且形成于两个晶圆210和220中的元件彼此电绝缘。
参照图3B，第一对接接触孔E从第一晶圆210的基板向第一导电区域A和C形成。在这一工艺中，使用具有图案的掩模通过光刻胶工艺和蚀刻工艺形成第一对接接触孔E。
通常，晶圆的形成有半导体元件的基板具有相当大的厚度。然而，在第一对接接触孔E被形成之前，第一晶圆210的基板的底部被研磨以使基板的厚度小于第二晶圆220的基板（Si）。参照图2，可见，第一晶圆210在底部处的基板的厚度比第二晶圆220在顶部处的基板更大。第一对接接触孔E通过蚀刻工艺形成。因此，当待蚀刻基板的厚度很小时，蚀刻时间减少。
用于调整第一晶圆210的基板的厚度的时间是可调整的。该工艺可在图3A的物理接合工艺之前执行或可以在图3B的工艺之前并在图3A的物理接合工艺之后执行。
参照图3C，第二对接接触孔F从第一导电区域A和C向第二导电区域B和D形成。在这一工艺中，使用具有图案的掩模通过光刻胶工艺和蚀刻工艺形成第一对接接触孔F。当这两个对接接触孔E和F被形成为具有如图3C所示的不同截面积时，第一和第二对接接触孔E和F可轻易地区别于彼此。
如上所述，两个对接接触孔E和F可依次通过两个工艺形成。然而，当两个对接接触孔E和F不需要具有不同截面积时，可通过一个蚀刻工艺形成包括两个对接接触孔E和F的一个对接接触孔。在这种情况下，由于对接接触孔通过一个工艺形成，故该工艺可以被简化，并且该工艺的时间可以减少。
在本实施方式中，硅穿孔（TSV,through-silicon via）可用于取代对接接触孔。根据TSV方法，硅晶圆被分为多个具有几十微米厚度的芯片，并且相同芯片被竖直地堆叠并通过贯通电极（through-electrode）连接。这种方法的优点在于，与堆叠的芯片通过导线连接的传统导线接合方法相比，可以减小芯片的厚度和功耗。
即使应用任何方法，本发明的实施方式都可获得相同的效果。
根据本发明的实施方式，晶圆通过比金属至金属接合方法更简单的氧化物至氧化物接合方法物理地彼此接合，并随后通过TSV或对接接触孔电连接至彼此。因此，由于简化了制造工艺，故可以减少工艺错误，并且可以改善产品产量。
虽然本已经出于示意性目的而描述了发明的优选实施方式，但本领域技术人员应理解，在不背离如所附权利要求所公开的本发明的精神和范围的情况下，可以进行各种修改、增加和替换。

Claims (9)

1.用于电连接晶圆的方法，所述方法使用对接接触孔结构将受到一系列工艺的第一晶圆和第二晶圆电连接，所述方法包括：
通过绝缘体至绝缘体接合方法物理地接合所述第一晶圆和第二晶圆；以及
通过金属至金属接合方法将所述第一晶圆的第一导电区域电连接至所述第二晶圆的与所述第一导电区域相对应的第二导电区域，其中金属至金属接合方法使用了对接接触孔，
其中，将所述第一晶圆的所述第一导电区域电连接至所述第二晶圆的所述第二导电区域的步骤包括：
形成对接接触孔以通过所述第一晶圆的基板底部和所述第一导电区域到达所述第二导电区域；
向所述对接接触孔的与所述第一导电区域和所述第一导电区域与所述第二导电区域之间的区域相对应的部分中填充导电材料；以及
向所述对接接触孔的未填充所述导电材料的其它部分中填充绝缘材料。
2.如权利要求1所述的方法，其中形成所述对接接触孔的步骤包括：
形成第一对接接触孔以通过所述第一晶圆的基板底部到达所述第一导电区域；以及
形成第二对接接触孔以通过所述第一导电区域到达所述第二导电区域。
3.如权利要求2所述的方法，其中填充绝缘材料的步骤包括向所述第一对接接触孔中填充绝缘材料，以及填充导电材料的步骤包括向所述第二对接接触孔中填充导电材料。
4.如权利要求3所述的方法，其中所述第一对接接触孔具有比所述第二对接接触孔更大的截面积。
5.如权利要求1所述的方法，还包括通过研磨所述第一晶圆的基板底部将所述第一晶圆的基板底部移除至预定厚度。
6.如权利要求5所述的方法，其中移除所述第一晶圆的基板底部的步骤在物理接合所述第一晶圆和所述第二晶圆之前执行或在电接合所述第一晶圆的所述第一导电区域和所述第二晶圆的所述第二导电区域之前并在物理接合所述第一晶圆和所述第二晶圆之后执行。
7.如权利要求1所述的方法，其中所述物理接合所述第一晶圆和所述第二晶圆的步骤包括通过氧化物至氧化物接合方法物理接合所述第一晶圆和所述第二晶圆。
8.半导体设备，包括第一晶圆和第二晶圆，
其中所述第一晶圆和所述第二晶圆中的每个包括基板、位于所述基板上方的导电区域、以及覆盖所述基板和所述导电区域的绝缘层，
其中所述第一晶圆的所述绝缘层与所述第二晶圆的所述绝缘层彼此通过绝缘体至绝缘体接合方法接合以使得所述第一晶圆与所述第二晶圆彼此物理地接合，
其中第一对接接触孔从所述第一晶圆的基板向所述第一晶圆的所述导电区域形成，而第二对接接触孔从所述第一晶圆的所述导电区域向所述第二晶圆的所述导电区域形成，并且其中所述第一晶圆的所述导电区域与所述第二晶圆的导电区域通过使用所述第一对接接触孔和所述第二对接接触孔的金属至金属接合方法电连接，
其中所述第一晶圆包括构成CMOS图像传感器的多个元件中的一个或多个，以及
所述第二晶圆包括像素驱动电路和构成CMOS图像传感器的多个元件中除了形成于所述第一晶圆中的元件之外的其它元件，
其中，所述第一对接接触孔和所述第二对接接触孔中与所述第一晶圆的所述导电区域和所述第一晶圆的所述导电区域与所述第二晶圆的所述导电区域之间的区域相对应的部分填充有导电材料，以及
其中，所述第一对接接触孔和所述第二对接接触孔中未填充所述导电材料的其它部分填充有绝缘材料。
9.如权利要求8所述的半导体设备，其中所述第一晶圆包括构成CMOS图像传感器的多个元件之中用于生成与入射光相对应的电荷的光电二极管。
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