CN104520979B - 将具有接触元件的芯片固定到设置有带有芯片接触元件的开口的功能层的衬底上的方法 - Google Patents
将具有接触元件的芯片固定到设置有带有芯片接触元件的开口的功能层的衬底上的方法 Download PDFInfo
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- CN104520979B CN104520979B CN201380020754.7A CN201380020754A CN104520979B CN 104520979 B CN104520979 B CN 104520979B CN 201380020754 A CN201380020754 A CN 201380020754A CN 104520979 B CN104520979 B CN 104520979B
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Abstract
本发明涉及在分布于衬底(1)表面(1o)上的芯片位置(1c)将芯片(4)固定到衬底(1)上的方法,在衬底(1)上形成或者涂覆功能层(7)(例如具有B阶特性的聚合物),至少在触点(2)的区域中暴露所述的功能层,在芯片位置(1c)将芯片(4)固定到功能层(7)的芯片接触侧(7o)上,通过接触元件(3)与触点(2)形成接触。暴露功能层区域还可以包括暴露布置在芯片位置(1c)之外的表面(1o)的自由面(1f)和形成始于触点(2)终于自由面(1f)的沟道(5)。所主张的解决方案能改善芯片的电接触,同时能提高定位精度,因为接触元件不必贯穿功能层,并且也扩大了功能层可用材料的选择范围,因为既不需要毛细作用将功能层加入到芯片和衬底表面之间,也不需要使用排挤力利用接触元件贯穿功能层。
Description
本发明涉及用于在分布于衬底表面上的芯片位置将芯片固定到衬底上的方法。
通常通过凸点使得芯片与嵌入在衬底中的接合焊盘(即导电触点)结合。使用底部填充材料克服芯片与衬底之间的距离,并且在芯片与衬底之间形成机械连接,所述底部填充材料也可用来减轻芯片或衬底对凸点的机械载荷。底部填充材料能将芯片的使用寿命提高很多倍。主要可提高接合连接在温度变化和/或者机械负荷作用下的交变疲劳强度。
例如在实践中可在通过喷墨法或者离心加速法涂覆底部填充材料之后,通过毛细作用将低粘度的底部填充材料加入到芯片与衬底之间。通过上述方法可选用的材料有限,并且如果芯片与衬底表面之间的距离很小,例如小于50μm,那么上述流程就非常耗费时间或者无法实现。
尤其当芯片与衬底表面之间的距离很小的时候,可采用的另一种可选方法是在放上芯片之前将底部填充材料涂覆到衬底上。例如可将底部填充材料作为薄膜贴合到衬底上,通过离心涂覆或者喷涂法,或者通过涂覆膏状材料的方式使得底部填充材料分布在衬底上。
因此尤其可通过“点固”将芯片预先固定在与衬底对齐的相应芯片位置中,使得放在底部填充材料上的芯片在接合之前(多数在独立的腔室中进行接合)不会在衬底上滑动。其优点是可以给整个衬底装上芯片,然后才可以执行所有芯片的接合工艺。
但是如果采用此类方法,芯片与衬底之间的导电连接仍然面临技术问题,按照已知的方式,尤其要通过从芯片延伸到衬底中的相应触点的凸点或针脚实现导电连接。另一个技术问题在于选择底部填充材料的材料特性,因为该材料一方面应有粘合作用(用于点固),另一方面也要有支撑作用。除此之外,底部填充材料对定位精度的影响应当尽可能少。同时还要尽可能迅速地处理底部填充材料,尤其在进行点固和/或者接合的时候。
本发明的任务在于,阐述一种将芯片固定到衬底上的方法,所述方法具有很高的处理能力和很高的定位精度,并且改善了芯片的电接触。
采用用于在分布于衬底表面上的芯片位置将芯片固定到衬底上的方法的特征即可解决这一任务。本发明也包括说明部分、权利要求和/或者附图中所述的至少两种特征构成的所有组合。如果注明了值范围,则所述界限之内的值也应作为极限值公开,并且可在任意的组合中主张其权利。
本发明的基本思路是至少在触点区域中的芯片位置上形成本发明所述的功能层,从而给接触元件提供将芯片与衬底触点形成电接触的自由空间。按照本发明所述,这样导致处理能力提高,并且因此可带来经济和/或者技术上的好处。
芯片位置就是衬底表面上的一些面,将芯片平行于衬底表面相隔一定距离定位在这些面上。通过接触元件尤其通过凸点或针脚实现电连接。触点可以具有能够弥补关于芯片与晶片之间距离的容差的结构。例如触点可以由串联布置的金属和合金构成,其中该合金具有低熔点。当芯片通过触点与晶片形成接触时,合金就会在高于其熔点的工作温度下熔化,从而能够在芯片和晶片之间形成较好的平行度。上述串联实施的触点不仅可以在芯片的底侧上,而且也可以在相应晶片的上侧上。可想而知,也可以在芯片和晶片上采用这种串联实施。
结合使用或者单独使用本发明所述的以上措施,可以改善芯片的电接触,同时能提高定位精度,因为接触元件不必贯穿功能层。除此之外,还扩大了功能层可用材料的选择范围,因为既不需要毛细作用将功能层加入到芯片和衬底表面之间,也不需要使用排挤力利用接触元件贯穿功能层。这对于那些要求芯片与衬底表面之间距离很小的应用来说特别有益,因为当距离小于50μm尤其小于30μm同时芯片面积较大的时候,基于毛细作用的常规方法不起作用。提高针脚或凸点的接触密度通常也会减小芯片与衬底表面之间的距离。按照本发明所述,凸点之间的距离(即触点间距)与芯片和衬底表面之间的高度差之比在3∶1和1∶2之间。
按照本发明的一种有益实施方式规定,尤其直接在固定之前使用溶剂处理芯片接触侧上的功能层,从而引起进行固定所需的粘附性。如果采用本发明所述的这一措施,就可以放弃将粘结材料用于功能层。尤其可通过涂覆到芯片接触侧和/或者功能层上的溶剂进行固定(点固)。尤其可以涂覆极少量的溶剂,涂覆量适宜小于1ml/mm2,比较适宜小于0.1ml/mm2,更适宜小于0.01ml/mm2,最适宜小于0.001ml/mm2。因此按照本发明所述,可以将溶剂要么全面涂覆到功能层上,或者涂覆到每个芯片的接触侧上。当芯片与功能层接触时,功能层的固定层就会在芯片接触侧上液化,并且通过至少部分蒸发溶剂使得芯片固定到功能层上。在一定程度上将固定层重新转变为功能层。
对之备选地按照本发明的另一种有益实施方式规定,给芯片接触侧上的功能层设置粘附层,尤其是设置暂时性的粘合剂。该实施方式的优点在于:可以针对功能层选择材料,精确选择所需的物理和/或者化学特性,而粘附层仅仅起到固定作用,并且可以相应地最优地作出选择。
在另一种替代方案中,有利地可首先直接在放置芯片之前将粘附层涂覆到芯片上。
按照另一种实施方式可能的是,功能层具有所谓的B阶特性。具有B阶特性的材料可以通过温度、紫外光和/或者其它已知的化学和/或者物理过程从某一状态变为另一状态。因此本情况下所指的尤其是功能层的聚合物材料只有在放置之后才会发生交联反应。主要但并非仅仅来自IC封装领域的专业人士均熟悉这些B阶特性。
可以设想,在芯片到晶片上的接合过程之前,功能层的厚度大于芯片底侧与晶片上侧之间的距离。然后通过压力对该层进行压缩和/或者排挤,从而保证将芯片和衬底之间的体积完全填满。
在上述这两种可替代的实施方式中,按照本发明规定,在随后的接合工艺中使得溶剂或者粘附层完全蒸发,尤其没有残留物。
如果暴露还包括暴露布置在芯片位置之外的表面的自由面,则可以将功能层热膨胀对定位结果的影响减小到最低程度。所述自由面尤其经过适当设计,使得尤其由模塑合成物构成的最终封装的部分能够固定在这些自由面上。
按照本发明的改进实施方式规定,暴露还包括在功能层中形成沟道。这样一方面可将功能层热膨胀引起的影响进一步减小,另一方面还可通过这些沟道平衡功能层空腔中的压力波动,尤其当这些沟道朝向触点或者朝向通过暴露产生的自由空间一直延伸到自由面或者周围环境的时候。
通过功能层由低弹性材料构成的方式,所述材料具有大于10kN/mm2、适宜大于20kN/mm2的弹性模量。这样就能在很大程度上避免功能层移动引起的对准误差。
按照另一种有益的实施方式,通过光电结构化(Fotostrukturierung)进行暴露触点、暴露自由面和/或者沟道,其中规定尤其采用以下步骤,优选采用以下流程:
-对具有相应掩膜的功能层进行曝光,
-剥离(去除)应暴露的面。
有利地按照本发明另一种实施方式规定,在暴露触点时在功能层中形成一直延伸到触点、尤其相对于触点同心布置的通孔,尤其是其中所述通孔直径D1大于接触元件的直径D2。采用这种实施方式能在很大程度上将通孔边缘处的应力减小到最低程度。该方法同样适用于正方形或矩形的触点。
作为独立的发明,公开了一种尤其可通过上述方法制备的衬底,所述衬底具有涂覆在衬底表面上的功能层,在衬底的触点区域中的芯片位置暴露功能层。
在衬底的改进实施方式中,按照本发明有利地规定,衬底具有在芯片位置固定到功能层的芯片接触侧上的芯片,通过接触元件使得芯片与衬底的触点相连。
关于本发明的其它优点、特征和详细说明,可参阅以下优选实施例的说明部分以及附图。附图如下:
附图1a是具有按照本发明所述涂覆有功能层的本发明所述衬底的横截面示意图,
附图1b是附图1a所示功能层的俯视图,
附图2a是附图1a所示衬底在本发明所述的暴露步骤之后的横截面图,
附图2b是附图2a所示衬底的俯视图,
附图3a是衬底在本发明所述暴露沟道的另一个步骤之后的横截面图,
附图3b是附图3a所示衬底的俯视图,
附图4a是本发明所述将芯片固定到功能层上的另一个方法步骤的横截面图,以及
附图4b是附图4a所示衬底的俯视图。
在附图中以相同的附图标记表示相同或者作用相同的部件。
在附图1a和1b所示的方法步骤中,将低弹性(也就是设置有很高弹性模量的)功能层7涂覆到衬底的表面1o上。尤其可使用旋涂、喷涂、挤涂、贴合、气相沉积或类似方法进行涂覆。功能层7可作为支承芯片4的底部填充料或者支承材料,通过本发明所述方法将芯片固定到衬底1上。
可以全面涂覆功能层7,并且在涂覆时或者至少在涂覆过程结束时,功能层就已变硬或凝固,或者可通过相转变或聚合步骤使其转入到固态或凝固状态。可通过光刻工艺使得表面1o上布置了触点2的接触位置处的功能层7暴露,使得背离表面1o的芯片接触侧7o直至表面1o之间形成尤其是通孔9形式的自由空间。
在光刻工艺过程中将功能层7曝光、刻蚀并且去膜。必须适当进行结构化处理和曝光,使得相应的接触点在显影之后暴露出来。应对正材料或负材料使用正确的曝光步骤和正确的曝光掩膜。
尤其可按照相同的方式暴露芯片位置1c之外的功能层7,从而在表面1o上形成自由面1f。按照一种首选实施方式所述,在制作通孔9的同一个步骤中完成该操作。因此在表面1o上均匀分布布置多个(这里:16个)支承元件5,在功能层7上通过暴露形成这些支承元件。
在附图所示的实施例中,每个支承元件5均匀四个通孔9,将触点2布置在这些通孔背向芯片接触侧7o的底侧7u上。
尤其可利用以上所述的光刻工艺在功能层7中形成沟道8,这些沟道各自从自由面1f朝向通孔9延伸,尤其各有两个沟道8朝向每个通孔9延伸。因此每个支承元件5均有八个沟道8。
在附图4a和4b所示的方法步骤中,通过使用溶剂湿润功能层7的芯片接触侧7o上用来接触支承元件5的接触侧,将芯片4固定到支承元件5上。溶剂使得功能层7的芯片接触侧7o上薄薄的固定层6液化,并且可保证芯片4固着在相应的支承元件5上。本发明所述的固定指的是非永久性、可逆的连接,该连接足以将贴有芯片4的衬底1运送到独立的接合模块,而相对于衬底1精确对准的芯片4在接合模块中形成永久接合之前不会滑动。
通过接触元件3(这里:凸点)将芯片4连接到衬底1的触点2上。通孔9的直径D1大于相应(也就是平行于表面1o延伸的)的、尤其最大的接触元件3的直径D2。
按照一种优选实施方式所述,将通孔9设计成间隙小于5μm的接触元件3配合面。
作为以上所述通过溶剂进行固定的方式的备选,可设想也可以在芯片接触侧7o上涂覆暂时的粘合剂,尤其是联苄、聚乙二醇或者Novomer,以便将芯片4固定到支承元件5上。
按照本发明所述,可用于功能层7的材料尤其是:聚酰亚胺,COC,SU-8,BCB。此外可设想,还可以使用专为该应用开发的材料。如果通过硬化制备功能层7,则可作为愈合法使用的是:加热,紫外照射,施力,施加压力,磁场或者微波。
对于固定可考虑在边缘上固定、点固或者固定在芯片4和支承元件5之间的整个接触侧上。
尤其可尤其通过浸涂、喷墨、旋涂或者蒸发方式实现到芯片4和/或者支承元件5上的涂覆。
在固定之前可考虑作为预处理方法使用的是:等离子体处理,湿法腐蚀和/或者CO2-清洗。
通过形成功能层7定义表面1o和芯片接触侧之间的距离A。
附图标记清单
1 衬底
1o 表面
1c 芯片位置
1f 自由面
2 触点
3 接触元件
4 芯片
5 支承元件
6 固定层
7 功能层
7o 芯片接触侧
7u 底侧
8 沟道
9 通孔
D1 直径
D2 直径
A 距离
Claims (16)
1.用于在分布于衬底(1)的表面(1o)上的芯片位置(1c)处将芯片(4)固定到所述衬底(1)上的方法,其包括以下步骤:
-将功能层(7)形成到所述衬底(1)上,所述功能层
a)在所述芯片位置(1c)处至少在触点(2)区域中通过结构化被暴露,或者
b)通过使在形成所述功能层(7)之后在所述表面(1o)上分别在所述芯片位置(1c)处至少在所述触点(2)区域中暴露的所述功能层暴露而被暴露,
-在所述芯片位置(1c)处将所述芯片(4)固定到所述功能层(7)的芯片接触侧(7o)上,并且通过接触元件(3)接触所述触点(2),其中所述芯片接触侧(7o)上的所述功能层(7)配备有/被配备粘附层,其中所述暴露还包括在所述功能层(7)中形成沟道(8)。
2.根据权利要求1所述的方法,其中在固定之前使用溶剂处理所述芯片接触侧(7o)上的所述功能层(7),以便引起进行固定所需的粘附性。
3.根据权利要求2所述的方法,其中所述芯片接触侧(7o)上的所述功能层(7)直接在固定之前使用溶剂来处理。
4.根据权利要求1或2所述的方法,其中所述暴露还包括暴露布置在所述芯片位置(1c)之外的所述表面(1o)的自由面(1f)。
5.根据权利要求1所述的方法,其中所述沟道(8)始于所述触点(2)。
6.根据权利要求4所述的方法,其中所述沟道在所述自由面(1f)终止。
7.根据权利要求1或2所述的方法,其中所述功能层(7)由具有低弹性的材料构成。
8.根据权利要求4所述的方法,其中通过光电结构化暴露所述触点(2)和/或者暴露所述自由面(1f)和/或者形成所述沟道(8)。
9.根据权利要求4所述的方法,其中以以下步骤暴露所述触点(2)和/或者暴露所述自由面(1f)和/或者形成所述沟道(8):
-对要暴露的面上的所述功能层(7)进行曝光,
-对要暴露的面进行光刻,
-剥离要暴露的面。
10.根据权利要求1或2所述的方法,其中在暴露所述触点(2)时在所述功能层(7)中形成一直延伸到所述触点(2)的通孔(9)。
11.根据权利要求10所述的方法,其中所述通孔(9)相对于所述触点(2)同心布置。
12.根据权利要求10所述的方法,其中所述通孔具有大于接触元件(3)的直径D2的直径D1。
13.根据权利要求1或2所述的方法,其中在固定之前将所述芯片(4)与所述触点(2)对准。
14.根据权利要求1或2所述的方法,其中在固定之后将所述芯片(4)永久接合到所述功能层(7)上。
15.根据权利要求1所述的方法,其中所述功能层(7)被涂覆到所述衬底(1)上。
16.根据权利要求1所述的方法,其中所述功能层(7)在涂覆所述功能层(7)之后在所述表面(1o)上分别在所述芯片位置(1c)处至少在所述触点(2)区域中被暴露。
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