CN104465770A - 半导体装置以及其制造方法 - Google Patents

半导体装置以及其制造方法 Download PDF

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CN104465770A
CN104465770A CN201410489794.2A CN201410489794A CN104465770A CN 104465770 A CN104465770 A CN 104465770A CN 201410489794 A CN201410489794 A CN 201410489794A CN 104465770 A CN104465770 A CN 104465770A
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冈崎拓行
加茂宣卓
野上洋一
小山英寿
宫国晋一
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Mitsubishi Electric Corp
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Abstract

本发明得到一种半导体装置以及其制造方法，该半导体装置容易降低电路部的导体损耗，提高高频特性和可靠性，堆积填充材料。在Si衬底1的第1主表面上形成有由AlxGa1-xN(0≤x≤1)构成的缓冲层(2)。在缓冲层(2)上形成有由AlyGa1-yN(0≤y≤1，x≠y)构成的外延结晶生长层(5)。在外延结晶生长层(5)中形成有晶体管(8)。在从Si衬底(1)的第2主表面到达缓冲层(2)的通孔(15)中填充有填充材料(16)。填充材料(16)由与缓冲层(2)相同的组成比x的AlxGa1-xN构成。

Description

半导体装置以及其制造方法
技术领域
本发明涉及场效应晶体管以及具有场效应晶体管的MMIC，该场效应晶体管在外延结晶生长层上形成，该外延结晶生长层由设置在Si衬底上的GaN或者AlGaN构成。
背景技术
已知下述半导体装置(例如，参照专利文献1、2)，即，在Si衬底上形成由GaN或者AlGaN构成的外延结晶生长层，在该外延结晶生长层上形成场效应晶体管。
专利文献1：日本特开2009－206142号公报
专利文献2：日本特开2010－67662号公报
在现有的半导体装置中，在晶体管部、焊盘部、配线部、无源电路部的下方，隔着包含几μm厚度的GaN或者AlGaN的外延层，存在100μm左右的Si衬底。Si衬底的电阻率，即使是高电阻也仅为10e4Ωcm左右，与在高频带用的半导体装置中使用的半绝缘性GaAs衬底、SiC衬底相比，电阻率低了4～5个数量级。因此，导致电路部中的导体损耗变大。
通常，半导体装置将衬底背面接地，但是，GaN类外延层通常仅为几μm左右的厚度。因此，如果Si衬底的电阻率较低，则漏极电极与衬底背面之间的杂散电容(Cds)比使用半绝缘性的GaAs衬底或者SiC衬底的半导体装置大，而使高频特性恶化，该半绝缘性的GaAs衬底或者SiC衬底通常使用在高频带用的放大器中。
另外，Si的热传导率是1.5W/cm·K左右，与作为GaN或者AlGaN类半导体装置的衬底所使用的SiC相比，热传导率较低。因此，在晶体管内部产生的热量难于释放，导致半导体装置的热阻上升。特别是，在作为高输出用放大器使用的情况下，存在动作时的结温上升而导致可靠性降低的问题。
因此，在专利文献1、2中，通过使Si衬底的一部分由绝缘性高于Si且热传导率高于Si的填充材料进行填充，从而降低电路部的导体损耗，抑制晶体管下部的杂散电容(Cds等)的增大，提高高频特性。由于不残留Si衬底的部分能够进行高耐压·高频动作，因此，在这些专利文献中，形成从Si衬底的背面到达外延结晶生长层的通孔，并在该通孔中填充有填充材料。但是，由于外延结晶生长层与填充材料的晶格常数不同而产生缺陷，因此，存在难于将填充材料进行堆积的问题。
发明内容
本发明就是为了解决上述课题而提出的，其目的在于提供一种半导体装置以及其制造方法，该半导体装置容易降低电路部的导体损耗，提高高频特性和可靠性，堆积填充材料。
本发明所涉及的半导体装置的特征在于，具有：Si衬底，其具有彼此相对的第1以及第2主表面；缓冲层，其形成在所述Si衬底的所述第1主表面上，由AlxGa1-xN(0≤x≤1)构成；外延结晶生长层，其形成在所述缓冲层上，由AlyGa1-yN(0≤y≤1，x≠y)构成；晶体管，其形成在所述外延结晶生长层上；以及填充材料，其填充在从所述Si衬底的所述第2主表面到达所述缓冲层的通孔中，由与所述缓冲层相同的组成比x的AlxGa1-xN构成。
发明的效果
在本发明中，向Si衬底的通孔中填充填充材料，该填充材料由与缓冲层相同的组成比x的AlxGa1-xN构成，因此，容易降低电路部的导体损耗，提高高频特性和可靠性，堆积填充材料。
附图说明
图1是表示本发明的实施方式1所涉及的半导体装置的俯视图。
图2是沿图1的I-II线的剖面图。
图3是表示本发明的实施方式2所涉及的半导体装置的剖面图。
图4是表示本发明的实施方式3所涉及的半导体装置的剖面图。
图5是表示本发明的实施方式4所涉及的半导体装置的剖面图。
图6是表示本发明的实施方式5所涉及的半导体装置的剖面图。
图7是表示本发明的实施方式6所涉及的半导体装置的剖面图。
图8是表示本发明的实施方式7所涉及的半导体装置的剖面图。
标号的说明
1 Si衬底，2 缓冲层，5 外延结晶生长层，8 晶体管，10 源极电极，11 漏极电极，14 源极焊盘，15 通孔，16、20 填充材料，17 源极过孔，18 金属膜，19 金刚石薄膜
具体实施方式
参照附图，对本发明的实施方式所涉及的半导体装置以及其制造方法进行说明。有时对相同或者对应的结构要素标注相同的标号，并省略重复说明。
实施方式1
图1是表示本发明的实施方式1所涉及的半导体装置的俯视图。图2是沿图1的I-II线的剖面图。Si衬底1具有彼此相对的第1以及第2主表面。在Si衬底1的第1主表面整面且均匀地形成有由AlN构成的缓冲层2。在缓冲层2上形成有外延结晶生长层5，该外延结晶生长层5具有顺次层叠的GaN层3和AlGaN层4。
在外延结晶生长层5的局部形成活性层区域6，在活性层区域6的周围通过绝缘注入等形成有绝缘区域7。晶体管8形成于外延结晶生长层5。具体地说，在活性层区域6上并排排列有由栅极电极9、配置在该栅极电极9两侧的成对的源极电极10和漏极电极11构成场效应晶体管。由这些活性层区域6和3个电极并排排列而成的区域形成为动作区域。在夹持该动作区域的相对位置处配置有大于或等于1个的栅极焊盘12和大于或等于1个的漏极焊盘13。
动作区域内的所有栅极电极9在动作区域的外侧汇总为一个，并与栅极焊盘12连接，同样地，动作区域内的所有漏极电极11在动作区域的外侧汇总为一个，并与漏极焊盘13连接。另外，源极电极10与通常在栅极焊盘12的横向上设置的源极焊盘14连接。将源极电极10和源极焊盘14连接的配线电极隔着绝缘膜以及空气，配置在将栅极电极9捆扎而成的配线电极上。
设置有从Si衬底1的第2主表面到达缓冲层2的通孔15。在该通孔15中填充有由AlN构成的填充材料16。此外，各层的上述物质只是一个例子，缓冲层2由AlxGa1-xN(0≤x≤1)构成，外延结晶生长层5由AlyGa1-yN(0≤y≤1，x≠y)构成，填充材料16由与缓冲层2相同的组成比x的AlxGa1-xN构成。
下面，说明上述的半导体装置的制造方法。首先，在Si衬底1的第1主表面上形成AlN的缓冲层2。然后，在缓冲层2上形成外延结晶生长层5。然后，在外延结晶生长层5上形成晶体管8。然后，在Si衬底的第2主表面上，利用抗蚀剂在活性层区域6的下方以外的区域形成掩模，然后将缓冲层2作为阻挡层使用，通过SF6等氟类气体，从第2主表面开始对活性层区域6的下方的Si衬底的一部分进行干蚀刻而形成通孔15。然后，使用溅射或者CVD，向通孔15中填充AlN的填充材料16。
在本实施方式中，将Si衬底1的一部分去除，并由绝缘性比Si高且热传导率比Si高的AlxGa1-xN构成的填充材料16进行填充。由此，能够降低电路部的导体损耗，抑制晶体管下部的杂散电容(Cds等)的增大，提高高频特性。另外，能够将从晶体管8内部产生的热量经由填充材料16高效地向组件的金属基座散热，因此，能够防止可靠性的降低。
另外，填充材料16由与缓冲层2相同的组成比x的AlxGa1-xN构成。因此，缓冲层2与填充材料16的晶格匹配，因此，容易进行填充材料16的堆积。
另外，在现有装置中，为了尽量优化高频特性，使用电阻率为102～104Ωcm的高电阻Si衬底。但是，在本实施方式中，在晶体管下部以及电路部、配线部的下方填充有绝缘性较高的材料，因此，即使这些以外的部分处的Si衬底1的电阻率较低，也不会对半导体装置的高频特性造成影响。因此，即使将Si衬底1的电阻率设为小于或等于104Ωcm，也能够得到与半绝缘性衬底同样优异的高频特性。
通常，在作为高输出用的放大器使用的半导体装置中，为了得到高输出，经常在将动作电压设为大于或等于10V的高电压状态下进行动作。因此，也可以使用p型的Si衬底1。由此，能够使在施加有高电场的栅极·漏极之间产生的空穴，以短距离从源极电极10的下方的p型的Si衬底1全部移动至背面。由此，特别是，能够抑制在施加高电场时在晶体管内部产生的空穴积存在栅极电极9下方的外延结晶生长层中。其结果，能够均匀地提高活性层区域6的可靠性。
另外，通过将氮化物的缓冲层作为阻挡层使用而对Si衬底1进行蚀刻，从而容易形成通孔15。
实施方式2
图3是表示本发明的实施方式2所涉及的半导体装置的剖面图。在本实施方式中，通孔15以及填充材料16不设置在源极电极10的下方，而是设置在晶体管8的漏极电极11的下方。
使高频特性的恶化的原因是漏极电极11与衬底背面之间的电容Cds的增大，因此，可以将漏极电极11处的Si衬底1的一部分去除而置换为填充材料16。由此，能够与实施方式1相同地提高高频特性。并且，作为填充材料16堆积的AlN层的厚度在实施方式1中为几μm左右，但是，在本实施方式中能够设为更薄，因此，容易形成填充材料16。
实施方式3
图4是表示本发明的实施方式3所涉及的半导体装置的剖面图。在绝缘区域7设置有从Si衬底1的第2主表面到达晶体管8的源极焊盘14的源极过孔17。镀Au等的金属膜18设置在源极过孔17的内壁和Si衬底1的第2主表面，与源极焊盘14连接。能够通过金属膜18缩短到达接地点的距离，因此，能够将源极电感降低，提高高频特性。
实施方式4
图5是表示本发明的实施方式4所涉及的半导体装置的剖面图。当填充填充材料16时，首先将填充材料16形成在Si衬底1的第2主表面上以及通孔15内。然后利用磨削或者CMP等，对在Si衬底1的第2主表面形成的填充材料16进行切削而使其平坦化。以仅在漏极电极11的下方掩埋填充材料16的状态形成源极过孔17。通过切削衬底背面的多余的AlN，能够形成平整的背面，因此，能够得到组装性优异的半导体装置。
实施方式5
图6是表示本发明的实施方式5所涉及的半导体装置的剖面图。使用n型的Si衬底1。经由在绝缘区域7内的源极焊盘14的正下方的缓冲层2以及外延结晶生长层5上设置的开口，源极焊盘14直接与n型的Si衬底1接触。由此，表面的源极焊盘14经由n型的Si衬底1，与衬底背面的金属膜18连接，因此，不需要源极过孔17。由此，能够得到与实施方式4相同的效果，且将半导体装置制造工序简化。
实施方式6
图7是表示本发明的实施方式6所涉及的半导体装置的剖面图。使用n型的Si衬底1。经由在活性层区域6内的各源极电极10的正下方的缓冲层2以及外延结晶生长层5上设置的开口，源极电极10直接与n型的Si衬底1接触。由此，表面的源极电极10经由n型的Si衬底1，与衬底背面的金属膜18连接，因此，能够不需要绝缘区域7的源极焊盘14，而将芯片图案缩小化。另外，实现从各源极电极10以最短距离到达金属膜18的导通。由此，能够降低配线损耗、电感，能够进一步提高高频特性。
实施方式7
图8是表示本发明的实施方式7所涉及的半导体装置的剖面图。取代实施方式1的由AlN构成的填充材料16，向通孔15内的第1层中填充金刚石薄膜19，向第2层中填充AlN或者Cu的填充材料20。金刚石在半导体中也具有优异的绝缘性和热传导性。因此，能够进一步提高高频特性，并且，将从晶体管8内部产生的热量高效地散热。此外，如果仅使用金刚石填入通孔15，则费用较高，因此在第2层中堆积AlN或者Cu的填充材料20。

Claims (10)

1.一种半导体装置，其特征在于，具有：
Si衬底，其具有彼此相对的第1以及第2主表面；
缓冲层，其形成在所述Si衬底的所述第1主表面上，由AlxGa1-xN(0≤x≤1)构成；
外延结晶生长层，其形成在所述缓冲层上，由AlyGa1-yN(0≤y≤1，x≠y)构成；
晶体管，其形成在所述外延结晶生长层上；以及
填充材料，其填充在从所述Si衬底的所述第2主表面到达所述缓冲层的通孔中，由与所述缓冲层相同的组成比x的AlxGa1-xN构成。
2.根据权利要求1所述的半导体装置，其特征在于，
所述通孔以及所述填充材料不设置在所述晶体管的源极电极的下方，而是设置在所述晶体管的漏极电极的下方。
3.根据权利要求1或2所述的半导体装置，其特征在于，
还具有金属膜，该金属膜设置在从所述Si衬底的第2主表面到达所述晶体管的源极焊盘为止的源极过孔的内壁和所述Si衬底的所述第2主表面上，与所述源极焊盘连接。
4.根据权利要求1或2所述的半导体装置，其特征在于，
所述Si衬底是n型，经由在所述晶体管的源极焊盘的正下方的所述缓冲层以及所述外延结晶生长层上设置的开口，所述源极焊盘直接与所述Si衬底接触。
5.根据权利要求1或2所述的半导体装置，其特征在于，
所述Si衬底是n型，经由在所述晶体管的源极电极的正下方的所述缓冲层以及所述外延结晶生长层上设置的开口，所述源极电极直接与所述Si衬底接触。
6.根据权利要求1或2所述的半导体装置，其特征在于，
所述Si衬底的电阻率小于或等于104Ωcm。
7.根据权利要求1或2所述的半导体装置，其特征在于，
所述缓冲层是AlN。
8.一种半导体装置的制造方法，其特征在于，具有下述工序：
在具有彼此相对的第1以及第2主表面的Si衬底的第1主表面上，形成由AlxGa1-xN(0≤x≤1)构成的缓冲层；
在所述缓冲层上，形成由AlyGa1-yN(0≤y≤1，x≠y)构成的外延结晶生长层；
在所述外延结晶生长层上形成晶体管；
将所述缓冲层作为阻挡层使用，从所述第2主表面开始对所述Si衬底进行蚀刻而形成通孔；以及
向所述通孔中填充填充材料，该填充材料由与所述缓冲层相同的组成比x的AlxGa1-xN构成。
9.根据权利要求8所述的半导体装置的制造方法，其特征在于，
填充所述填充材料的工序具有下述工序：
在所述Si衬底的所述第2主表面上以及所述通孔内形成所述填充材料；以及
对形成在所述Si衬底的所述第2主表面上的所述填充材料进行切削而使其平坦化。
10.根据权利要求8或9所述的半导体装置的制造方法，其特征在于，
利用溅射或者CVD进行所述填充材料的填充。
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