CN104350613A - Method of forming micro LED device with self-aligned metallization stack - Google Patents
Method of forming micro LED device with self-aligned metallization stack Download PDFInfo
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- CN104350613A CN104350613A CN201380027821.8A CN201380027821A CN104350613A CN 104350613 A CN104350613 A CN 104350613A CN 201380027821 A CN201380027821 A CN 201380027821A CN 104350613 A CN104350613 A CN 104350613A
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Classifications
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- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
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- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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Abstract
A method of fabricating and transferring a micro device and an array of micro devices to a receiving substrate are described. In an embodiment, a patterned sacrificial layer is utilized to form a self-aligned metallization stack and is utilized as an etch stop layer during etching of a p-n diode layer to form a plurality of micro p-n diodes.
Description
Technical field
The present invention relates to microdevice.More specifically, embodiments of the invention relate to the microdevice array the method transferring to various substrates that form such as light-emitting diode (LED).
Background technology
Estimate to be used in high efficiency illumination application in the future based on the light-emitting diode (LED) of gallium nitride (GaN), substitute incandescence and fluorescent lamp.The current LED component based on GaN is prepared by the heteroepitaxial growth technology on foreign substrate material.Typical wafer scale LED device structure can be included in bottom n doped gan layer, single quantum well (SQW) or Multiple Quantum Well (MWQ) and top p doped gan layer that sapphire growth substrate is formed.
In one is specifically implemented, by being etched through top p doped gan layer, quantum well layer, and etching in n doped gan layer, wafer scale LED device structure being patterned as the mesa array in sapphire growth substrate.Top p-electrode is formed at the top p Doped GaN of mesa array on the surface, and n-electrode is formed in a part for the n doped gan layer contacted with mesa array.In the final product, table top LED component remains in sapphire growth substrate.
In another kind is specifically implemented, wafer scale LED device structure is transferred to receptor substrate from growth substrates, such as silicon, the advantage done like this is than the individual chip of the easier cutting formation of GaN/ sapphire composite construction.In this concrete enforcement, utilize permanent bonding layer that wafer scale LED device structure is permanently bonded to acceptor (silicon) substrate.Such as, can utilize permanent bonding layer that the p-electrode that the p Doped GaN of mesa array is formed on the surface is bonded to acceptor (silicon) substrate.Then sapphire growth substrate is removed to expose the wafer scale LED device structure of reversing, then that it is thinning to expose mesa array.Then form n contact with the n Doped GaN exposed, with the silicon face of p-electrode electrical contact form p contact.In the final product, table top LED component remains in receptor substrate.Also can by the cutting of GaN/ silicon compound to form one single chip.
Summary of the invention
The invention describes a kind of micro-led (LED) and a kind of Minitype LED array that formed to transfer to the method for reception substrate.Such as, receive substrate can be but be not limited to display substrate, illumination substrate, there is the substrate of the function element of such as transistor or integrated circuit (IC) or there is the substrate of metal distribution line.In one embodiment, miniature LED component comprises the metallization storehouse below miniature p-n diode and miniature p-n diode basal surface, and the storehouse that wherein metallizes comprises the barrier layer of electrode layer on miniature p-n diode basal surface and coated electrode layer basal surface and sidewall.The basal surface of miniature p-n diode can be wider than metallization storehouse.Conforma dielectric barrier layer can cross over the sidewall of miniature p-n diode and the basal surface of the miniature p-n diode of spans.Between the bonded layer that metallization storehouse can be formed on miniature p-n diode and substrate.In one embodiment, bonding 7 layers has about 350 DEG C or lower, more specifically, and about 200 DEG C or lower liquidus temperature.In an embodiment, bonded layer is alloy bonding layer.
In one embodiment, a kind of method forming Minitype LED array is included in multiple openings corresponding in the sacrificial patterned be formed on p-n diode layer, forms the autoregistration metallization storehouse of multiple lateral separation.Utilize bonded layer that the first substrate storehouse of the autoregistration metallization storehouse, sacrificial patterned and the p-n diode layer that comprise multiple separation is bonded to the second substrate.Be etched through p-n diode layer to form multiple miniature p-n diode above the metallization storehouse of multiple separation, and the metallization storehouse exposing multiple separation laterally between sacrificial patterned.Then sacrificial patterned is removed.
In one embodiment, in the multiple openings being formed at correspondence in the sacrificial patterned on p-n diode layer, the autoregistration metallization storehouse forming multiple lateral separation is included in p-n diode layer disposed thereon sacrifice layer, and patterned mask layer is formed above sacrifice layer, wherein patterned mask layer comprises the multiple openings exposing sacrifice layer.Then relative to mask layer optionally etch sacrificial layer, with the exposure sacrifice layer removed within multiple opening and a part of sacrifice layer removed below patterned mask layer.Then at patterned mask layer and p-n diode layer disposed thereon metallization stack layer.Then lift-off technology can be utilized to peel off patterned mask layer, above p-n diode layer, leave multiple metallization storehouse and sacrificial patterned.
In one embodiment, utilize and there is liquidus temperature be about 350 DEG C or lower, or be more specifically about 200 DEG C or the first substrate heap is bonded to the second substrate by lower bonded layer.Such as, bonded layer can comprise indium (In).In one embodiment, by the first bonded layer on the first substrate storehouse and the bonded layer bonding on the second substrate.Such as, bonding can comprise the alloy bonding that the first and second bonded layers are formed by different materials, or the melting bonding that the first and second bonded layers are formed by same material.
In one embodiment, multiple autoregistration metallization storehouse comprises electrode layer and barrier layer.Barrier layer can the elevation surface of coated electrode layer and sidewall, and it also can be reflexive.Such as, electrode layer can comprise the material being selected from silver and nickel group, and it is reflexive for visible spectrum.In one embodiment, barrier layer can be formed with the elevation surface of coated electrode layer and sidewall by carrying out deposited barrier layers with the power higher than electrode layer and/or lower pressure.Such as, when utilizing evaporation or sputtering technology deposition, higher power and/or lower pressure allow the deposition materials below migration patterned mask layer further and make the barrier layer that deposits can the sidewall of coated electrode layer.
In one embodiment, sacrificial patterned is thicker than the autoregistration metallization storehouse of multiple lateral separation.Such as, sacrificial patterned can be the about double thickness of multiple horizontal autoregistration metallization storehouse.Sacrificial patterned also can by nonmetallic materials, such as silicon dioxide (SiO
2) formed.Nonmetallic materials can have the etching characteristic different from p-n diode layer.In one embodiment, plasma etching is carried out to form multiple miniature p-n diode to p-n diode layer, and sacrifice layer serves as etching stopping layer.Remove sacrifice layer and may cause the part exposing miniature p-n diode basal surface.In one embodiment, then depositing conformal medium block layer on each side surface and a basal surface part of multiple miniature p-n diode.
In one embodiment, a kind of one or more miniature LED is transferred to receive the method for substrate be included in there is setting miniature LED component array thereon carrier substrate above locate transfer head.Each miniature LED component comprises the reflective layer storehouse between the bonded layer on miniature p-n diode, miniature p-n diode and carrier substrate.Executable operations to produce phase transformation in for the bonded layer of at least one of miniature LED component.Such as, this operation can comprise bonded layer is heated to more than bonded layer liquidus temperature, and liquidus temperature is 350 DEG C or lower, or more specifically, 200 DEG C or lower.Bonded layer also can be alloy bonding layer, such as Ag-In alloy bonding layer, or melting bonded layer, such as In-In bonded layer.
Transfer head is utilized to pick up miniature p-n diode and reflective layer storehouse.In certain embodiments, also pick up the major part of bonded layer, all thickness of half according to appointment.In certain embodiments, also the conforma dielectric barrier layer of miniature p-n diode sidewall and a basal surface part is crossed in pickup.Then the miniature LED component utilizing transfer head to pick up is placed into and receives on substrate.Transfer head can work according to multiple principle, comprises transfer head and applies to pick up pressure in miniature LED component according to electrostatic principle.Also can apply heat from multiple source to bonded layer to produce phase transformation, comprise localized heat transmission, by carrier substrate heat trnasfer with by transfer head heat trnasfer, and their combination.
Accompanying drawing explanation
Figure 1A is the cross-sectional side view diagram of the sacrifice layer be formed at according to one embodiment of present invention on body LED substrate.
Figure 1B is the cross-sectional side view diagram of patterned mask layer according to an embodiment of the invention.
Fig. 1 C is the cross-sectional side view diagram of sacrificial patterned according to an embodiment of the invention.
Fig. 1 D is the cross-sectional side view diagram of deposit metallic stack layer according to an embodiment of the invention.
Fig. 1 E comprises top view and the cross-sectional side view diagram of the sacrificial patterned according to one embodiment of present invention laterally between the metallization storehouse of multiple separation.
Fig. 1 F is the cross-sectional side view diagram of the bonded layer formed above lateral patterning sacrifice layer with multiple metallization storehouse be separated according to one embodiment of present invention.
Fig. 2 A-Fig. 2 E is the cross-sectional side view diagram of the carrier substrate according to one embodiment of present invention with bonded layer.
Fig. 3 A-Fig. 3 B is cross-sectional side view diagram growth substrates and carrier substrate are bonded together according to one embodiment of the present of invention.
Fig. 4 is according to one embodiment of present invention may the cross-sectional side view diagram of structures for the various of the growth substrates before being bonded together and carrier substrate.
Fig. 5 be according to one embodiment of present invention growth substrates and carrier substrate are bonded together after various may structures cross-sectional side view diagram.
Fig. 6 is according to one embodiment of present invention from the cross-sectional side view diagram of the growth substrates of bonding structure removal.
Fig. 7 is the cross-sectional side view diagram of thinning p-n diode layer according to an embodiment of the invention.
Fig. 8-Fig. 8 ' etches p-n diode layer according to one embodiment of present invention to form the cross-sectional side view diagram of miniature p-n diode.
Fig. 8 " is the cross-sectional side view diagram of etch patterning sacrifice layer according to one embodiment of present invention.
Fig. 9-Fig. 9 ' is the cross-sectional side view diagram forming contact openings according to one embodiment of present invention in Minitype LED array.
Figure 10-Figure 10 " is the cross-sectional side view diagram forming contact openings according to one embodiment of present invention in Minitype LED array.
Figure 11 A-Figure 11 B is the cross-sectional side view diagram of miniature LED component array on carrier substrate according to an embodiment of the invention.
Figure 12 A-Figure 12 B comprises carrier wafer according to an embodiment of the invention and comprises the top view of miniature LED component array and the cross-sectional side view diagram of miniature p-n diode.
Figure 13 illustrates to pick up miniature LED component according to one embodiment of present invention and the flow chart it being transferred to the method receiving substrate from carrier substrate.
Figure 14 is that transfer head picks up the cross-sectional side view diagram of miniature LED component from carrier substrate according to one embodiment of present invention.
Figure 15 is the cross-sectional side view diagram of the reception substrate according to one embodiment of present invention with miniature LED component.
Figure 16 is the cross-sectional side view diagram of bipolarity microdevice transfer head according to one embodiment of present invention.
Figure 17 illustrates to pick up miniature LED component according to one embodiment of present invention and the flow chart it being transferred to the method receiving substrate from carrier substrate.
Figure 18 illustrates to pick up miniature LED component array according to one embodiment of present invention and the flow chart it being transferred to the method receiving substrate from carrier substrate.
Figure 19 illustrates with the cross-sectional side view of the microdevice transfer head array of miniature LED component array contact according to one embodiment of present invention.
Figure 20 illustrates with the cross-sectional side view of the microdevice transfer head array of miniature LED component array contact according to one embodiment of present invention.
Figure 21 A is that microdevice transfer head array picks up the cross-sectional side view diagram of miniature LED component array according to one embodiment of present invention.
Figure 21 B is that microdevice transfer head array picks up the cross-sectional side view diagram of a miniature LED component array part according to one embodiment of present invention.
Figure 22 is the cross-sectional side view diagram according to one embodiment of present invention with the microdevice transfer head array being positioned the miniature LED component array receiving types of flexure.
Figure 23 A is according to one embodiment of present invention to the cross-sectional side view diagram receiving the miniature LED component that substrate optionally discharges.
Figure 23 B is according to one embodiment of present invention to the cross-sectional side view diagram receiving the miniature LED component array that substrate discharges.
Embodiment
Present embodiments describe the microdevice array of a kind of microdevice and a kind of formation such as micro-led (LED) to transfer to the method receiving substrate.Such as, receive substrate can be but be not limited to display substrate, illumination substrate, there is the substrate of the function element of such as transistor or integrated circuit (IC) or there is the substrate of metal distribution line.Although describe embodiments of the invention for the miniature LED comprising p-n diode especially, be to be understood that, embodiments of the invention are not limited, some embodiment also goes for other micro semiconductor devices, this micro semiconductor device is designed to perform predetermined electric function (such as, diode, transistor, integrated circuit) or photonic functions (LED, laser) in a controlled manner.
In various embodiments, reference will be made to the accompanying drawings.But some embodiment can be implemented when there are not one or more in these details or combining with other known methods and configuration.In the following description, illustrate that many details such as such as particular configuration, size and technique are to provide thorough understanding of the present invention.In other cases, well-known semiconductor technology and manufacturing technology are not described in detail especially, in order to avoid unnecessarily fuzzy the present invention." embodiment ", " embodiment " etc. mentioned in whole specification refer to that in conjunction with the embodiments described special characteristic, structure, configuration or characteristic comprise at least one embodiment of the present invention.Therefore, in whole specification, many places occur that phrase " in one embodiment " or similar having different versions refer to identical embodiment of the present invention surely.In addition, special characteristic, structure, configuration or characteristic can combine in one or more embodiments in any suitable manner.
Term as used herein " leap ", " in ... top ", " arriving ", " ... between " and " ... on " relative position of one deck relative to other layers can be referred to.One deck " leap " another layer, another layer " top " or " on " or bonding " to " another layer can be directly to contact with other layers maybe can have one or more interlayer.One deck multilayer " between " to can be directly and this multilayer contact maybe can have one or more interlayer.
Term as used herein " miniature " device, " miniature " p-n diode or " miniature " LED component can refer to the descriptive size of certain device or structure according to an embodiment of the invention.As used herein, term " miniature " device or structure refer to the yardstick of 1 to 100 μm.But should be appreciated that embodiments of the invention may not be so limited, the particular aspects of embodiment goes for larger and may be less yardstick.
In one aspect, present embodiments describe a kind of method body LED substrate processing being become miniature LED component array, this array has been ready to picked and has transferred to reception substrate.Like this, can by integrated for miniature LED component and be assembled in heterogeneous integrated system.Miniature LED component can one by one, grouping or as whole array picked and transfer.Therefore, the miniature LED component in miniature LED component array is ready to picked with high transfer rate and transfers to reception substrate, such as from miniscope to the display substrate of the arbitrary dimension of large area display scope.In certain embodiments, the miniature LED component array being ready to pick up is described as the pitch with 10 μm × 10 μm, or the pitch of 5 μm × 5 μm.Under these density, such as, the substrate of 6 inches the pitch of 10 μm × 10 μm can hold about 1.65 hundred million miniature LED component, or holds about 6.60 hundred million miniature LED component with the pitch of 5 μm × 5 μm.Therefore, can prepare the prefabricated microdevice of the high density with specific function, wherein they have been ready to picked and have transferred to reception substrate.Technology described herein is not limited to miniature LED component, also may be used in the manufacture of other microdevices.
On the other hand, present embodiments describe a kind of mode forming Minitype LED array, this array comprises multiple miniature p-n diode of independence with autoregistration metallization storehouse.In one embodiment, autoregistration can be completed in the following way: above sacrifice layer, form the patterned mask layer with multiple opening, the sacrifice layer removing the exposure within patterned mask layer split shed, and removal is a part of with the sacrifice layer below the horizontal adjacent patterned mask layer of multiple opening, thus undercutting is carried out to patterned mask layer.Then the proper technology deposit metallic stack layer such as evaporating and sputter can be utilized.Then can utilize such as lift-off technology, remove any part of stack layer that patterned mask layer and patterned mask layer metallize, leave multiple self aligned metallization storehouse.Like this, metallize stack layer is formed in the metallization stack position and patterned mask layer of lateral separation metallize stack layer region between can be discontinuous.This discontinuity can protect the metallization storehouse of lateral separation can not peel off during strip operation.In one embodiment, discontinuity may be the result of the sacrificial patterned formed than metallization storehouse thickness.
On the other hand, present embodiments describe a kind of mode forming Minitype LED array, wherein multiple autoregistration metallization storehouse is included in the barrier layer formed above the elevation surface of electrode layer and sidewall.To become in the following description and more it is evident that, when being formed above growth substrates, elevation surface can be the exposed top surface of electrode layer, can be maybe the basal surface of electrode layer when being incorporated in miniature LED component.In one embodiment, the proper technology of such as evaporation or sputtering can be utilized to form electrode layer and barrier layer.After depositing electrode layers, the power that comparable electrode layer is higher and/or lower pressure carry out deposited barrier layers, make by deposited barrier layers below the patterned mask layer of undercutting.Therefore, by the power increased in chamber or the pressure reduced in chamber, the barrier layer of deposition can be wider than the electrode layer of deposition, and this enables the sidewall of barrier layer coated electrode layer.In certain embodiments, electrode layer comprises the material of easily oxidation, such as silver (Ag) layer, can be incorporated in electrode layer using as mirror layer.According to one embodiment of present invention, barrier layer can protect mirror layer not oxidized, and oxidation may change the color of mirror layer, and affects the light-reflecting property of mirror layer.
On the other hand, present embodiments describe a kind of mode forming Minitype LED array, sacrificial patterned can be utilized bonded layer to be laterally separated into the position of multiple lateral separation of the miniature p-n diode corresponding to multiple lateral separation.In one embodiment, utilize bonded layer that the first substrate storehouse comprising multiple autoregistration metallization storehouse, sacrificial patterned and p-n diode layer is bonded to the second substrate.Bonded layer can be continuous bonded layer.According to one embodiment of present invention, when heating and add pressure bonding, can patterned sacrificial be laminated in bonded layer, bonded layer is flowed in storage, or in multiple openings within the sacrificial patterned comprising multiple metallization storehouse.In one embodiment, sacrificial patterned is pressed completely by bonded layer with the second substrate contact with below, thus bonded layer is laterally separated into the position of multiple lateral separation.
On the other hand, present embodiments describe a kind of mode forming miniature LED component and miniature LED component array, wherein sacrificial patterned serves as etching stopping layer at etching p-n diode layer during forming multiple miniature p-n diode.Therefore, sacrificial patterned can be used in protecting the sidewall of miniature p-n diode and the quantum well layer be positioned within miniature p-n diode not to be subject to the functional conduction of deteriorated miniature LED component polluting.In one embodiment, sacrificial patterned serves as the physical barriers along p-n diode layer wicking bonded layer during growth substrates is bonded to carrier substrate.In one embodiment, at etching p-n diode layer with during forming multiple miniature p-n diode, the physical barriers that the conductive layer underneath that electric insulation layer serves as such as conductive bond layer distributes or sputters.
On the other hand, present embodiments describe a kind of mode forming miniature LED component and miniature LED component array, wherein remove sacrificial patterned partly to expose the basal surface of miniature p-n diode, this can form the conforma dielectric barrier layer of the basal surface crossed over miniature p-n diode two side surfaces and partly cross over miniature p-n diode.After can contacting with transfer head making miniature LED component and/or produce phase transformation in bonded layer during pick-up operation, conforma dielectric barrier layer of riving at natural breakpoint place.Like this, the part being wrapped in the conforma dielectric barrier layer below miniature p-n diode protects the conforma dielectric barrier layer on miniature p-n diode sidewall, in order to avoid be broken during the pick-up operation of transfer head or destroy.
According to various aspects, present embodiments describe a kind of mode forming miniature LED component and miniature LED component array, sacrificial patterned wherein can be utilized to form autoregistration metallization storehouse, and it can comprise the barrier layer of coated electrode layer.Also sacrificial patterned can be utilized to protect the sidewall of miniature LED component not pollute by conduction, such as during etching p-n diode layer.Also sacrificial patterned can be utilized to form the position of multiple lateral separation of bonded layer.In addition, sacrificial patterned can be utilized to expose the basal surface of miniature p-n diode, to form conforma dielectric barrier layer.To become in the following description and more it is evident that, although can combine in single embodiment above-mentioned each in, embodiments of the invention are not limited, can combine or do not combine the combination of any aspect or each side according to embodiments of the invention.
With reference now to Figure 1A, semiconductor device layer 110 can be formed on the substrate 101.In one embodiment, semiconductor device layer 110 can comprise one or more layer and be designed to perform in a controlled manner predetermined electric function (such as diode, transistor, integrated circuit) or photonic functions (LED, laser).Although should be appreciated that semiconductor device layer 110 can be designed to perform predetermined function in a controlled manner, semiconductor device layer 110 may inabundant functionalization.Such as, the contactor of such as male or female may not yet be formed.For the sake of simplicity and do not make embodiments of the invention fuzzy, carry out following description with reference to semiconductor device layer 110, this semiconductor device layer is the p-n diode layer 110 grown in growth substrates 101 according to conventional Heteroepitaxy condition.
P-n diode layer 110 can comprise the compound semiconductor of the band gap had corresponding to specific region in spectrum.Such as, p-n diode layer 110 can comprise based on II-VI group material (such as ZnSe) or the one or more layers of III-V material comprising iii-v nitride material (such as GaN, AlN, InN, InGaN and their alloy) and iii-v phosphide material (such as GaP, AlGaInP and their alloy).Growth substrates 101 can comprise any suitable substrate, such as, but not limited to silicon, SiC, GaAs, GaN and sapphire (Al
2o
3).
In a particular embodiment, growth substrates 101 is sapphire, and p-n diode layer 110 is formed by GaN.Although sapphire has larger lattice constant and coefficient of thermal expansion mismatch relative to GaN, sapphire cost is quite low, can extensively obtain, and its transparency and stripping (LLO) technical compatibility based on excimer laser.In another embodiment, the another kind of material of such as SiC can be used as the growth substrates 101 for GaN p-n diode layer 110.As sapphire, SiC substrate can be transparent.Some growing technologies can be utilized to grow p-n diode layer 110, such as metal-organic chemical vapor deposition equipment (MOCVD).Such as, can by introducing trimethyl gallium (TMGa) and ammonia (NH in reative cell simultaneously
3) precursor, raised temperature sapphire growth substrate 101 being heated to such as 800 DEG C to 1,000 DEG C carrys out growing GaN.In specific embodiment in figure ia, p-n diode layer 110 can comprise body GaN layer 112, n doped layer 114, quantum well 116 and p doped layer 118.Due to silicon or oxygen contamination, or the donor of such as silicon of having a mind to adulterate, body GaN layer 112 can be adulterated by n.The GaN layer 114 that the donor Doped n of such as silicon is adulterated can be utilized equally, and the acceptor doped p doped layer 118 of such as magnesium can be utilized.Multiple alternative p-n diode configuration can be utilized to form p-n diode layer 110.Similarly, multiple single quantum well (SQW) or Multiple Quantum Well (MQW) configuration can be utilized to form quantum well 116.In addition, can take the circumstances into consideration to comprise various resilient coating.In one embodiment, sapphire growth substrate 101 has the thickness of about 200 μm, body GaN layer 112 has the thickness of about 0.5 μm-5 μm, n doped layer 114 has the thickness of about 0.1 μm-3 μm, quantum well layer 116 has the thickness being less than about 0.3 μm, and p doped layer 118 has the thickness of about 0.1 μm-1 μm.
Then sacrifice layer 170 can be formed above p-n diode layer 110.In one embodiment, sacrifice layer 170 is formed by the nonmetallic materials with the etching characteristic different from p-n diode layer 110.Such as, sacrifice layer 170 can be dielectric substance, such as, but not limited to silicon dioxide (SiO
2), silicon nitride (SiN
x), phosphorosilicate glass (PSG) and polyimides.In one embodiment, sacrifice layer 170 has the thickness of about 0.2 μm-4 μm.In one embodiment, sacrifice layer 170 is about the SiO of 0.5 μm by thickness
2formed.
With reference now to Figure 1B, above sacrifice layer 170, form patterned mask layer 180.Such as, patterned mask layer 180 can be photoresist, but can use other materials, wherein can relative to patterned mask layer 180 optionally etch sacrificial layer 170.In addition, show to be profile by finally forming p-n diode 150 for dotted line in Figure 1B.As shown in the figure, the opening 181 in patterned mask layer 180 has less width (such as, see Figure 11 A-Figure 11 B) than the part of the basal surface 151 becoming p-n diode 150 the most at last.
With reference now to Fig. 1 C, relative to patterned mask layer optionally etch sacrificial layer 170, to remove the sacrifice layer 170 of the exposure within multiple opening 181 and to remove the patterned mask layer 180 underlying sacrificial layer part adjacent with multiple opening 181, thus undercutting is carried out to patterned mask layer 180.In one embodiment, suitable liquid etching solution is utilized to perform selective etch.Such as, at sacrifice layer 170 by SiO
2formed and patterned mask layer 180 when being formed by photoresist, the hydrofluoric acid of buffering (BHF) can be utilized to etch.In the particular embodiment shown, wet etching can also produce tapered side wall 171.In the particular embodiment shown, sacrifice layer 170 can by distance (d) roughly the same with sacrificial layer thickness (t) for patterned mask layer undercutting.As shown in the figure, the opening in sacrificial patterned can have the width less than the place of the basal surface 151 becoming p-n diode 150 the most at last.
Then can deposit metallic stack layer 123.As shown in Figure 1 D, metallization stack layer 123 can comprise electrode layer 122 and optionally barrier layer 124, but can comprise other layers.Electrode layer 122 and barrier layer 124 can also comprise multiple layer.In one embodiment, reflective metallic stack layer has the thickness of about 0.1 μm-2 μm.In one embodiment, reflective metallic stack layer has the thickness of about 0.25 μm.Electrode layer 122 can form ohmic contact with p doped gan layer 118 and can by high work function metal, and such as Ni, Au, Ag, Pd and Pt are formed.In one embodiment, electrode layer 122 can be reflexive for light transmitting and can serve as the mirror be reflected back towards p-n diode layer 110 by light.Such as, Ag or Ni layer can be comprised at electrode layer 122, to realize its reflection characteristic.The electrode layer of such as Ag also may be easily oxidated impact.Optionally can comprise barrier layer 124 at reflective layer stack layer 123 for various reasons, the electrode layer 122 that described reason comprises protection below is not oxidized, and prevents Impurity Diffusion in electrode layer 122 or p-n diode 110.Such as, barrier layer 124 can include but not limited to Pd, Pt, Ni, Ta, Ti and TiW.In certain embodiments, barrier layer 124 can prevent component to be diffused into p-n diode layer 110 from bonded layer.Barrier layer 124 can also prevent component to be diffused into electrode layer 122 from such as following bonded layer.
As shown in Figure 1 D, sacrificial patterned 170 is thicker than metallization stack layer 123.In one embodiment, sacrificial patterned is about that the twice of metallization stack layer 123 that p-n diode layer 110 is formed is thick.In one embodiment, sacrificial patterned has the thickness of about 0.5 μm, and the stack layer 123 that metallizes has the thickness of about 0.25 μm on p-n diode layer 110.Present composition graphs 1D, with reference to figure 1E, then can utilize such as lift-off technology to remove patterned mask layer 180 and patterned mask layer 180 metallize any part of stack layer 123, leave multiple autoregistration metallization storehouse 120.Like this, metallize stack layer 123 is formed on the position and patterned mask layer 180 of the metallization storehouse 120 by becoming lateral separation metallize stack layer 123 region between can be discontinuous.The metallization storehouse 120 of this discontinuity protection lateral separation can not peel off during strip operation.Discontinuity may be the result forming the sacrificial patterned 180 thicker than metallization stack layer 123.
Still with reference to figure 1D, suitable technology can be utilized such as to evaporate and sputter depositing electrode layers 122 and barrier layer 124.As shown in the figure, above the surface that electrode layer 122 raises and sidewall, barrier layer 124 is formed.To become in the following description and more it is evident that, the surface raised can be the exposed top surface of the electrode layer when being formed above growth substrates 101 as shown in Figure 1 D, or as shown in exemplary diagram 11A-Figure 11 B when being incorporated in miniature LED component the basal surface of electrode layer 122.Electrode layer utilizes the proper technology of such as evaporation or sputtering to be formed.In one embodiment, the part of the electrode layer 122 p-n diode layer 110 formed does not contact sacrifice layer 170.Such as, electrode layer 122 can have opening 181 in patterned mask layer 180 width about between same widths and the A/F being less than in sacrificial patterned 170.After depositing electrode layers 122, can utilize and constructedly carry out deposited barrier layers 124 with the power higher than electrode layer 122, make by the patterned mask layer 180 of undercutting more below deposited barrier layers 124.Therefore, by increasing power, the barrier layer 124 deposited can be wider than deposited electrode layer 122, and this makes barrier layer 124 can the sidewall of coated electrode layer 122.Wider deposited barrier layers 124 also can have been come by deposition under the power combination of deposition or lower pressure and Geng Gao under the pressure lower than electrode layer 122.In certain embodiments, electrode layer comprises the material of easy oxidated impact, such as silver (Ag) layer, and it can be merged in electrode layer 122 and serve as mirror layer.According to one embodiment of present invention, barrier layer 124 can protect mirror layer (or other layers) not oxidized, and oxidation may change the color of mirror layer, and affects the reflection characteristic of mirror layer.
In certain embodiments, corresponding to the pitch of miniature LED 150 array, the pitch of lateral separation reflective layer storehouse 120 can be 5 μm, 10 μm or larger.Such as, 5 μm of pitches can be formed by the 3 μm wide lateral separation reflective layer storehouses 120 separating 2 μm of spacing.10 μm of pitches can be formed by the 8 μm wide separation reflective layer storehouses 120 separating 2 μm of spacing.However, these sizes are exemplary, and embodiments of the invention are not limited.In certain embodiments, the width of lateral separation reflective layer storehouse 120 is less than or equal to the width of miniature p-n diode 150 array basal surface, discusses more in detail as described below with in accompanying drawing.
According to some embodiments, growth substrates 101 storehouse shown in Fig. 1 E is ready to be bonded to carrier substrate.Such as, as hereafter as described in composition graphs 2A-Fig. 2 E, growth substrates 101 storehouse can be bonded to carrier substrate 201 storehouse comprising bonded layer 210.In other embodiments, extra one or more layers can be formed above sacrificial patterned 170 with multiple reflective layer storehouse 120 be separated.With reference to figure 1F, in one embodiment, bonded layer 128 can optionally be formed by the substrate storehouse of Fig. 1 E, to be conducive to bonding.Bonded layer 128 can be formed by any material combined with described in following table 1 and table 2, and some of them can be depending on the composition of bonded layer 210 (when it is present), for formation melting bonded layer or alloy bonding layer.Such as, when bonded layer 128 is with bonded layer 210 alloy bonding, bonded layer 128 can be simple metal, or the contributive metal alloy of chemical composition provided in his-and-hers watches 1.In one embodiment, bonded layer 128 to conduct electricity and to be about 500 to 2,000 dust thick.Before depositing electrically conductive bonded layer 128, optionally can form adhesion layer to strengthen conductive bond layer 128 to sacrificial patterned 170 (such as, SiO
2) adhesiveness.Such as, adhesion layer can be formed by Ti, TiW, Cr or Ni, has 100 to 1,000 dust, more specifically about 300 dusts or less thickness.Optionally para-linkage layer 128 and adhesion layer can carry out patterning, such as, form opening with the region place that can not contact corresponding bonded layer on carrier substrate in bonded layer 128.
Fig. 2 A-Fig. 2 E is the cross-sectional side view diagram of the various embodiments of the carrier substrate 201 of the bonded layer 210 had for being bonded to growth substrates 101 storehouse.Bonded layer 210 can be formed with any material described in following table 1 and table 2 by reference, and some of them may depend on the composition of bonded layer 128 (when it is present), for formation melting bonded layer or alloy bonding layer.Such as, when bonded layer 210 is with bonded layer 128 alloy bonding, bonded layer 210 can be simple metal, or the contributive metal alloy of chemical composition provided in his-and-hers watches 1.Optionally can form adhesion layer 208 before bonded layer 210.Such as, adhesion layer 208 can be formed by Ti, TiW, Cr or Ni, has 100 to 1,000 dust, more specifically about 300 dusts or less thickness.Fig. 2 A shows carrier substrate 201 non-patterned before bonding and bonded layer 210 and adhesion layer 208.Fig. 2 B-Fig. 2 D shows carrier substrate 201, and it has been patterned to be formed multiplely has sidewall 204 and the post 202 separated by groove 206.Post 202 can be formed by multiple material and technology.In one embodiment, post 202 can carry out patterning by etching or imprint process to carrier substrate 201 and carrier substrate 201 is integrally formed.Such as, carrier substrate 201 can be the silicon substrate with the post 202 be integrally formed.In another embodiment, post can be formed on carrier substrate 201 top.Such as, can by plate forms post 202 with photoresist lift-off technology.Can form post by any suitable material, described material comprises semiconductor, metal, polymer, dielectric etc.
Post 202 can have the Breadth Maximum being equal to or less than miniature p-n diode 150 width, and in the following description and drawings, this will become more apparent.In one embodiment, the height of groove post 202 has the twice of bonded layer 210 thickness at least.In one embodiment, bonded layer 210 can have the thickness of about 0.1 μm-2 μm, and groove post has the height of at least 0.2 μm-4 μm.In the specific embodiment shown in Fig. 2 B, above post 202, on sidewall 204 and within groove 206, form conformal bonded layer 210.In the specific embodiment shown in Fig. 2 C, bonded layer 210 and adhesion layer 208 are anisotropic deposition, on the top surface making them only be formed at post 202 and within groove 206, do not have significant quantity to be deposited on sidewall 204.In the specific embodiment shown in Fig. 2 D, bonded layer 210 and adhesion layer 208 are only formed on the top surface of post 202.Same patterning photoresist coupled columns 202, adhesion layer 208 and bonded layer 210 can be utilized to carry out patterning to form this type of configuration.In the specific embodiment shown in Fig. 2 E, photoresist lift-off technology can be utilized to form the lateral separation position of bonded layer 210, wherein in the blanket layer of patterning photoresist oxidant layer disposed thereon adhesion layer and bonded layer, then photoresist oxidant layer (together with adhesion layer and bonded layer the part in photoresist oxidant layer) is peeled off, leave the position of the lateral separation of the bonded layer 210 shown in Fig. 2 E, but other treatment technologies can be used.
As above as described in composition graphs 2B-Fig. 2 E and Fig. 1 E-Fig. 1 F, some embodiment of the present invention comprises the position of the reflective layer storehouse 120 of lateral separation and/or the bonded layer 128,210 of lateral separation.Composition graphs 2B, wherein above post 202, and on sidewall 204 and within groove 206, form conformal bonded layer 210, on post 202 top, the ad-hoc location of bonded layer is by groove 206 lateral separation.Therefore, even if conformal bonded layer 210 is continuous print, the position of the bonded layer 210 on post 202 top is also the position of lateral separation.Equally, in Fig. 2 E the single discrete location of bonded layer 210 by the space lateral separation between them.When having post 202, the relation of bonded layer 210 thickness and post 202 height can count the lateral separation of bonded layer 210 position.
Above-mentioned bonded layer 128 and 210 can be formed by multiple suitable material, such as thermoplastic polymer, metal and solder.Miniature LED component, as single bonded layer, maybe when being bonded together by melting bonding or alloy bonding, can be adhered to carrier substrate by bonded layer.In one embodiment, the bonded layer of gained can have about 350 DEG C or lower, or more specifically about 200 DEG C or lower liquidus temperature or melt temperature.At such temperatures, the bonded layer of gained can experience phase transformation, and can not the miscellaneous part of the miniature LED component of appreciable impact.In one embodiment, the bonded layer of gained can be conduction.Such as, when gained bonded layer experiences the phase transformation from solid to liquid in response to variations in temperature, a part for gained bonded layer can remain in miniature LED component during pick-up operation, described in more detail as described below.In this type of embodiment, may it is beneficial that be formed by electric conducting material by gained bonded layer, make when to be transferred to subsequently receive substrate time, it can not adversely affect miniature LED component.In this case, the gained bonded layer part be retained in during transfer operation in miniature LED component can assist the conductive welding disk miniature LED component being bonded to and receiving on substrate.
Solder can be the suitable material for bonded layer 128,210, because be much generally ductile material in it is solid-state and and present good soaking between semiconductor and metal surface.Typical alloy is melting at single temperature not, but melting in a temperature range.Therefore, solder alloy remains the liquidus temperature of the minimum temperature of liquid often through corresponding to alloy, and corresponds to the solidus temperature that alloy remains the maximum temperature of solid and characterize.Provide the exemplary lists of the available low melting point welding material of embodiments of the invention in table 1, wherein chemical composition is listed by the percentage by weight of component.As mentioned above, wherein when being bonded together to form alloy bonding layer by bonded layer 128,210, bonded layer 128,210 can be simple metal, or the contributive metal alloy of chemical composition provided in his-and-hers watches 1.
table 1:
The exemplary lists of the thermoplastic polymer that may be used for embodiments of the invention is provided in table 2.
table 2:
| Polymer | Melt temperature (DEG C) |
| Acrylic acid (PMMA) | 130-140 |
| Polyformaldehyde (POM or acetal) | 166 |
| Polybutylene terephthalate (PBT) | 160 |
| Polycaprolactone (PCL) | 62 |
| Polyethylene terephthalate (PET) | 260 |
| Merlon (PC) | 267 |
| Polyester | 260 |
| Polyethylene (PE) | 105-130 |
| Polyether-ether-ketone (PEEK) | 343 |
| PLA (PLA) | 50-80 |
| Polypropylene (PP) | 160 |
| Polystyrene (PS) | 240 |
| Polyvinylidene chloride (PVDC) | 185 |
According to embodiments of the invention, bonded layer 128,210 forms uniform thickness, and can be deposited by multiple proper method according to specific composition.Such as, solder composition can be sputtering, by electron beam (E bundle) hydatogenesis, or is coated with crystal seed layer to obtain uniform thickness.
With reference now to Fig. 3 A-Fig. 3 B, can heating and/or add pressure growth substrates 101 and carrier substrate 201 are bonded together.Fig. 3 A is the diagram that the structure of Fig. 1 E is bonded to an embodiment of the non-patterned structure of Fig. 2 A.Fig. 3 B is the diagram that the structure of Fig. 1 F is bonded to an embodiment of the non-patterned structure of Fig. 2 A.Should be appreciated that these diagrams are exemplary, and contemplate according to embodiments of the invention and combine with other of Fig. 2 A-Fig. 2 E.In addition, single bonded layer 128 or 210 can be only utilized growth substrates 101 and carrier substrate 201 to be bonded together.
In one embodiment, during the substrate shown in bond graph 3B, conductive bond layer 128 may be diffused in conductive bond layer 210, or vice versa, and layer 128,210 is converted to alloy bonding layer.A function of gained bonded layer is the appropriate location miniature LED component comprising miniature p-n diode remained on carrier substrate, also provides the medium that easily can discharge miniature LED component simultaneously.In certain embodiments, one of conductive bond layer 128,210 is greater than 350 DEG C by melting or liquidus temperature, or be more specifically greater than 200 DEG C material formed, but, the feature of the alloy bonding layer of gained is 350 DEG C or lower, or more specifically 200 DEG C or lower melting or liquidus temperature, to provide the medium that can pick up miniature LED from it.Therefore, conductive bond layer 128,210 is formed specific composition and thickness, to realize the alloy concentrations expected when bonded layer 128 and bonded layer 210 phase counterdiffusion.In one embodiment, the composition of selection bonded layer 128 and bonded layer 210 and thickness are to realize eutectic alloy bonding, and wherein under specific composition and temperature, eutectic alloy is directly transformed into liquid state from solid-state, and without liquid and solid-state biphase-equilibrium.
According to embodiments of the invention, the bonded interface utilizing bonded layer 128,210 to produce can be stronger than utilizing separately the bonded interface of bonded layer 210.The bonded interface intensity improved can provide extra structural intergrity for system, such as, hereafter described in more detail during growth substrates 101 is removed.Such as, when using laser lift-off technology to remove growth substrates, this system is subject to the effect of heat and mechanical shock wave, and this may cause being separated of interbed and the breaking of p-n diode layer 110 of growth substrates 101 and carrier substrate 201.According to embodiments of the invention, bonded layer 128, the eutectic bonding of 210 can form strong bonding interface, and this strong bonding interface is protected for this type of layering, thus keeps the integrality of p-n diode layer 110.
Fig. 4 is the cross-sectional side view diagram of the various non-limiting possibility structure of the growth substrates 101 and carrier substrate 201 presented side by side before bonding growth substrates 101 and carrier substrate 201.Fig. 5 is the cross-sectional side view diagram of the various non-limiting possibility structure of the growth substrates 101 and carrier substrate 201 presented side by side after bonding growth substrates 101 and carrier substrate 201.The particular combination of substrate is described in table 3.Such as, the specific embodiment shown in Fig. 4, example A represents the carrier substrate shown in Fig. 2 A is bonded to the growth substrates shown in Fig. 1 E.Although not shown, as mentioned above, according to some embodiments, except bonded layer 210, optionally can comprise bonded layer 128 for alloy or melting bonding, or alternative bonded layer 210.
table 3:
Still with reference to figure 5, a feature of illustrated embodiment the profile being bonded to growth substrates 101 storehouse of carrier substrate 201 storehouse is embedded in (or press-in) bonded layer 210 during bonding operation.Such as, the profile comprising sacrificial patterned 170 and reflective layer storehouse 120 is embedded in (or press-in) bonded layer 210.Reference example Fig. 5, example A, in one embodiment, when heating adds pressure bonding, sacrificial patterned 170 is pressed in bonded layer 210, make bonded layer 210 to flow into by the sacrificial patterned 170 comprising multiple metallization storehouse 120 within the storage that formed of multiple openings in.In one embodiment, sacrificial patterned 170 is pressed through bonded layer 210 completely so that (or adhesion layer 208 contacts when it is present), thus is multiple lateral separation positions by bonded layer 210 lateral separation with the second substrate 201 of below.Bonded layer 210 lateral separation is that the lateral separation position corresponding to each single miniature LED component can assisted pick operate by expection, wherein in a lateral separation position of bonded layer, produces the adjacent transverse separation point position that phase transformation can not affect bonded layer.But embodiments of the invention are not limited, do not need sacrificial patterned 170 to embed (or press-in) through bonded layer 210 completely.
Another of illustrated embodiment is characterised in that sacrificial patterned 170 is the physical barriers between p-n diode layer 110 and lower metal layer (such as, bonded layer 210, adhesion layer 208).Therefore, sacrificial patterned 170 provides the barrier of the metallic pollution of the basal surface along the miniature p-n diode 150 formed from p-n diode layer 110 subsequently.
With reference now to Fig. 6, eliminate growth substrates 101 from bonding structure.Can by suitable method, such as chemical etching or the stripping (LLO) (if growth substrates is transparent) based on excimer laser, remove growth substrates 101.In one embodiment, carry out LLO from transparent sapphire growth substrate 101 pairs of GaN p-n diode layers 110 to utilize the short pulse (such as, few tens of nano-seconds) from ultraviolet laser such as Nd-YAG laser or KrF excimer laser to come radiation 101/110 bed boundary by transparent sapphire growth substrate 101 to complete.GaN p-n diode layer 110 causes interface local pyrexia in the absorption of interface, makes to resolve into liquid Ga metal and nitrogen at GaN place, interface.Once radiation desired region, just can by electric furnace again melting Ga remove transparent sapphire growth substrate 101.
With reference now to Fig. 7, p-n diode layer 110 is thinned to expectation thickness.Again with reference to the p-n diode layer 110 amplified in Figure 1A, remove the body GaN layer 112 (can be N-shaped) of scheduled volume or a part for n-type GaN layer 114, make to retain exercisable p-n diode after thinning.According to rectangular structure, the such as polishing of suitable technology, wet etching or dry etching can be utilized to perform thinning process.Such as, can combine and perform polishing and/or the timed-etch thickness to expectation.When there being the underlying patterned structure of such as post, timed-etch can be performed to the thickness expected, to avoid destroying pattern structure.
With reference now to Fig. 8, patterned mask layer 140 can be formed above thinning p-n diode layer 110, this patterned mask layer for etching p-n diode layer 110, to form multiple independently miniature p-n diode 150.Mask layer 140 can be formed by photoresist or multiple material such as metal (such as chromium, nickel) or dielectric (silicon nitride, silica), and they more have tolerance to GaN etching condition than photoresist.The auxiliary ion beam milling (CAIBE) of dry plasma etch technology such as reactive ion etching (RIE), electron cyclotron resonace (ECR), inductively coupled plasma reactive ion etching (ICP-RIE) and chemistry can be utilized to perform the etching of GaN p-n diode layer 110.Etch chemistries based on halogen, can comprise such as Cl
2, BCl
3or SiCl
4material.
As shown in the figure, sacrificial patterned 170 serves as etching stopping layer during etching GaN p-n diode layer 110.Therefore, sacrificial patterned 170 protect the sidewall 153 of miniature p-n diode 150 and quantum well structure 116 within being positioned at by the pollution of underlying conductive bonded layer 210 and adhesion layer 208 (when it is present).Such as, because dry plasma etch chemical action sees sacrificial patterned 170 (such as SiO from the conductive bond layer 210 covered or adhesion layer 208
2) and nonmetal, be again splashed on p-n diode 150 sidewall because this eliminating metal.
In the specific embodiment shown in Fig. 8, miniature p-n diode 150 can have the sidewall 153 (top-to-bottom from miniature p-n diode 150) of the outward taper up to 15 degree.Such as, the RIE used based on the etch chemistries of chlorine can be utilized.Or sidewall 153 can be vertical.Such as, the ICP-RIE acquisition vertical sidewall used based on the etch chemistries of chlorine can be utilized.To become apparent in the description of Figure 15, in certain embodiments, when picked and transfer to receive substrate a series of miniature LED component above form public contactor time, the sidewall of outward taper may be favourable.In certain embodiments, the pitch between miniature p-n diode 150 can be 5 μm, 10 μm or larger.Such as, can form by the 3 μm wide miniature p-n diodes separating 2 μm of spacing miniature p-n diode 150 array that pitch is 5 μm.Miniature p-n diode 150 array that pitch is 10 μm can be formed by the 8 μm wide miniature p-n diodes separating 2 μm of spacing.When completing etching p-n diode layer 110 to form multiple independently miniature p-n diode 150, patterned mask layer 140 can be removed, expose the top surface 152 of multiple miniature p-n diode 150, as shown in Fig. 8 '.Or, patterned mask layer 140 can be removed in the time after a while.
With reference now to Fig. 8, ", optionally remove sacrificial patterned 170.In the particular embodiment shown, the part that sacrificial patterned 170 exposes the basal surface 151 of miniature p-n diode 150 is removed.In addition, in the particular embodiment shown, completely eliminated sacrificial patterned 170.Liquid, steam or gas phase etchant can be utilized to perform removal.In one embodiment, in sacrificial patterned 170 by SiO
2when being formed, etchant can comprise the hydrofluoric acid (BHF) of liquid, steam or gas phase hydrofluoric acid (HF) or buffering.
In one embodiment, if not yet removed, patterned mask layer 140 can be removed in the same operation of removing sacrificial patterned 170.Or, when etching solution has different choice to sacrificial patterned 170 and patterned mask layer 140, patterned mask layer 140 can to remain on p-n diode 150 and for forming contact openings in conforma dielectric barrier layer, as described in reference to Fig. 9-Fig. 9 '.
Still with reference to figure 8 "; Minitype LED array to comprise on carrier substrate 201, carrier substrate multiple positions of bonded layer 210 (can yes or no alloy bonding layer; can lateral separation or non-lateral separation), and the corresponding multiple independently miniature p-n diodes 150 above bonded layer more than 210 position.Multiplely independently multiple independently reflective layer storehouse 120 is formed between miniature p-n diode 150 and multiple positions of bonded layer 201 corresponding.In certain embodiments, carrier substrate comprises corresponding multiple post 202, it forms the position of multiple lateral separation of bonded layer 210, as shown in example B-D.
In certain embodiments, miniature p-n diode 150 comprises top surface 152 and basal surface 151, and reflective layer storehouse 120 comprises top surface and basal surface, and the basal surface 151 of miniature p-n diode 150 is wider than the top surface of reflective layer storehouse 120.In certain embodiments, multiple miniature p-n diode 150 comprises basal surface 151 separately, and described basal surface has roughly the same width with each top surface in corresponding multiple post 202.In other embodiments, multiple miniature p-n diode 150 comprises basal surface 151 separately, and described basal surface is wider than each top surface in corresponding multiple post 202.The relation of miniature p-n diode 150 bottom width and lower square column 202 top surface can affect pick process.Such as, if bonded layer 210 presents the phase transformation from solid to liquid during pick process, so miniature p-n diode 150 is floated on liquid level substantially.Miniature p-n diode 150 can be remained on the appropriate location at post 202 top by the surface tension in liquid bonded layer 210.Particularly, the surface tension be associated with post 202 top surface edge can help miniature p-n diode 150 to remain on appropriate location further, and its center pillar 202 top surface width is less than or approximates p-n diode 150 bottom width.
According to some embodiments, multiple miniature p-n diode 150 is positioned at above the lateral separation position of bonded layer 210.In one embodiment, as shown in example A, can by saturating for patterned sacrificial lamination bonded layer 210 being produced the lateral separation position of bonded layer 210.In one embodiment, the lateral separation position of bonded layer 210 can be realized in the following way: as shown in example E to before carrier substrate bonding growth substrates, para-linkage layer 210 carries out patterning, or as shown in example B-D, forms post.Exist in some embodiment of groove 206 between post 202, groove can serve as bonded layer storage, and the bonded layer of melting can flow into and wherein and not disturb adjacent miniature LED component.In one embodiment, multiple miniature p-n diode 150 comprises basal surface 151 separately, and it has the width roughly the same or larger with the corresponding top surface of multiple lateral separation positions of alloy bonding layer 211.
In certain embodiments, Fig. 8 " miniature LED component be ready to such as pick up by transfer head and transfer to reception substrate.In other embodiments, can receive before substrate picking up and transfer to, form thin conforma dielectric barrier layer by the array of any miniature p-n diode 150.With reference now to Fig. 9-Figure 10, any miniature p-n diode 150 of ", can at Fig. 8 " array above form thin conforma dielectric barrier layer 160.In one embodiment, thin conforma dielectric barrier layer 160 can be protected during pick process, prevents the arc discharge between adjacent miniature p-n diode 150, thus protects adjacent miniature p-n diode 150 in order to avoid stick together during pick process.Thin conforma dielectric barrier layer 160 can also protect the sidewall 153 of miniature p-n diode 150, quantum well layer 116 and basal surface 151 not contaminated, and described pollution may affect the integrality of miniature p-n diode 150.Such as; thin conforma dielectric barrier layer 160 can in follow-up temperature cycles (especially higher than under the liquidus curve of bonded layer material 210 or the temperature of melt temperature) period; such as from carrier substrate pickup microdevice and during being discharged into by microdevice and receiving substrate; serve as physical barriers, prevent bonded layer material 210 (or alloy bonding layer) by the sidewall that wicks into miniature p-n diode 150 and quantum layer 116.Thin conforma dielectric barrier layer 160, once be placed on reception substrate, can also make miniature p-n diode 150 insulate.In one embodiment, thin conforma dielectric barrier layer 160 is the aluminium oxide (Al that about 50-600 dust is thick
2o
3).Depositing conformal medium block layer 160 can be carried out such as, but not limited to ald (ALD) by multiple proper technology.
With reference now to Fig. 9-Fig. 9 ', can at Fig. 8 " any miniature p-n diode 150 array above form thin conforma dielectric barrier layer 160, wherein not yet remove patterned mask layer 140.Cross over them above the array that thin conforma dielectric barrier layer 160 can be formed at any miniature p-n diode 150 and with a part of conformal of the exposed surface of mask layer 140 and the sidewall 153 of p-n diode 150 and basal surface 151.Conforma dielectric barrier layer 160 can also cross over the exposed surface of bonded layer 210.Then utilize lift-off technology to remove mask layer 140, peel off the part of the thin conforma dielectric barrier layer 160 that it is formed, obtain the structure comprising contact openings 162 shown in Fig. 9 '.In the specific embodiment that Fig. 9 ' is shown, conforma dielectric barrier layer 160 is not formed on the top surface 152 of miniature p-n diode 150.
With reference to figure 10-Figure 10 ", also can at Fig. 8 " miniature p-n diode 150 array above form thin conformal dielectric layer, carry out patterning afterwards to form contact openings 162.As shown in Figure 10, thin conforma dielectric barrier layer 160 can be formed at any miniature p-n diode 150 array above and cross over them with the top surface 152 of the exposure of p-n diode 150 and sidewall 153 conformal.Medium block layer 160 also can cross over basal surface 151 and the bonded layer 210 of the exposure of p-n diode 150.Then can form blanket photoresist oxidant layer above p-n diode array and carrier substrate 201, then carry out patterning to form opening above each miniature p-n diode 150.Then thin conforma dielectric barrier layer 160 can be etched to form contact openings 162 on the top surface 152 of each miniature p-n diode 150.After removal patterning photoresist, contact openings 162 is as Figure 10 '-Figure 10 " as shown in.As shown in Figure 10 ', contact openings 162 can have the width slightly larger than the top surface 152 of miniature p-n diode 150.In the embodiment that Figure 10 ' is shown, contact openings 162 exposes the top of the top surface of miniature p-n diode 150 and the sidewall of miniature p-n diode 150, and medium block layer 160 covers quantum well layer 116 and make it insulate.As Figure 10 " as shown in, contact openings 162 can have the width slightly less than the top surface 152 of miniature p-n diode 150.The difference of width regulates the result of alignment tolerance when may be and carry out patterning to photoresist.Therefore, conforma dielectric barrier layer 160 can form antelabium around miniature p-n diode 150 top surface and sidewall.
" the exemplary array of the miniature LED component of example A has been shown from Figure 10 in Figure 11 A.In the specific embodiment shown in Figure 11 A, sacrificial patterned is pressed bonded layer 210 completely, to form multiple lateral separation positions of bonded layer 210.With reference now to Figure 11 B, in the particular embodiment shown, sacrificial patterned is not pressed bonded layer 210 completely, and the separation point position of bonded layer 210 not lateral separation.
Figure 12 A-Figure 12 B comprises top view and the cross-sectional side view diagram of carrier substrate 201 according to an embodiment of the invention and miniature LED component array; In the particular embodiment shown, array is produced from the miniature LED component Figure 11 A.But should be appreciated that Figure 12 A-Figure 12 B is exemplary, the array of miniature LED component can be formed by aforementioned any miniature LED component.In the embodiment shown in Figure 12 A, each single miniature p-n diode 150 is illustrated as the concentric circles a pair with different-diameter or width, described diameter or width correspond to the different in width of miniature p-n diode 150 top surface and basal surface, and corresponding tapered side wall is crossed between top surface and basal surface.In the embodiment shown in Figure 12 B, each single miniature p-n diode 150 is depicted as a pair concentric squares with convergent or round angle, wherein each square has different width, and this different width corresponds to the top surface of miniature p-n diode 150 and basal surface and crosses over the different in width of tapered side wall of correspondence of this top surface and basal surface.But embodiments of the invention do not need tapered side wall, and the top surface of miniature p-n diode 150 and basal surface can have identical diameter, or width and vertical sidewall.As shown in Figure 12 A-Figure 12 B, miniature LED component array is described as there is pitch (P), spacing (S) between each miniature LED component and the Breadth Maximum (W) of each miniature LED component.In order to know for purpose of brevity, although should be appreciated that similar y dimension may exist and can have identical or different dimension values, in top-view illustrations, by a dotted line x dimension is only shown.In the specific embodiment shown in Figure 12 A-12B, the value of x and y dimension is identical in top-view illustrations.In one embodiment, the array of miniature LED component can have the pitch (P) of 10 μm, and wherein each miniature LED component has the spacing (S) of 2 μm and the Breadth Maximum (W) of 8 μm.In another embodiment, the array of miniature LED component can have the pitch (P) of 5 μm, and wherein each miniature LED component has the spacing (S) of 2 μm and the Breadth Maximum (W) of 3 μm.But embodiments of the invention are not limited to these specific dimensions, and any suitable size can be utilized.
Describe a kind of embodiment miniature LED component being transferred to the method receiving substrate in fig. 13.In this type of embodiment, provide the carrier substrate being provided with miniature LED component array.As mentioned above, each miniature LED component can comprise the reflective layer storehouse below miniature p-n diode and miniature p-n diode basal surface, wherein metallizes between the bonded layer of storehouse on miniature p-n diode and carrier substrate.Conforma dielectric barrier layer optionally can cross over the sidewall of miniature p-n diode.Conforma dielectric barrier layer can cross over a part for miniature p-n diode basal surface in addition.In operation 1310, in the bonded layer at least one in miniature LED component, produce phase transformation.Such as, phase transformation can be associated with being heated to by bonded layer more than the melt temperature of the material forming bonded layer or liquidus temperature.Heat can be applied from multiple source to bonded layer to produce phase transformation, comprise localized heat transmission, by carrier substrate heat trnasfer, by transfer head heat trnasfer, and their combination.Then transfer head can be utilized to pick up a part for the miniature p-n diode at least one miniature LED component, metallize storehouse and optional conforma dielectric barrier layer in operation 1320, and a part for optionally bonded layer, be then placed in operation 1330 and receive on substrate.During placement operation, heat can be applied to bonded layer, and heat can be provided from multiple source, comprise localized heat transmission, by receiving substrate heat trnasfer, by transfer head heat trnasfer, and their combination.
The general diagram of the operation 1320 according to an embodiment is provided in Figure 14, wherein transfer head 300 picks up the miniature p-n diode 150 being used at least one miniature LED component, the part metallizing storehouse 120, conforma dielectric barrier layer 160, and a part for bonded layer 210.In the particular embodiment shown, define conforma dielectric barrier layer 160, but, in other embodiments, conforma dielectric barrier layer can be there is no.In certain embodiments, miniature LED component can be utilized to peel off a part for bonded layer 210, all half according to appointment.Although show the particular microchannel LED component of the miniature p-n diode 150 comprising example A, be appreciated that any miniature LED component can picked up and comprise any miniature p-n diode 150 described herein.In addition, although the embodiment shown in Figure 14 shows transfer head 300 pick up single miniature LED component, in other embodiments, transfer head 300 or multiple transfer head 300 can pick up one group of miniature LED component.
Still with reference to Figure 14, in the particular embodiment shown, the basal surface 151 of miniature p-n diode 150 is wider than reflective layer storehouse 120 top surface contacted with basal surface 151, and conforma dielectric barrier layer 160 crosses over a part for the sidewall of miniature p-n diode 150, the basal surface 151 of miniature p-n diode 150.In one aspect; the part being wrapped in the conforma dielectric barrier layer 160 below miniature p-n diode 150 protects the conforma dielectric barrier layer 160 on miniature p-n diode 150 sidewall, avoids being broken during utilizing transfer head 300 to carry out pick-up operation or destroying.In conforma dielectric barrier layer 160, bonded layer 210, especially in turning and the position with acute angle, stress point may be formed.When to contact with transfer head 300 making miniature LED component and/or produce phase transformation in bonded layer, these stress points become the natural breakpoint in conforma dielectric barrier layer 160, conformal dielectric layer of can riving herein.In one embodiment, after contacting with transfer head making miniature LED component and/or produce phase transformation in alloy bonding layer, rive at natural breakpoint place conforma dielectric barrier layer 160, this can before the miniature p-n diode of pickup and reflective layer storehouse or period.In liquid state, bonded layer can contact in response to making miniature LED component the compression stress be associated with transfer head, on rectangular structure, smooth distribution is opened.In one embodiment, making after miniature LED component contacts with transfer head, produce phase transformation in alloy bonding layer before, friction transfer head on the whole top surface of miniature LED component.Friction can expel any particle on the contact surface of any one that may be present in transfer head or miniature LED component.Pressure can also be transferred to conforma dielectric barrier layer by friction.Therefore, pressure is transferred to conforma dielectric barrier layer 160 from transfer head 300 and alloy bonding layer is heated to more than the liquidus temperature of the alloy bonding layer position that can contribute to below miniature p-n diode 150 and to rive conforma dielectric barrier layer 160, and the integrality of miniature LED component and quantum well layer 116 can be retained.
In one embodiment, the basal surface of miniature p-n diode 150 is wider than the top surface of metallization storehouse 120, and conforma dielectric barrier layer 160 is formed in a part for miniature p-n diode 150 basal surface.In one embodiment, 50 dusts are held to the thick conforma dielectric barrier layer 160 of 600 dusts along the distance of 0.25 μm to 1 μm of the basal surface miniature p-n diode 150 on the every side of metallization storehouse 120.
According to embodiments of the invention, multiple suitable transfer head assisted pick can be utilized and place operation 1320,1330.Such as, transfer head 300 can apply to pick up pressure, to pick up miniature LED component according to vacuum, magnetic, bonding or electrostatic principle in miniature LED component.In a particular embodiment, transfer head is according to electrostatic principle work.Also can configure transfer head 300 with by transfer of heat to miniature LED component, to control the phase of bonded layer during the pickup be associated with transfer process and placing operates.
Figure 15 receives the diagram of substrate 400, according to one embodiment of present invention to it placed multiple miniature LED component.Such as, receive substrate can be but be not limited to display substrate, illumination substrate, there is the substrate of the function element of such as transistor or there is the substrate of metal distribution line.In the particular embodiment shown, each miniature LED component can be placed on above driver contactor 410.Then public contact wire 420 can be formed above a series of miniature p-n diode 150.As shown in the figure, the tapered side wall of miniature p-n diode 150 can provide the profile being convenient to form Continuous Contact line.In one embodiment, public contact wire 420 can be formed at the top of the miniature LED of a series of red emission, green emission or blue emission.In certain embodiments, public contact wire 420 will be formed by transparent contact material such as tin indium oxide (ITO).In one embodiment, multiple miniature LED can be arranged to the pixel groups of three, comprise the miniature LED of red emission, the miniature LED of green emission and the miniature LED of blue emission.
In one embodiment, p-n diode 150 can comprise the quantum well layer 116 (can be SQW or MQW) that top n doped layer 114, thickness that thickness is about 0.1 μm-3 μm are less than about 0.3 μm, and thickness is about the below p doped layer 118 of 0.1 μm-1 μm.In one embodiment, top n doped layer 114 can be 0.1 μm-6 μm thick (it can comprise or substitute aforementioned body layer 112).In a particular embodiment, p-n diode 150 can be less than 3 μm thick, and be less than 10 μm wide.
On the other hand, a kind of mode of the large quantities of transfer of microdevice array utilizing transfer head array to carry out being prefabricated into is present embodiments described.The transfer tool comprising the transfer head array matched with the integral multiple of the pitch of corresponding miniature LED component array can be used for picking up miniature LED component array and being transferred to reception substrate.Like this, can high transfer rate by integrated for miniature LED component and be assembled in foreign peoples's integrated system, comprise from the miniature substrate being shown to any size of the scope of large-area displays.Such as, the microdevice transfer head array of 1cm × 1cm can pick up and shift 100, the microdevice of more than 000, and larger microdevice transfer head array can shift more microdevice.In transfer head array, each transfer head also can independently control, and this can pick up selectively and discharge microdevice.
When being not limited to particular theory, embodiments of the invention describe microdevice transfer head and head array, and described microdevice transfer head and head array use the attracting principle of picking up microdevice of the charges of different polarity to carry out work according to electrostatic chuck.According to embodiments of the invention, apply pick-up voltage so that generation is grabbed suction and picks up microdevice on microdevice to microdevice transfer head.Grab suction to be directly proportional to charged plates area, therefore by as calculation of pressure.
On the other hand, present embodiments describe a kind of bonded layer, microdevice can remain on carrier substrate by it during particular procedure and attended operation, and when experiencing phase transformation, there is provided the medium that can keep microdevice, but microdevice is also easy to during pick-up operation from its release.Such as, bonded layer can melting or again flow again, and make before pick-up operation or period, bonded layer experience is from solid-state to the phase transformation of liquid state.In liquid state, microdevice can be remained on the appropriate location on carrier substrate by bonded layer, also provides the medium being easy to discharge microdevice simultaneously.Be not limited to particular theory, determine from carrier substrate pickup microdevice needed for grabbing inhale pressure time, grab suction pressure and should exceed power microdevice being remained to carrier substrate, this power can include but not limited to surface tension, capillary force, viscous effect, elastic restoring force, Van der Waals force, static friction and gravity.
According to embodiments of the invention, when the size of microdevice is reduced to following particular range, surface tension microdevice being remained to the liquid bonded layer of carrier substrate may become the leading of other power keeping microdevice.Such as, utilize the capillary pressure of about 2.2 atmospheric pressure (atm) to remain on carrier substrate by the microdevice of exemplary 10 μm × 10 μm wide, wherein indium bonded layer has the surface tension of liquid of 560mN/m in its melt temperature of 156.7 DEG C.This is significantly greater than the pressure because gravity causes, and this pressure is about 1.8 × 10 for exemplary 10 μm × 10 μm wide × 3 of an a slice μm high gallium nitride (GaN)
-6atm.
Figure 16 is according to one embodiment of present invention according to electrostatic principle work to pick up the bipolarity microdevice transfer head of miniature LED component and the cross-sectional side view diagram of head array.As shown in the figure, microdevice transfer head 300 can comprise base substrate 302, comprise the mesa structure 304 of top surface 308 and sidewall 306, to be formed at above mesa structure 304 and to comprise the optionally inactivating layer 310 of top surface 309 and sidewall 307, be formed at pair of electrodes 316A, the 316B of mesa structure 304 (with optional passivation layer 310) top and the dielectric layer 320 of top surface 321 coated electrode 316A, 316B.Base substrate 302 can be formed by multiple material, all if provide the silicon of support structure, pottery and polymer.In one embodiment, base substrate has 10
3with 10
18conductivity between ohm-cm.Base substrate 302 can also comprise circuit (not shown), microdevice transfer head 300 to be connected to the working electronic device of electrostatic grabbing assembly.
Mesa structure 304 generates from the outstanding profile of base substrate, to provide the contact point of localization, to pick up particular microchannel device during pick-up operation.In one embodiment, mesa structure 304 has about 1 μm to 5 μm, or the more specifically height of about 2 μm.The concrete size of mesa structure 304 can be depending on the concrete size of the microdevice that will pick up and the thickness of any layer formed above mesa structure.In one embodiment, the height of base substrate 302 upper platform structure 304 array, width and flatness are uniform in whole base substrate, and each microdevice transfer head 300 can be contacted with each corresponding microdevice during pick-up operation.In one embodiment, the width of the whole top surface 321 of each microdevice transfer head is slightly larger than the width of microdevice top surface each in corresponding microdevice array, roughly the same or less, transfer head can not be contacted unintentionally during pick-up operation and expect the microdevice that corresponding microdevice is adjacent.
Mesa structure 304 has top surface 308 and sidewall 306, and described top surface can be plane.In one embodiment, such as, sidewall 306 can convergent up to 10 degree.Make sidewall 306 convergent may be useful when forming electrode 316 and contact conductor 314.Multiple proper technology such as chemical vapour deposition (CVD) (CVD), sputtering or ald (ALD) can be utilized to carry out deposit passivation layer 310.In one embodiment, passivation layer 310 can be 0.5 μm-2.0 μm thick oxides, such as, but not limited to silica (SiO
2), aluminium oxide (Al
2o
3) or tantalum oxide (Ta
2o
5).Electrode 316A, 316B can be single or multiple lifts.Multiple electric conducting material can be adopted, comprise metal, metal alloy, refractory metal and refractory metal alloy to form electrode 316A, 316B.In one embodiment, electrode 316A, 316B have up to 5, the thickness of 000 dust (0.5 μm).In one embodiment, electrode 316A, 316B comprise high melting temperature metal, such as platinum or refractory metal or refractory metal alloy.Such as, electrode 316A, 316B can comprise platinum, titanium, vanadium, chromium, zirconium, niobium, molybdenum, ruthenium, rhodium, hafnium, tantalum, tungsten, rhenium, osmium, iridium and their alloy.Refractory metal and refractory metal alloy generally reveal more high-fire resistance and mar proof than other metal watchs.In one embodiment, electrode 316A, 316B is titanium tungsten (TiW) refractory metal alloy that about 500 dusts (0.05 μm) are thick.
Dielectric layer 320 has suitable thickness and dielectric constant, grabs suction pressure for realizing needed for microdevice transfer head 300, and fully high dielectric strength, in order to avoid damage under operating voltage.Dielectric layer can be single or multiple lift.In one embodiment, dielectric layer be 0.5 μm-2.0 μm thick, but according to the concrete profile of transfer head 300 and below mesa structure 304, thickness can be greater or lesser.Suitable dielectric substance can include but not limited to aluminium oxide (Al
2o
3) and tantalum oxide (Ta
2o
5).According to embodiments of the invention, the dielectric strength that dielectric layer 320 has is greater than applied electric field, with avoid operation during transfer head short circuit.Can utilize multiple proper technology, such as chemical vapour deposition (CVD) (CVD), ald (ALD) and the physical vapour deposition (PVD) (PVD) such as sputtered, carry out dielectric layer deposition 320.Can anneal to dielectric layer 320 in addition after deposition.In one embodiment, dielectric layer 320 has the dielectric strength of at least 400V/ μm.The deposition techniques of such as ALD can be utilized to have the dielectric layer of even, the conformal of good dielectric strength, densification and/or free of pinholes.Also multiple layer can be utilized to realize the dielectric layer 320 of this type of free of pinholes.Also the different dielectric substance of multilayer can be utilized to form dielectric layer 320.In one embodiment, lower electrode 316A, 316B comprise platinum or the refractory metal that has higher than the melt temperature of dielectric layer material depositing temperature or refractory metal alloy, not become the limiting factor selecting dielectric deposition temperature.
The various modes for picking up miniature LED component and miniature LED component array have been set forth in following description corresponding to Figure 17-Figure 23 B.Although should be appreciated that and to describe in Figure 17-Figure 23 B and to show particular microchannel LED component, miniature LED component illustrates before can being and in any miniature LED device structure described above with reference to Fig. 1-Figure 15.
Figure 17 illustrates to pick up miniature LED component according to one embodiment of present invention and the flow chart it being transferred to the method receiving substrate from carrier substrate.In operation 1710, above the miniature LED component being positioned transfer head to be connected to carrier substrate.As in the embodiments above, transfer head can comprise the dielectric layer of electrode above mesa structure, mesa structure and coated electrode.Then in operation 1720, miniature LED component is contacted with transfer head.In one embodiment, miniature LED component is made to contact with the dielectric layer 320 of transfer head.In the embodiment of alternative, transfer head is positioned at above miniature LED component, separates them by suitable air gap, and this appreciable impact can not grab suction pressure, such as 1nm (0.001 μm) or 10nm (0.01 μm).In operation 1730, to electrode application voltage, grab suction pressure to produce in miniature LED component, and utilize transfer head to pick up miniature LED component in operation 1740.Then in operation 1750, miniature LED component is discharged on reception substrate.
Although in succession show operation 2110-2150 in fig. 17, should be appreciated that embodiment is not limited, extra operation can be performed and specific operation can be performed according to different order.Such as, in one embodiment, when making after miniature LED component contacts with transfer head, friction transfer head on the whole top surface of miniature LED component, so that any particle on expulsion may be present in transfer head or miniature LED component the contact surface of any one.In another embodiment, pickup microdevice before or when, executable operations to produce phase transformation in the bonded layer miniature LED component being connected to carrier substrate.If pick up a part for bonded layer together with miniature LED component, then can perform extra operation to control the phase of this part of bonded layer during subsequent treatment.
Can perform to electrode application voltage according to various order to produce the operation 1730 of grabbing and inhaling pressure in miniature LED component.Such as, can making before miniature LED component contacts with transfer head, when making miniature LED component contact with transfer head, or making after miniature LED component contacts with transfer head, to apply voltage.Also before can producing phase transformation in bonded layer, when or after-applied voltage.
When transfer head comprises bipolar electrode, apply alternating voltage, make at particular point in time at pair of electrodes 316A, 316B two ends, when applying negative voltage to electrode 316A, apply positive voltage to electrode 316B, vice versa, to produce pickup pressure.Discharge miniature LED component array from transfer head can use multiple method to realize, comprise and close voltage source, the voltage at reduction pair of electrodes two ends, the waveform of change AC voltage, and by voltage source ground connection.
Figure 18 illustrates pick up miniature LED component array according to one embodiment of present invention and it is transferred to from carrier substrate the flow chart that at least one receives the method for substrate.In operation 1810, be positioned by transfer head array above miniature LED component array, wherein each transfer head has the dielectric layer of electrode above mesa structure, mesa structure and coated electrode.In operation 1820, make miniature LED component array and transfer head array contact.In the embodiment of alternative, transfer head array is positioned at above miniature LED component array, separates them by suitable air gap, and this appreciable impact can not grab suction pressure, such as 1nm (0.001 μm) or 10nm (0.01 μm).Figure 19 illustrates with the end view of microdevice transfer head 300 array of the array contact of miniature LED component 100 according to one embodiment of present invention.As shown in Figure 19, the pitch (P) of transfer head 300 array mates the pitch of miniature LED component 100, and wherein the pitch (P) of transfer head array is spacing (S) between transfer head and transfer head width (W) sum.
In one embodiment, the array of miniature LED component 100 can have the pitch of 10 μm, and wherein each miniature LED component has the spacing of 2 μm and the Breadth Maximum of 8 μm.In one exemplary embodiment, suppose that miniature p-n diode 150 has straight side walls, the top surface of each miniature LED component 100 has the width of about 8 μm.In this type of exemplary embodiment, the width (see Figure 16) of the top surface 321 of corresponding transfer head 300 is about 8 μm or less, to avoid contacting unintentionally adjacent miniature LED component.In another embodiment, the array of miniature LED component 100 can have the pitch of 5 μm, and wherein each miniature LED component has the spacing of 2 μm and the Breadth Maximum of 3 μm.In one exemplary embodiment, the top surface of each miniature LED component 100 has the width of about 3 μm.In this type of exemplary embodiment, the width of the top surface 321 of corresponding transfer head 300 is about 3 μm or less, to avoid contacting unintentionally adjacent miniature LED component 100.But embodiments of the invention are not limited to these specific dimensions, but it can be any suitable size.Such as, the top surface 321 of transfer head 300 can be slightly larger than the top surface of miniature LED component 100, and less than the pitch (P) of the Minitype LED array described with reference to Figure 12 A-Figure 12 B.
Figure 20 illustrates with the end view of the microdevice transfer head array of the array contact of miniature LED component 100 according to one embodiment of present invention.In the embodiment shown in Figure 20, the pitch (P) of transfer head is the integral multiple of microdevice array pitch.In the particular embodiment shown, the pitch (P) of transfer head is 3 times of miniature LED component array pitch.In this type of embodiment, there is the arc discharge that larger transfer head pitch can prevent between transfer head.
Refer again to Figure 18, in operation 1830, a part of selectivity to transfer head 100 array applies voltage.Can each transfer head 300 of independent operation, or can each transfer head 300 of co-operate.In operation 1840, utilize the corresponding part being executed alive part pickup microdevice array in transfer head array by selectivity.In one embodiment, a part of selectivity applying voltage to transfer head array is that each transfer head pointed in transfer head array applies voltage.Figure 21 A is the end view diagram of each transfer head in the microdevice transfer head array of the array picking up miniature LED component 100 according to one embodiment of present invention.In another embodiment, a part of selectivity applying voltage to transfer head array is that each transfer head (such as, the subgroup of transfer head) that is less than pointed in transfer head array applies voltage.Figure 21 B is the end view diagram of the microdevice transfer head array subgroup of an array part of picking up miniature LED component 100 according to one embodiment of present invention.In the specific embodiment shown in Figure 21 A-Figure 21 B, pick-up operation comprises a part for pickup miniature p-n diode 150, reflective layer storehouse 120 and the conforma dielectric barrier layer 160 for miniature LED component 100.In the specific embodiment shown in Figure 21 A-Figure 21 B, pick-up operation comprises the major part of pickup bonded layer 210.Therefore, any embodiment described with reference to Figure 17-Figure 23 B also can be realized by this portion temperature controlling bonded layer 210.Executable operations can be comprised to produce the phase transformation from solid-state to liquid state before the miniature LED component array of pickup in the multiple positions miniature LED component array being connected to the bonded layer of carrier substrate 201 for example, referring to the embodiment described in Figure 17-Figure 23 B.In one embodiment, multiple positions of bonded layer can be the regions of same bonded layer.In one embodiment, multiple positions of bonded layer can be the lateral separation positions of bonded layer.
In operation 1850, then this part of miniature LED component array is discharged at least one and receives on substrate.Therefore, can all miniature LED component arrays be discharged on single reception substrate or optionally be discharged on multiple substrate.Such as, receive substrate can be but be not limited to display substrate, illumination substrate, there is the substrate of the function element of such as transistor or IC or there is the substrate of metal distribution line.Release can be realized by affecting applying voltage as previously mentioned.
According to some embodiments, release also can carry out alloy bonding to form permanent alloy bonding layer with by bonded layer 210 and conductive receiver bonded layer.In certain embodiments, on the reception substrate with corresponding miniature LED component, discharge the major part of bonded layer 210.In this type of embodiment, major part can correspond to the bonded layer of substantial amount, to change the liquidus temperature of conductive receiver bonded layer when forming permanent alloy bonding layer.In other embodiments, major part can correspond to the significant quantity that can affect with receiving substrate bonding.
Figure 22 is the end view diagram of microdevice transfer head array, and this microdevice transfer head array keeps corresponding miniature LED component 100 array above the reception substrate 400 comprising multiple driver contactor 410.Then can make the array of miniature LED component 100 and receive substrate contact, then optionally discharging.Figure 23 A is the end view diagram being optionally discharged into the single miniature LED component 100 received on substrate 400 above driver contactor 410 according to one embodiment of present invention.Figure 23 B is the end view diagram being optionally discharged into all miniature LED component 100 received on substrate 400 above driver contactor 410 according to one embodiment of present invention.
When utilizing various aspects of the present invention, it will be apparent to those skilled in the art that the combination of above embodiment or modification can be adopted to be formed to be ready to pick up and to transfer to the miniature LED component array receiving substrate.Although with architectural feature and/or method behavior specific language description the present invention, should be appreciated that the present invention defined in appended claims is not necessarily limited to described special characteristic or behavior.Special characteristic disclosed in this invention and behavior are understood to that claimed specific suitable enforcement of the present invention illustrates for the present invention.
Claims (26)
1. form a method for Minitype LED array, comprising:
In the multiple openings being formed at the correspondence in the sacrificial patterned on p-n diode layer, form the autoregistration metallization storehouse of multiple lateral separation;
Utilize bonded layer that the first substrate storehouse of the autoregistration metallization storehouse, described sacrificial patterned and the described p-n diode layer that comprise described multiple lateral separation is bonded to the second substrate;
Be etched through described p-n diode layer to form multiple miniature p-n diode above the metallization storehouse of described multiple separation, and expose the described sacrificial patterned laterally between the metallization storehouse of described multiple separation; And
Remove described sacrificial patterned.
2. method according to claim 1, the autoregistration metallization storehouse wherein forming described multiple lateral separation in the multiple openings being formed at the described correspondence in the described sacrificial patterned on described p-n diode layer comprises:
Sacrifice layer described in described p-n diode layer disposed thereon;
Above described sacrifice layer, form patterned mask layer, described patterned mask layer comprises the described multiple opening exposing described sacrifice layer;
Optionally etch described sacrifice layer relative to described mask layer, also remove a part for the described sacrifice layer below described patterned mask layer with the described exposure sacrifice layer removed in described multiple opening;
At described patterned mask layer and p-n diode layer disposed thereon metallization stack layer;
Peel off described patterned mask layer to leave described multiple metallization storehouse and described sacrificial patterned above described p-n diode layer.
3. method according to claim 1, is wherein etched through described p-n diode layer and comprises plasma etching.
4. method according to claim 1, wherein said multiple autoregistration metallization storehouse comprises electrode layer and barrier layer.
5. method according to claim 4, wherein said barrier layer covers elevation surface and the sidewall of described electrode layer.
6. method according to claim 5, wherein said electrode layer is reflexive.
7. method according to claim 6, wherein said electrode layer comprises the material being selected from silver and nickel.
8. method according to claim 5, wherein formed described multiple lateral separation autoregistration metallization storehouse comprise with the power higher than described electrode layer or with the pressure lower than described electrode layer to deposit described barrier layer.
9. method according to claim 1, wherein said sacrificial patterned is non-metallic layer.
10. method according to claim 9, wherein said sacrificial patterned comprises SiO
2.
11. methods according to claim 4, wherein said sacrificial patterned is thicker than the autoregistration metallization storehouse of described multiple lateral separation.
12. methods according to claim 11, wherein said sacrificial patterned is that the about twice of the autoregistration metallization storehouse of described multiple lateral separation is thick.
13. methods according to claim 4, wherein form described multiple autoregistration metallization storehouse and comprise the technology being selected from evaporation and sputtering.
14. methods according to claim 1, depositing conformal medium block layer in the part being also included in the side surface of each in described multiple miniature p-n diode and basal surface.
15. methods according to claim 1, wherein said bonded layer has about 350 DEG C or lower liquidus temperature.
16. methods according to claim 15, wherein said bonded layer has about 200 DEG C or lower liquidus temperature.
17. methods according to claim 15, wherein said bonded layer comprises indium.
18. methods according to claim 15, wherein utilize described bonded layer described first substrate storehouse to be bonded to described second substrate and comprise the first bonded layer on described first substrate storehouse and the second bonded layer bonding on described second substrate.
19. methods according to claim 18, wherein bonding comprises and carries out alloy bonding or melting bonding to described first bonded layer and the second bonded layer.
20. 1 kinds of methods forming Minitype LED array, comprising:
At p-n diode layer disposed thereon sacrifice layer; And
Above described sacrifice layer, form patterned mask layer, described patterned mask layer comprises the multiple openings exposing described sacrifice layer;
Optionally etch described sacrifice layer relative to described mask layer, remove the part of the described sacrifice layer below described patterned mask layer with the described exposure sacrifice layer removed in described multiple opening;
At described patterned mask layer and p-n diode layer disposed thereon metallization stack layer;
Peel off described patterned mask layer to leave multiple metallization storehouse and described sacrificial patterned above described p-n diode layer, wherein said sacrifice layer is thicker than described multiple metallization storehouse;
Utilize bonded layer that the first substrate storehouse comprising described multiple metallization storehouse, described sacrificial patterned and described p-n diode layer is bonded to the second substrate;
Plasma etching to form multiple miniature p-n diode above the metallization storehouse of described multiple separation, and exposes the described sacrificial patterned laterally between the metallization storehouse of described multiple separation through described p-n diode layer; And
Remove described sacrificial patterned.
21. 1 kinds of miniature LED, comprising:
Miniature p-n diode; With
Metallization storehouse, described metallization storehouse is positioned at the below of described miniature p-n diode basal surface, and described metallization storehouse comprises the electrode layer on the described basal surface of described miniature p-n diode and covers the basal surface of described electrode layer and the barrier layer of sidewall;
The described basal surface of wherein said miniature p-n diode is wider than described metallization storehouse.
22. miniature LED according to claim 21, also comprise conforma dielectric barrier layer, and the sidewall of the described miniature p-n diode of described conforma dielectric barrier layer leap also partly crosses over the described basal surface of described miniature p-n diode.
23. miniature LED according to claim 22, wherein said miniature p-n diode also comprises top surface and the tapered side wall between described top surface and described basal surface, and the basal surface of wherein said miniature p-n diode is wider than the top surface of described miniature p-n diode.
24. miniature LED according to claim 22, wherein said metallization storehouse is reflexive.
25. miniature LED according to claim 22, wherein said metallization storehouse is between described miniature p-n diode and the bonded layer formed on substrate.
26. miniature LED according to claim 21, wherein said bonded layer comprises indium.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/458,932 US9548332B2 (en) | 2012-04-27 | 2012-04-27 | Method of forming a micro LED device with self-aligned metallization stack |
| US13/458,932 | 2012-04-27 | ||
| PCT/US2013/036477 WO2013162927A1 (en) | 2012-04-27 | 2013-04-12 | Method of forming a micro led device with self-aligned metallization stack |
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| CN104350613A true CN104350613A (en) | 2015-02-11 |
| CN104350613B CN104350613B (en) | 2018-11-20 |
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|---|---|
| US (1) | US9548332B2 (en) |
| KR (1) | KR101638274B1 (en) |
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Also Published As
| Publication number | Publication date |
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| WO2013162927A1 (en) | 2013-10-31 |
| US9548332B2 (en) | 2017-01-17 |
| TW201349556A (en) | 2013-12-01 |
| WO2013162927A9 (en) | 2014-10-23 |
| KR101638274B1 (en) | 2016-07-08 |
| KR20150013603A (en) | 2015-02-05 |
| US20130285086A1 (en) | 2013-10-31 |
| TWI562394B (en) | 2016-12-11 |
| CN104350613B (en) | 2018-11-20 |
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