CN104247247A - 半导体模块 - Google Patents

半导体模块 Download PDF

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Publication number
CN104247247A
CN104247247A CN201380019192.4A CN201380019192A CN104247247A CN 104247247 A CN104247247 A CN 104247247A CN 201380019192 A CN201380019192 A CN 201380019192A CN 104247247 A CN104247247 A CN 104247247A
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power semiconductor
semiconductor module
semiconductor device
many group
upper arm
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佐藤忠彦
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
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Abstract

本发明提供了一种半导体模块,所述半导体模块搭载有:多个功率用半导体器件,分别构成多组半桥电路的上臂和下臂;多个驱动电路,分别驱动这些功率用半导体器件内的具有控制端子的功率用半导体器件以使其导通/截止,尤其是,分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各低电位侧电极和分别构成所述多组半桥电路的下臂的所述功率用半导体器件的各高电位侧电极分别单独地连接到多个外部连接用输出端子。

Description

半导体模块
技术领域
本发明涉及包括分别形成多组半桥电路的上臂和下臂的多个功率用半导体器件的半导体模块。
背景技术
包括分别形成多组半桥电路的上臂和下臂的多个功率用半导体器件的半导体模块用作驱动例如电动机等的负载的逆变器装置的输出部的组成部件。图6是示出在驱动三相电动机M的逆变器装置中使用的半导体模块IPM的主要部分的概要结构的图,Q1、Q2至Q6是分别形成3组半桥电路的6个开关器件。并且,D1、D2至D6是分别反向并联连接到所述各开关器件Q1、Q2至Q6的续流二极管。
这里,所述3组半桥电路构成为形成上臂的开关器件Q1、Q2、Q3和形成下臂的开关器件Q4、Q5、Q6分别成对地串联连接,其中,开关器件Q1、Q2、Q3共同连接到施加有直流电压的电源端子P。所述各半桥电路将形成上臂的开关器件Q1(Q2、Q3)和形成下臂的开关器件Q4(Q5、Q6)之间的连接点用作向所述三相电动机M供应U(V、W)相电力的输出端子L1(L2、L3)。
并且,形成所述下臂的开关器件Q4、Q5、Q6的另一端分别连接到接地侧端子N1、N2、N3。这些接地侧端子N1、N2、N3通过例如分流电阻R1、R2、R3接地。需要说明的是,所述开关器件Q1、Q2至Q6是由具有控制电极(栅电极)的IGBT或MOS-FET构成的功率用半导体器件。关于具有这种构成的半导体模块IPM,例如在专利文献1等中进行了详细的描述。
图7示出了上述半导体模块IPM的布局结构示例。如图7所示,现有的半导体模块IPM在形成矩形的模块主体的端子壳体的大约中央部设有绝缘基板2。并且半导体模块IPM使所述开关器件Q1、Q2至Q6以及所述续流二极管D1、D2至D6在所述绝缘基板2上分别排成一列并且平行地布置。需要说明的是,在图中,3为导体,4、5为构成外部连接用控制端子的多根引线框架(LF)。所述导体3由兼作外部连接用控制端子的引线框架(3,3h)和铝绝缘基板上的多个布线图案(3a至3g)构成。
所述半导体模块IPM包括分别单独地驱动形成上臂的开关器件Q1、Q2、Q3以使它们导通/截止的高端控制电路IC1、IC2、IC3。半导体模块IMP还包括分别驱动形成下臂的开关器件Q4、Q5、Q6以使其导通/截止的低端控制电路IC4。这些控制电路IC1、IC2、IC3、IC4排成一列并且与所述开关器件Q1、Q2至Q6的布置方向平行地布置。在确定这些开关器件Q1、Q2至Q6、所述续流二极管D1、D2至D6以及所述控制电路IC1、IC2、IC3、IC4的排列结构时要争取在半导体模块IPM内不形成不必要的电流环和电流环形成为最小。
在图6中示出的构成的半导体模块IPM通过利用连接线(诸如,金线等的金属线)将形成所述导体层的多个布线图案3、所述开关器件Q1、Q2至Q6、所述续流二极管D1、D2至D6以及所述控制电路IC1、IC2、IC3互相连接来实现。并且从所述模块主体引出到外部的外部连接用输出端子沿着该模块主体的一侧的长边,以例如电源端子P、所述输出端子L1、L2、L3以及接地侧端子N1、N2、N3的顺序布置。并且用于将控制信号等输入/输出到所述控制电路IC1、IC2、IC3、IC4的外部连接用控制端子沿着所述模块主体的另一侧的长边布置。实现上述布局结构的半导体模块的半导体器件构造,在例如专利文献2等中进行了详细的描述。
现有技术文献
专利文献
专利文献1:日本特许第3394377号公报
专利文献2:日本特许第3941266号公报
发明内容
技术问题
然而,在上述构成的半导体模块中,上臂侧的开关器件Q1、Q2、Q3和下臂侧的开关器件Q4、Q5、Q6在构成所述各半桥电路的每个组中分别进行内部连接,其连接点照原样作为所述外部连接用输出端子L1、L2、L3分别引出到外部。因此,不可能利用该半导体模块来构成例如双正激变换器或交错式升压变换器等。具体地讲,不可能在所述上臂侧的开关器件Q1(Q2、Q3)和下臂侧的开关器件Q4(Q5、Q6)之间插入例如线圈或电感。因此,作为所述三相电动机M的驱动电路等的所述构成的半导体模块的应用受到限制。
考虑到以上问题,本发明的目的在于提供一种包括分别形成多组半桥电路的上臂和下臂的多个功率用半导体器件,尤其是,在不改变其布局的情况下能够适用于各种应用的半导体模块。
技术方案
根据本发明的半导体模块,其搭载有:多个功率用半导体器件,分别构成多组半桥电路的上臂和下臂;多个驱动电路,分别驱动这些功率用半导体器件中的具有控制端子的功率用半导体器件以使其导通/截止,并且电源端子和所述各控制电路的多个控制端子分别连接到多个外部连接用控制端子。
尤其,根据本发明的半导体模块,为了实现上述目的,将分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各低电位侧电极和分别构成所述多组半桥电路的下臂的所述功率用半导体器件的各高电位侧电极分别单独地连接到多个外部连接用输出端子。
优选地,所述功率用半导体器件由开关器件和二极管构成,所述开关器件由具有控制电极的IGBT或MOS-FET构成,所述二极管与这些各开关器件成对使用。并且,实现有如下构造:分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各高电位侧电极彼此共同连接而安装在绝缘基板上,分别构成所述多组半桥电路的下臂的所述功率用半导体器件彼此分开而安装在所述绝缘基板上。
优选地,分别构成所述多组半桥电路的上臂的所述功率用半导体器件与矩形的模块主体的排列有所述多个外部连接用输出端子的长边平行地并排设置。并且,分别构成所述多组半桥电路的下臂的所述各功率用半导体器件与分别构成所述上臂的所述功率用半导体器件的排列方向平行地并排设置。
并且,所述开关器件和所述二极管在所述多组半桥电路的上臂侧和下臂侧的每一侧交替地排列。在此基础上,单独地连接到分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各低电位侧电极的所述外部连接用输出端子和单独地连接到分别构成所述多组半桥电路的下臂的所述功率用半导体器件的各高电位侧电极的所述外部连接用输出端子,优选为,在所述多组半桥电路的每组中成对地相邻而设置。
技术效果
上述构成的半导体模块,将上臂侧的功率用半导体器件的各低电位侧电极和下臂侧的功率用半导体器件的各高电位侧电极分别单独地连接到多个外部连接用输出端子。因此,例如通过所述外部连接用输出端子在所述各电极之间可以容易地插入线圈和/或电感。因此,可以容易地构成例如双正激变换器或交错式升压变换器等
在实现驱动所述三相电动机的逆变器装置专用的半导体模块的情况下,例如,在该半导体模块的内部,可以简单地通过利用连接线(例如,金线等的金属线)将所述上臂侧的功率用半导体器件的各低电位侧电极和下臂侧的功率用半导体器件的各高电位侧电极相互连接,而不改变其布局结构就能实现。因此,能够实现具有通用性的半导体模块,从而具有更实用的优点。
附图说明
图1是根据本发明的一个实施方式的半导体模块的概要结构图。
图2是示出在图1中示出的半导体模块的布局结构的图。
图3是示出利用在图1中示出的半导体模块构成交错式升压变换器的示例的图。
图4是示出当将本发明的半导体模块改变为用来驱动三相电动机时的构成示例的图。
图5是示出实现图4中示出的用于驱动三相电动机的半导体模块的该半导体模块的布局结构中的内部连线的变更示例的图。
图6是示出用于驱动三相电动机的逆变器装置中的现有的普通半导体模块的构成示例的图。
图7是示出现有的半导体模块的布局结构的图。
符号说明:
IPM:半导体模块
Q(Q1、Q2至Q6):开关器件
D(D1、D2至D6):续流二极管
1:模块主体
2:绝缘基板
3:布线图案(导体层)
4a、4b至4o:引线框架(外部连接用控制端子)
5a、5b至5j:引线框架(外部连接用输出端子)
7:接合线(导体线)
具体实施方式
下面,将参照附图来描述根据本发明的一个实施方式的半导体模块。
图1是根据该实施方式的半导体模块IPM的概要结构图。在图1中示出的半导体模块IPM包括形成3组半桥电路的6个开关器件Q1、Q2至Q6和6个续流二极管D1、D2至D6。并且,所述半导体模块IPM包括分别驱动所述开关器件Q1、Q2至Q6以使它们导通/截止的3个控制电路IC1、IC2、IC3。需要说明的是,虽然这里将描述形成3组半桥电路的半导体模块IPM,但是在半导体模块IPM中也可以形成2组或4组以上的半桥电路。
图2示出了在图1中所示的半导体模块IPM的布局结构。在图2中,2是设置在矩形的模块主体1的大约中间部分的绝缘基板,矩形的模块主体1形成半导体模块IPM的基体。该绝缘基板2可以由例如在陶瓷基板上形成金属导体层的绝缘金属基板构成。并且在该绝缘基板2上可以通过例如光刻等形成有兼作外部连接用控制端子的引线框架(3、3h)和铝绝缘基板上的多个布线图案(3a至3g)。并且在所述绝缘基板2上搭载有作为多个功率用半导体器件的所述6个开关器件Q1、Q2至Q6和6个续流二极管D1、D2至D6,还搭载有所述3个控制电路IC1、IC2、IC3。
这里,所述6个开关器件Q1、Q2至Q6由例如IGBT构成,并且基本上每2个串联连接以形成3组半桥电路。所述6个续流二极管D1、D2至D6基本上如前所述那样分别与所述开关器件Q1、Q2至Q6反向并联连接以形成续流电流的路径。
在模块主体1的一侧的长边上可以平行地布置有构成多个外部连接用控制端子的多根(例如,15根)引线框架(LF)4a、4b至4o。并且在所述模块主体1的另一侧的长边上可以平行地布置有构成多个外部连接用输出端子的多根(例如,10根)引线框架(LF)5a、5b至5j。所述引线框架(LF)4a、4b至4o可以起到将控制信号等输入和输出到所述控制电路IC1、IC2、IC3的作用。所述引线框架(LF)5a、5b至5j可以起到将由所述开关器件Q1、Q2至Q6分别输出的电流供应到外部的作用。
这里,根据本发明的半导体模块IPM的特征在于,如图1所示的概要结构以及如图2所示的布局结构,在多组(例如,3组)半桥电路中的上臂的所述开关器件(IGBT)Q1、Q2、Q3的作为各低电位侧电极的源极,以及分别构成所述多组(例如,3组)半桥电路的下臂的所述开关器件(IGBT)Q4、Q5、Q6的作为功率用半导体器件的各高电位侧电极的漏极分别单独地连接到作为多个外部连接用输出端子的引线框架5a、5b至5j。
如图1所示,设置在所述半桥电路的下臂侧的续流二极管D4、D5、D6的阴极分别串联连接到所述上臂侧的开关器件Q1、Q2、Q3的作为各低电位侧电极的源极,并且该续流二极管D4、D5、D6的阳极连接到所述下臂侧的开关器件Q4、Q5、Q6的作为各低电位侧电极的源极。
设置在上臂侧的所述续流二极管D1、D2、D3的阴极分别共同地连接到所述上臂侧的开关器件Q1、Q2、Q3的作为各高电位侧电极的漏极。并且该续流二极管D1、D2、D3的各阳极分别串联连接到所述下臂侧的开关器件(IGBT)Q4、Q5、Q6的作为各高电位侧电极的漏极。
即,上臂侧的开关器件Q1、Q2、Q3和下臂侧的续流二极管D4、D5、D6分别串联连接,同时下臂侧的开关器件Q4、Q5、Q6和上臂侧的续流二极管D1、D2、D3分别串联连接。并且,由这些开关器件Q和续流二极管D构成的6组串联电路并排设置。
在所述各串联电路中的所述开关器件Q和续流二极管D之间的连接点分别单独地连接到分别独立的6根引线框架5(5b、5c、5e、5f、5h、5i),并且作为外部连接用输出端子L1+、L1-、L2+、L2-、L3+、L3-而引出到外部。所述上臂侧的所述开关器件(IGBT)Q1、Q2、Q3的作为各高电位侧电极的漏极与所述续流二极管D1、D2、D3的各阴极互相共同连接,然后连接到所述引线框架5中的一个(5a),并且作为电源端子P引出到外部。进一步,所述下臂侧的所述开关器件Q4、Q5、Q6的作为各低电位侧电极的源极分别单独地连接到所述10根引线框架5中的其它引线框架5(5d、5g、5j),并且作为外部连接用输出端子N1、N2、N3引出到外部。
在确定所述开关器件Q1、Q2至Q6和所述续流二极管D1、D2至D6之间的这种连接关系时,要争取在该半导体模块IPM内不形成不必要的电流环和电流环形成为最小,在此确定如图2所示的所述开关器件Q1、Q2至Q6和所述续流二极管D1、D2至D6的布局结构。
即,所述上臂侧的开关器件Q1、Q2、Q3和续流二极管D1、D2、D3在与所述绝缘基板2上的所述模块主体1的长边平行布置的导体层3a上沿着该导体层3a交替地布置。具体地讲,在图2中,从上侧起以开关器件Q1、续流二极管D1、开关器件Q2、续流二极管D2、开关器件Q3、续流二极管D3的顺序布置。
需要说明的是,如图2中的局部放大部分所示,开关器件(IGBT)Q大体上具有如下器件结构:发射区域(即,发射电极)E隔着图中未示出的绝缘层形成在集电极区域C上,同时将栅电极G引出到该发射区域E的侧部。并且如图2中局部放大部分所示,续流二极管D大体上具有如下器件结构:阳极区域(即,阳极电极)A隔着图中未示出的绝缘层形成在阴极区域K上。关于开关器件Q和续流二极管D的这种器件结构,在前述的专利文献2等中进行了描述。
并且,利用诸如银浆料或焊料等的导电性连接方式将所述开关器件Q1、Q2、Q3的各集电极区域C分别电连接在所述导体层3a上。另外,以同样的方式将所述续流二极管D1、D2、D3的各阴极区域K分别电连接到所述导体层3a。
另一方面,所述下臂侧的开关器件Q4、Q5、Q6和续流二极管D4、D5、D6分别单独地交替布置在导体层3b、3c至3g上,导体层3b、3c至3g在该导体层3a的右侧沿着该导体层3a以互相绝缘的方式分离地形成。具体地讲,在图中,从上侧起以续流二极管D4、开关器件Q4、续流二极管D5、开关器件Q5、续流二极管D6、开关器件Q6的顺序布置。
这些开关器件Q4、Q5、Q6和续流二极管D4、D5、D6在所述各导体层3b、3c至3g上的布置以与所述开关器件Q1、Q2、Q3和续流二极管D1、D2、D3的布置方式相同的方式进行。并且所述控制电路IC1、IC2、IC3在形成在所述导体层3a的左侧的接地用导体层3h上沿着该导体层3h顺序地布置。
在此基础上,利用作为由例如金线或铜线等构成的导线的接合线7将所述开关器件Q1、Q2至Q6、所述续流二极管D1、D2至D6和所述控制电路IC1、IC2、IC3分别电连接,以构建如图1所示的连接关系。进一步,利用作为导线的接合线7还将所述各导体层3a、3b、3c至3g和构成所述外部连接用输出端子的多根引线框架5a、5b至5j分别电连接,以构建如图1所示的连接关系。
同样,利用作为导线的接合线7将所述控制电路IC1、IC2、IC3和所述开关器件Q1、Q2至Q6分别电连接,以构建如图1所示的连接关系。需要说明的是,在图2中省略了连接所述控制电路IC1、IC2、IC3和构成所述外部连接用控制端子的多根引线框架4a、4b至4o之间的接合线7以及作为各自连接的多根导线的接合线7。
根据这样构成的半导体模块IPM,上臂侧的开关器件Q1、Q2、Q3的各源电极(即,低电位侧电极)和下臂侧的开关器件Q4、Q5、Q6的各漏电极(即,高电位侧电极)分别单独地作为外部连接用输出端子L1+、L1-、L2+、L2-、L3+、L3-而引出到外部。因此,根据这种构造,可以将例如线圈L或变压器T的电感插入安装在上臂侧开关器件Q1(Q2、Q3)和下臂侧的开关器件Q4(Q5、Q6)之间。因此,能够容易地形成例如双正激变换器或交错式升压变换器等。
在驱动三相电动机M的情况下,例如,如图4所示,在半导体模块IPM的内部,预先将上臂侧开关器件Q1(Q2、Q3)和下臂侧的开关器件Q4(Q5、Q6)分别成对地进行内部连接,然后通过构建3组半桥电路,从而形成用于驱动三相电动机M的专用半导体模块IPM。
这种情况下,具体地讲,例如在图5中示出的该半导体模块IPM的布局构造所示,可以将下臂侧的开关器件Q4(Q5、Q6)的各发射极电极E和下臂侧的续流二极管D4(D5、D6)的各阴极电极K利用作为所述导线的接合线7分别单独地电连接。需要说明的是,在所述外部连接用输出端子L1+、L1-、L2+、L2-、L3+、L3-之间,也可以单独地连接每个成对的输出端子。然而,当实际应用时,从流过所述半导体模块IPM的电流环的观点来看,优选为以如上所述的方式进行内部连线。
以这种方式,通过仅变更内部连线,在不变更布局结构本身的情况下能够实现适用于驱动三相电动机M的半导体模块IPM,所以能够使该半导体模块IPM本身具有通用性。因此,能够扩大半导体模块IPM的利用范围(即,用途),而且不必开发对应于各种用途的半导体模块,所以根据本发明的半导体模块具有能够降低成本等的效果。
需要说明的是,本发明不限于上述实施方式。虽然这里仅描述了形成3组半桥电路的半导体模块的示例,但是本发明也可以同样适用于实现形成2组或4组以上的半桥电路的半导体模块的情况。并且本发明不但适用于所述IGBT作为开关器件Q的情况,而且也同样适用于MOS-FET作为开关器件Q的情况。
当然所述模块主体1的整体可以由绝缘基板2构成,而且也可以在该绝缘基板2上设置所述开关器件Q1、Q2至Q6和所述续流二极管D1、D2至D6。这种情况下,也可以将铺设在模块主体1上的作为导体层的布线图案3和设置在绝缘基板2上的布线图案3与所述引线框架4、5一起形成为一体。进一步,虽然这里设置3个控制电路IC1、IC2、IC3用来驱动所述开关器件Q1、Q2至Q6,但是不言而喻,也可以通过一个驱动用控制电路IC分别驱动所述开关器件Q1、Q2至Q6。另外,在不脱离本发明主旨的范围内,可以进行各种变形。

Claims (6)

1.一种半导体模块,其特征在于,所述半导体模块搭载有:
多个功率用半导体器件,分别构成多组半桥电路的上臂和下臂;
多个驱动电路,分别驱动这些功率用半导体器件中的具有控制端子的功率用半导体器件以使其导通/截止,
并且,电源端子和所述各控制电路的多个控制端子分别连接到多个外部连接用控制端子,
分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各低电位侧电极和分别构成所述多组半桥电路的下臂的所述功率用半导体器件的各高电位侧电极分别单独地连接到多个外部连接用输出端子。
2.根据权利要求1所述的半导体模块,其特征在于,所述半导体模块具有以下结构:分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各高电位侧电极彼此共同连接而安装在绝缘基板上,分别构成所述多组半桥电路的下臂的所述功率用半导体器件彼此分开而安装在所述绝缘基板上。
3.根据权利要求1所述的半导体模块,其特征在于,分别构成所述多组半桥电路的上臂的所述各功率用半导体器件与矩形的模块主体的排列有所述多个外部连接用输出端子的长边平行地并排设置,分别构成所述多组半桥电路的下臂的所述各功率用半导体器件与分别构成所述上臂的所述功率用半导体器件的排列方向平行地并排设置。
4.根据权利要求1所述的半导体模块,其特征在于,所述功率用半导体器件是指由具有控制电极的IGBT或MOS-FET构成的开关器件以及与这些各开关器件成对使用的二极管。
5.根据权利要求4所述的半导体模块,其特征在于,所述开关器件和所述二极管在所述多组半桥电路的上臂侧和下臂侧的每一侧中交替地排列。
6.根据权利要求1所述的半导体模块,其特征在于,单独地连接到分别构成所述多组半桥电路的上臂的所述功率用半导体器件的各低电位侧电极的所述外部连接用输出端子和单独地连接到分别构成所述多组半桥电路的下臂的所述功率用半导体器件的各高电位侧电极的所述外部连接用输出端子,在所述多组半桥电路的每组中成对地相邻而设置。
CN201380019192.4A 2012-09-20 2013-08-02 半导体模块 Pending CN104247247A (zh)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108573967A (zh) * 2017-03-10 2018-09-25 三菱电机株式会社 半导体模块及电力变换装置
CN108878392A (zh) * 2017-05-15 2018-11-23 施韦策电子公司 电子组件和印刷电路板
CN110859055A (zh) * 2018-06-08 2020-03-03 新电元工业株式会社 半导体模块
CN110859054A (zh) * 2018-06-08 2020-03-03 新电元工业株式会社 半导体模块

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6352200B2 (ja) * 2015-02-04 2018-07-04 新電元工業株式会社 半導体装置
EP3197034B1 (fr) * 2016-01-22 2018-10-17 Thales Convertisseur de puissance à découpage configuré pour commander au moins une phase d'un récepteur électrique polyphasé à au moins trois phases
JPWO2019234911A1 (ja) * 2018-06-08 2020-06-18 新電元工業株式会社 半導体モジュール
EP3667899A1 (de) * 2018-12-11 2020-06-17 Conti Temic microelectronic GmbH Motorsteuerungsvorrichtung für eine motoreinheit und ein verfahren zum betrieb einer solchen motorsteuerungsvorrichtung

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133768A (ja) * 1998-10-27 2000-05-12 Mitsubishi Electric Corp 半導体パワーモジュール
JP2002034258A (ja) * 2000-07-18 2002-01-31 Fuji Electric Co Ltd コンバータ装置
US20030107120A1 (en) * 2001-12-11 2003-06-12 International Rectifier Corporation Intelligent motor drive module with injection molded package
CN1136649C (zh) * 2000-05-31 2004-01-28 三菱电机株式会社 电力组件
CN101001076A (zh) * 2006-01-13 2007-07-18 欧姆龙株式会社 逆变器装置
CN101814854A (zh) * 2009-02-23 2010-08-25 三菱电机株式会社 半导体开关装置
CN102255539A (zh) * 2010-05-21 2011-11-23 株式会社电装 逆变器装置及利用该逆变器装置的驱动单元

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3394377B2 (ja) * 1996-01-09 2003-04-07 三菱電機株式会社 半導体装置および半導体モジュール
JP3651796B2 (ja) * 2002-08-05 2005-05-25 株式会社東芝 電力変換装置
JP2012165621A (ja) * 2011-02-09 2012-08-30 Toshiba Corp 電力変換装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133768A (ja) * 1998-10-27 2000-05-12 Mitsubishi Electric Corp 半導体パワーモジュール
CN1136649C (zh) * 2000-05-31 2004-01-28 三菱电机株式会社 电力组件
JP2002034258A (ja) * 2000-07-18 2002-01-31 Fuji Electric Co Ltd コンバータ装置
US20030107120A1 (en) * 2001-12-11 2003-06-12 International Rectifier Corporation Intelligent motor drive module with injection molded package
CN101001076A (zh) * 2006-01-13 2007-07-18 欧姆龙株式会社 逆变器装置
CN101814854A (zh) * 2009-02-23 2010-08-25 三菱电机株式会社 半导体开关装置
CN102255539A (zh) * 2010-05-21 2011-11-23 株式会社电装 逆变器装置及利用该逆变器装置的驱动单元

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108573967A (zh) * 2017-03-10 2018-09-25 三菱电机株式会社 半导体模块及电力变换装置
CN108573967B (zh) * 2017-03-10 2021-09-21 三菱电机株式会社 半导体模块及电力变换装置
CN108878392A (zh) * 2017-05-15 2018-11-23 施韦策电子公司 电子组件和印刷电路板
CN108878392B (zh) * 2017-05-15 2023-04-14 施韦策电子公司 电子组件和印刷电路板
CN110859055A (zh) * 2018-06-08 2020-03-03 新电元工业株式会社 半导体模块
CN110859054A (zh) * 2018-06-08 2020-03-03 新电元工业株式会社 半导体模块
CN110859055B (zh) * 2018-06-08 2022-08-02 新电元工业株式会社 半导体模块

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