CN104201102B - A kind of fast recovery diode FRD chips and its manufacture craft - Google Patents
A kind of fast recovery diode FRD chips and its manufacture craft Download PDFInfo
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- CN104201102B CN104201102B CN201410431131.5A CN201410431131A CN104201102B CN 104201102 B CN104201102 B CN 104201102B CN 201410431131 A CN201410431131 A CN 201410431131A CN 104201102 B CN104201102 B CN 104201102B
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- 238000011084 recovery Methods 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 238000009792 diffusion process Methods 0.000 claims abstract description 47
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims abstract description 32
- 230000008021 deposition Effects 0.000 claims abstract description 22
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 19
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 18
- 229910052796 boron Inorganic materials 0.000 claims abstract description 18
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000001962 electrophoresis Methods 0.000 claims abstract description 17
- 239000011574 phosphorus Substances 0.000 claims abstract description 17
- 229910052697 platinum Inorganic materials 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 16
- 230000003647 oxidation Effects 0.000 claims abstract description 15
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 14
- 238000005245 sintering Methods 0.000 claims abstract description 9
- 238000002203 pretreatment Methods 0.000 claims abstract description 8
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 7
- 238000007747 plating Methods 0.000 claims abstract description 7
- 238000001259 photo etching Methods 0.000 claims abstract description 4
- 238000012805 post-processing Methods 0.000 claims abstract description 4
- 238000005488 sandblasting Methods 0.000 claims abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 57
- 229910052710 silicon Inorganic materials 0.000 claims description 57
- 239000010703 silicon Substances 0.000 claims description 57
- 239000011521 glass Substances 0.000 claims description 19
- 239000007788 liquid Substances 0.000 claims description 19
- 239000008367 deionised water Substances 0.000 claims description 18
- 229910021641 deionized water Inorganic materials 0.000 claims description 18
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 238000005516 engineering process Methods 0.000 claims description 13
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 12
- 239000000428 dust Substances 0.000 claims description 7
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims description 6
- 239000012459 cleaning agent Substances 0.000 claims description 6
- 229910003460 diamond Inorganic materials 0.000 claims description 6
- 239000010432 diamond Substances 0.000 claims description 6
- 230000003628 erosive effect Effects 0.000 claims description 6
- 238000002161 passivation Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 4
- 238000002844 melting Methods 0.000 claims description 4
- 239000000843 powder Substances 0.000 claims description 4
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 claims description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- 229960000583 acetic acid Drugs 0.000 claims description 3
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 235000013312 flour Nutrition 0.000 claims description 3
- 239000012362 glacial acetic acid Substances 0.000 claims description 3
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 238000003698 laser cutting Methods 0.000 claims description 3
- 238000003801 milling Methods 0.000 claims description 3
- 239000000203 mixture Substances 0.000 claims description 3
- 238000006396 nitration reaction Methods 0.000 claims description 3
- 229910017604 nitric acid Inorganic materials 0.000 claims description 3
- 230000000717 retained effect Effects 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 2
- PWKSKIMOESPYIA-BYPYZUCNSA-N L-N-acetyl-Cysteine Chemical compound CC(=O)N[C@@H](CS)C(O)=O PWKSKIMOESPYIA-BYPYZUCNSA-N 0.000 claims 1
- 230000002441 reversible effect Effects 0.000 abstract description 8
- 238000005520 cutting process Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 25
- 239000007789 gas Substances 0.000 description 5
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- GVVPGTZRZFNKDS-JXMROGBWSA-N geranyl diphosphate Chemical compound CC(C)=CCC\C(C)=C\CO[P@](O)(=O)OP(O)(O)=O GVVPGTZRZFNKDS-JXMROGBWSA-N 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 2
- -1 platinum ion Chemical class 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- 229910015845 BBr3 Inorganic materials 0.000 description 1
- 229910019213 POCl3 Inorganic materials 0.000 description 1
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 208000021760 high fever Diseases 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Manufacturing & Machinery (AREA)
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Abstract
The present invention relates to a kind of fast recovery diode FRD chips and its manufacture craft, its technique has following steps:Diffusion pre-treatment, boron source pre-deposition, boron source main diffusion, diffusion post processing, the one side back of the body wear away thin, oxidation pre-treatment, oxidation, photoetching, go one side oxide layer, phosphorus source pre-deposition, phosphorus diffusion, sandblasting, platinum diffusion, N+ faces mesa etch, electrophoresis, sintering, oxide layer, nickel plating, gold-plated, chip cutting, and gained chip structure is P+‑N‑N+Type.Present invention improves the homogeneity of fast recovery diode reverse recovery time, improves controllability, while reduces pressure drop, reduces leakage current, improves pressure-resistant stability.Solve the contradiction to condition each other between the backward voltage of fast recovery diode, forward voltage, reverse recovery time, leakage current, parameters is optimal collocation, so as to improve the reliability of diode, switching characteristic, reduce power consumption.The fast recovery diode of the present invention breaches traditional fast recovery diode technical bottleneck.
Description
Technical field
The present invention relates to crystal diode chip production technical field, more particularly to a kind of fast recovery diode (FRD) core
Piece and production technology.
Background technology
At present in semicon industry production fast recovery diode (FRD) chip generally use phosphorus-boron paper source diffusion technique or
Using epitaxial wafer substrate boron diffusion technique, there is problem in existing process:1) junction depth using the diffusion of paper source is uneven, causes punch through
Voltage is not sufficiently stable, and Surge handling capability is poor;2) forward voltage drop is larger, and power consumption is larger;3) the too high absorption doping metals of paper source concentration
Ion, make metal ion profile uneven, cause reverse recovery time heterogeneity, while cause leakage current to increase;4) epitaxial wafer
Cost is high, and outer layer doping concentration is high, and it is discrete to also result in recovery time;5) glass dust that glassivation uses in industry melts
Melt temperature at 800 DEG C -850 DEG C, so to use high glass firing temperature, this can also cause the redistribution of metal ion uneven
Even, recovery time is abnormal, and switching characteristic is poor.
The content of the invention
It is overcome the deficiencies in the prior art that the purpose of the present invention, which is exactly, designs a kind of fast recovery diode chip and production work
Skill, this technique improve the homogeneity of diode voltage, reduce leakage current, enhance the pressure-resistant stability of diode and resist
Surge capacity.
In order to solve the above problems, the technical solution adopted by the present invention is:1st, a kind of fast recovery diode (FRD) chip life
Production. art, it is characterised in that:The step of including following order:
Boron source pre-deposition:Lead to handling clean original N-type silicon chip gas in 1150~1200 DEG C of diffusion furnace and carrying
Enter liquid boron source and carry out pre-deposition;
Boron source main diffusion:Deep knot is carried out in 1200~1250 DEG C of diffusion furnaces to the silicon chip after pre-deposition and promotes diffusion, is formed
Deep P+Layer;
The one side back of the body wears away thin:Diffusion junctions P with diamond dust one side+And expansion area is ground off, final piece thickness is retained in 260~
270μm;
Oxidation:By the silicon chip cleaned up, long layer of oxide layer does mask in 1100~1200 DEG C of oxidation furnace, 1.5 μm
~2 μm, stop that phosphorous diffusion source enters P+Face, open channels;
Photoetching:Gluing, exposure, developing procedure are carried out to the silicon chip after oxidation, form table top figure;
Remove one side oxide layer:Silicon chip one side oxide layer is removed using ammonium fluoride etchant, deionized water, that is, carries on the back flour milling oxygen
Change layer;
Phosphorus source pre-deposition:One side oxide layer, which removes clean silicon chip gas in 1100~1150 DEG C of diffusion furnace and carried, leads to
Enter liquid phosphorus source and carry out pre-deposition;
Phosphorus diffusion:The silicon chip of phosphorus deposition is diffused to form N in 1200~1250 DEG C of diffusion furnace+;
Platinum spreads:Silicon chip P+ faces after cleaning are uniformly coated with liquid platinum source, the platinum that temperature is 860~910 DEG C is put into and expands
Dissipate the injection that metal platinum is carried out in stove;
N+Face mesa etch:Using nitric acid, hydrofluoric acid, glacial acetic acid, corrode N according to 5: 3.3: 1 ratio+Face mesa trench,
Gash depth reaches P by base+Layer, nitration mixture temperature control wash down at -8~-12 DEG C, and with deionized water;
Electrophoresis:Electrophoresis liquid is configured using glass powder with low melting point, silicon chip is placed in the electrophoresis liquid configured, according to table top ditch
The glass weight that groove depth need to deposit sets the time, carries out glass electrophoresis;
Sintering:Silicon chip after electrophoresis is sintered in 650~700 DEG C of sintering furnace;
Oxide layer:Soaked with 10: 1 buffered etch liquid, deionized water is cleaned by ultrasonic silicon chip surface oxygen after removal sintering
Change layer.
There is diffusion pre-treatment before described boron source pre-deposition step:Pass through electronic cleaning agent SC2, deionized water ultrasound it is clear
The process such as wash, silicon chip surface is chemically treated, obtains clean original N-type silicon chip.
There is diffusion post processing after described boron source main diffusion before step:It is cleaned by ultrasonic with hydrofluoric acid dips, deionized water,
Silicon chip is separated, and removes surface oxide layer.
There is oxidation pre-treatment before described oxidation step:It is utilized respectively electronic cleaning agent SC2, deionized water is to silicon chip table
Face is chemically treated, and obtains clean silicon chip.
There is sandblasting after described phosphorus diffusion step:With wet diamond dust it is two-sided to silicon chip carry out it is uniformly roughened.
There is nickel plating, gold-plated after described oxide layer step:Silicon chip after oxide layer is carried out in special coating bath
It is nickel plating, gold-plated, dry;Chip cutting:The silicon chip after gold-plated is divided into one single chip at mesa trench with laser cutting machine.
Utilize fast recovery diode FRD chips made from above-mentioned production technology, fast recovery diode FRD chip structures
For P+-N-N+Type;The elevation section Rotating fields of fast recovery diode FRD chips are followed successively by erosion grooves, passivation glass, metal level;It hurry up
The section of recovery diode FRD chips cuts Rotating fields structure and is followed successively by erosion grooves, passivation glass, metal level, N+Area, base N,
P+Area.
The beneficial effects of the invention are as follows:1. the fast recovery diode chip production technology of the present invention, using carrying liquid boron
Source (BBr3) deep knot diffuses to form P+The method of knot, the flatness of diffusion junctions is improved, strengthen the homogeneity of breakdown voltage, subtract
Small leakage current, enhance the Surge handling capability of diode;Base width is reduced simultaneously, body pressure drop is reduced, reduces work(
Rate is lost.
2. phosphorus source (POCL is carried using gas3) form N+The method of knot, the consistent base of width can be obtained, is advantageous to
Distribution of the metal platinum in diode body, while ensure that Ohmic contact.
3. using in N+Face corrosion deep trench processes form table top, can improve it is reversely pressure-resistant, while can be from boron face (P+)
Platinum is injected, metal platinum ion is can be uniformly distributed in diode, improves the homogeneity of reverse recovery time, controllability,
It is the switching capability enhancing of diode.
4. forming table top protective layer using glass powder with low melting point electrophoresis, active metal platinum ion is avoided by high fever Cheng Wen
The influence of degree, make reverse recovery time uniform and stable.
5. this fast recovery diode process improving homogeneity of reverse recovery time of diode, improves diode and opens
Close performance, reduce switching loss, while reduce pressure drop, reduce power consumption, enhance diode pressure-resistant stability and can
By property, the life-span of diode is extended.
Brief description of the drawings
Fig. 1 is fast recovery diode FRD chip structure plans.
Fig. 2 is fast recovery diode FRD chip structure profiles.
Fig. 3 is the preparation technology flow chart of fast recovery diode FRD chips.
In figure:1st, erosion grooves, 2, passivation glass, 3, metal level, 4, N+Area, 5, base N, 6, P+Area.
Embodiment
A kind of fast recovery diode FRD chips of the present invention and its manufacture craft are made below by specific embodiment
It is described in further detail.
A kind of production technology of fast recovery diode FRD chips, referring to Fig. 3, it has following steps:
1) pre-treatment is spread:Pass through electronic cleaning agent SC2, deionized water be cleaned by ultrasonic etc. process, to silicon chip surface carry out
Chemical treatment, obtains clean original N-type silicon chip;
2) boron source pre-deposition:Carried to handling clean original N-type silicon chip gas in 1150~1200 DEG C of diffusion furnace
It is passed through liquid boron source (Boron tribromide) and carries out pre-deposition;
3) boron source main diffusion:Deep knot is carried out in 1200~1250 DEG C of diffusion furnaces to the silicon chip after pre-deposition and promotes diffusion, shape
Cheng Shen P+Layer;
4) diffusion post processing:It is cleaned by ultrasonic with hydrofluoric acid dips, deionized water, separates silicon chip, and remove surface oxidation
Layer;
5) the one side back of the body is worn away thin:Diffusion junctions P with diamond dust one side+And expansion area is ground off, final piece thickness is retained in 260
~270 μm;
6) pre-treatment is aoxidized:It is utilized respectively electronic cleaning agent SC2, deionized water silicon chip surface is chemically treated, obtain
To clean silicon chip;
7) aoxidize:By the silicon chip cleaned up, long layer of oxide layer does mask in 1100~1200 DEG C of oxidation furnace, and 1.5
μm -2 μm, stop that phosphorous diffusion source enters P+Face, open channels;
8) photoetching:Gluing, exposure, developing procedure are carried out to the silicon chip after oxidation, form table top figure;
9) one side oxide layer is removed:Silicon chip one side (back of the body flour milling/N is removed using ammonium fluoride etchant, deionized water+Face) oxygen
Change layer;
10) phosphorus source pre-deposition:One side oxide layer removes clean silicon chip gas in 1100~1150 DEG C of diffusion furnace and taken
Band is passed through liquid phosphorus source (POCl3) and carries out pre-deposition;
10) phosphorus diffusion:The silicon chip of phosphorus deposition is diffused to form N in 1200~1250 DEG C of diffusion furnace+;
11) sandblasting:With wet diamond dust it is two-sided to silicon chip carry out it is uniformly roughened;
12) platinum spreads:The silicon chip P after cleaning+Face is uniformly coated with liquid platinum source, is put into the platinum that temperature is 860~910 DEG C
The injection of metal platinum is carried out in diffusion furnace;
13)N+Face mesa etch:Using nitric acid, hydrofluoric acid, glacial acetic acid, according to 5:3.3:1 ratio corrosion N+Face table top ditch
Groove, gash depth reach P by base+Layer, nitration mixture temperature control wash down at -8~-12 DEG C, and with deionized water;
14) electrophoresis:Electrophoresis liquid is configured using glass powder with low melting point, silicon chip is placed in the electrophoresis liquid configured, according to platform
The glass weight that face gash depth need to deposit sets the time, carries out glass electrophoresis;
15) sinter:Silicon chip after electrophoresis is sintered in 650~700 DEG C of sintering furnace;
16) oxide layer:With 10:1 buffered etch liquid soaks, deionized water is cleaned by ultrasonic silicon chip surface after removal sintering
Oxide layer;
17) nickel plating, gold-plated:Silicon chip after oxide layer is carried out in special coating bath to nickel plating, gold-plated, dry;
18) chip cutting:The silicon chip after gold-plated is divided into one single chip at mesa trench with laser cutting machine.
Referring to Fig. 1, Fig. 2, the reverse GPP high-voltage diodes chip structure is P+-N-N+Type;
The elevation section Rotating fields of reverse GPP high-voltage diode cores are followed successively by erosion grooves 1, passivation glass 2, metal level 3;Instead
Rotating fields structure, which is cut, to the section of GPP high-voltage diode cores is followed successively by erosion grooves 1, passivation glass 2, metal level 3, N+Area 4, base
Area N5, P+Area 6.
Parameter after process modification:
500 temperature shock tests can be subjected to
The principle and its effect of the above embodiments only illustrative the invention, and the implementation that part uses
Example, not for the limitation present invention;It should be pointed out that for the person of ordinary skill of the art, wound of the present invention is not being departed from
On the premise of making design, various modifications and improvements can be made, these belong to protection scope of the present invention.
Claims (7)
- A kind of 1. fast recovery diode chip production technology, it is characterised in that:The step of including following order:Boron source pre-deposition:Liquid is passed through to handling the gas carrying in 1150~1200 DEG C of diffusion furnace of clean original N-type silicon chip State boron source carries out pre-deposition;Boron source main diffusion:Deep knot is carried out in 1200~1250 DEG C of diffusion furnaces to the silicon chip after pre-deposition and promotes diffusion, forms deep P + layer;The one side back of the body wears away thin:The diffusion junctions P+ of one side and expansion area are ground off with diamond dust, final piece thickness is retained in 260~270 μ m;Oxidation:By the silicon chip cleaned up, long layer of oxide layer is mask, 1.5 μm~2 μ in 1100~1200 DEG C of oxidation furnace M, stop that phosphorous diffusion source enters P+ faces, open channels;Photoetching:Gluing, exposure, developing procedure are carried out to the silicon chip after oxidation, form table top figure;Remove one side oxide layer:Silicon chip one side oxide layer is removed using ammonium fluoride etchant, deionized water, that is, carries on the back flour milling oxidation Layer;Phosphorus source pre-deposition:One side oxide layer removes the gas carrying in 1100~1150 DEG C of diffusion furnace of clean silicon chip and is passed through liquid State phosphorus source carries out pre-deposition;Phosphorus diffusion:The silicon chip of phosphorus deposition is diffused to form N+ in 1200~1250 DEG C of diffusion furnace;Platinum spreads:Silicon chip P+ faces after cleaning are uniformly coated with liquid platinum source, are put into the platinum diffusion furnace that temperature is 860~910 DEG C The middle injection for carrying out metal platinum;N+ faces mesa etch:Using nitric acid, hydrofluoric acid, glacial acetic acid, corrode N+ faces mesa trench, ditch according to 5: 3.3: 1 ratio Groove depth reaches P+ layers by base, and nitration mixture temperature control washes down at -8~-12 DEG C, and with deionized water;Electrophoresis:Electrophoresis liquid is configured using glass powder with low melting point, silicon chip is placed in the electrophoresis liquid configured, it is deep according to mesa trench The glass weight that spending to deposit sets the time, carries out glass electrophoresis;Sintering:Silicon chip after electrophoresis is sintered in 650~700 DEG C of sintering furnace;Oxide layer:Soaked with 10: 1 buffered etch liquid, deionized water is cleaned by ultrasonic silicon chip surface oxide layer after removal sintering.
- A kind of 2. fast recovery diode chip production technology according to claim 1, it is characterised in that:Described boron source is pre- There is diffusion pre-treatment before deposition step:Process is cleaned by ultrasonic by electronic cleaning agent SC2, deionized water, silicon chip surface is entered Row chemical treatment, obtains clean original N-type silicon chip.
- A kind of 3. fast recovery diode chip production technology according to claim 1, it is characterised in that:Described boron source master There is diffusion post processing after diffusion before step:It is cleaned by ultrasonic with hydrofluoric acid dips, deionized water, separates silicon chip, and remove table Face oxide layer.
- A kind of 4. fast recovery diode chip production technology according to claim 1, it is characterised in that:Described oxidation step There is oxidation pre-treatment before rapid:Be utilized respectively electronic cleaning agent SC2, deionized water is chemically treated to silicon chip surface, obtain Clean silicon chip.
- A kind of 5. fast recovery diode chip production technology according to claim 1, it is characterised in that:Described phosphorus diffusion There is sandblasting after step:With wet diamond dust it is two-sided to silicon chip carry out it is uniformly roughened.
- A kind of 6. fast recovery diode chip production technology according to claim 1, it is characterised in that:Described deoxidation There is nickel plating, gold-plated after layer step:Silicon chip after oxide layer is carried out in special coating bath to nickel plating, gold-plated, dry;Chip is cut Cut:The silicon chip after gold-plated is divided into one single chip at mesa trench with laser cutting machine.
- 7. utilize fast recovery diode FRD chips made from production technology as claimed in claim 1, it is characterised in that:This is fast Recovery diode FRD chip structures are P+-N-N+ types;The elevation section Rotating fields of fast recovery diode FRD chips are followed successively by corrosion Groove, passivation glass, metal level;The section of fast recovery diode FRD chips cuts Rotating fields structure and is followed successively by erosion grooves, is passivated Glass, metal level, N+ areas, base N, P+ areas.
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