CN102315177A - High pressure resistant passivation protection diode chip and processing method thereof - Google Patents
High pressure resistant passivation protection diode chip and processing method thereof Download PDFInfo
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- CN102315177A CN102315177A CN201110308126A CN201110308126A CN102315177A CN 102315177 A CN102315177 A CN 102315177A CN 201110308126 A CN201110308126 A CN 201110308126A CN 201110308126 A CN201110308126 A CN 201110308126A CN 102315177 A CN102315177 A CN 102315177A
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Abstract
A high pressure resistant passivation protection diode chip and a processing method thereof are disclosed. A diode chip possessing a passivation protection structure and a processing method thereof are related. By using the provided high pressure resistant passivation protection diode chip and the processing method thereof, the chip can be reliably protected under the condition of ensuring a packaging temperature; a hidden trouble of packaging can be solved; a production technique is simple. The chip comprises: a sheet-shaped body and a passivation protection layer. A circle of chamfering is arranged on an upper part of the sheet-shaped body. In the invention, all fillers in a groove are solidified; then, a hot pressing die is used to perform pressing and molding is achieved through heating and curing. The prepared product can maintain bottom glass materials. After splintering, the passivation protection layer is ensured to cover a whole cambered surface. A glass layer thickness is large. Therefore, intensity of the passivation protection layer is corresponding large. A buffer protection layer does not need to be arranged out of the passivation protection layer (glass layer). Because the glass in a lowest part of a molded port groove, an ideal fracture surface can be formed during splintering.
Description
Technical field
What the present invention relates to is a kind of diode chip for backlight unit and processing method thereof, relates in particular to a kind of diode chip for backlight unit and processing method thereof with passivation protection structure.
Background technology
Existing GPP [Glassivation passivation parts; Being the abbreviation of Glassivation (vitrifying) passivation (passivation) parts (element) or parts of an apparats (device) phrase] the mesa diode chip cuts scribing because of generally adopting from groove is positive, so cutting blade must directly contact with the interior glass of groove.More priorly be; Glass belongs to a kind of fragile material; The stress that fragile material receives in the sharp-pointed place near the crack is much larger than the mean stress on whole section; To such an extent as to the associative key at most advanced and sophisticated place ruptures easily, and thisly break at expansion gradually in the material, thereby cause latent the splitting of chip passivation protective layer easily and cause reduce or ultimate failure device lifetime.
Existing GPP electrophoresis diode chip for backlight unit is after the chip back surface hemisect; Make the cleavage surface fracture of chip through mechanical sliver along channel bottom silicon; Reduce the stress damage that in the cutting process chip is caused; And the front channel bottom is filled up by glass fully, can play better passivation protection effect to PN junction, makes the chip quality have definitely and guarantees.But the chip surface oxide film protection that the electrophoresis processing procedure is produced, scolding tin flow to the encapsulated device inefficacy that causes on glass easily in road, back welding process.
In addition, chip is in encapsulation, and epoxy resin also need be through overcuring; Be about to softening epoxy resin and become curdled appearance (curing temperature is about 175 ℃); A kind of this stress ratio will be bigger to the intrinsic mechanical stress of diode so epoxy resin will produce, and will be easily that the passivation protection layer extruding of diode chip for backlight unit is broken; Even squeeze broken diode chip for backlight unit, thereby cause component failure.
For this reason; The applicant proposes the application for a patent for invention that a key name is called " a kind of passivation protection diode chip for backlight unit and processing method thereof " at 2011.5.11. to State Intellectual Property Office; Like Fig. 3, shown in 4; It is employed in that the passivation protection layer sets up outward that one deck is heat-resisting, insulation and rubber-like buffer protection layer 6, improves the electric property of product, has obtained effect preferably.But, owing to increased coating processes one, make production technology complicated, controlling level need be increased substantially and just very high rate of finished products can be obtained.And this case is on the basis of existing technology, can't overcome channel bottom 41 place's exposed problems.
Summary of the invention
The object of the present invention is to provide and a kind ofly guaranteeing to protect chip reliably under the package temperature, solve encapsulation hidden danger, and simpler high pressure resistant passivation protection diode chip for backlight unit of manufacture craft and processing method thereof.
Technical scheme of the present invention is: said chip comprises sheet noumenon and passivation protection layer; The top of said sheet noumenon is provided with a circle chamfering; Be the arc of indent at the hypotenuse of the above chamfering of axial cross section, the passivation protection layer covers the arcwall face of said body top edge place and chamfering; At the outer surface of said passivation protection layer silicon dioxide protection rete also.
Processing method of the present invention is a raw material with the wafer of front openings groove; It is characterized in that, then, processing according to the following steps:
1), coating; Evenly be coated with the photoresistance glass that is mixed with sensitizer of emulsion form in wafer surface, guarantee that it infiltrates said groove;
2), soft roasting; The wafer that is coated with photoresistance glass was inserted in the 90-120 ℃ of environment 0.3-0.5 hour, coating is condensed be gelatin;
3), mask; Press groove rule making mask plate on the wafer, respective grooves place printing opacity on the mask plate, remainder resistance light; Mask plate is covered on the wafer;
4), illumination curing; To the wafer that is coated with mask plate advance to condense row exposure, to wafer surface, through the coating curing of illumination, the coating that does not receive illumination still is gelatin with the figure transfer on the mask plate; Immediately, removing still is gelatin coating;
5), sinter coating; Adopt a hot-die, said hot-die is provided with burr, and the groove distribution shape is identical on said burr contour shape and the said wafer, and tubaeform, its top that said burr cross section is inner concave arc surface have wedge grip; Then, the heat hot pressing mold is to 600-800 ℃, the feeding hot-die, and the wedge grip of controlling said hot-die does not contact the bottom surface of groove on the said wafer, keeps 2-4 hour, makes cured coating be sintered in wafer surface securely;
6), scribing: the wafer after the passivation protection is according to the scribing of figure rule;
7), sliver; Make.
The surfaces coated of said hot-die is covered with silica containing solution.
The present invention with respect to existing technology when the mask, solidify all inserts in the groove (in the prior art when preventing sliver the passivation protection layer cracked, must be with the removal of the glass in the middle of the groove); Then, the employing hot-die is suppressed, moulding is heating and curing; Make the glass material that product can keep the bottom; Behind sliver; Guarantee that whole cambered surface is coated with the passivation protection layer, and compared with prior art, glassy layer thickness is bigger; Therefore the intensity of passivation protection layer is corresponding also bigger, thereby need not outside passivation protection layer (glassy layer), the buffer protection layer to be set again.Because the glass of mold pressing oral groove groove lowest part is the thinnest, when sliver, can form the desirable plane of disruption (with the parallel axes of chip).
Description of drawings
The structural representation of Fig. 1 wafer of the present invention,
The structural representation of Fig. 2 chip of the present invention,
Fig. 3 is the structural representation of wafer in the background technology of the present invention,
Fig. 4 is the structural representation of background technology chips of the present invention,
Fig. 5 is a process principle figure one of the present invention,
Fig. 6 is a process principle figure two of the present invention,
Fig. 7 is a process principle figure three of the present invention,
Fig. 8 is a process principle figure four of the present invention;
1 is wafer among the figure, the 2nd, and passivation protection layer, the 21st, photoresistance glass, the 22nd, the photoresistance glass that solidifies after the illumination, the 3rd, geosutures, the 4th, groove, the 41st, channel bottom, the 5th, silicon dioxide protection rete, the 6th, buffer protection layer, the 7th, mask, the 8th, hot-die, the 81st, wedge grip.
Embodiment
Product of the present invention is as shown in Figure 2; Said chip comprises sheet noumenon and passivation protection layer 2; The top of said sheet noumenon is provided with a circle chamfering, is the arc of indent at the hypotenuse of the above chamfering of axial cross section, and passivation protection layer 2 covers the arcwall face of said body top edge places and chamfering; At the outer surface of said passivation protection layer 2 silicon dioxide protection rete 5 also.5 effects of silicon dioxide protection rete are: the welding material when preventing to weld is sticking to bond on passivation protection layer 2 table damage passivation protection layer.
Processing method of the present invention shown in Fig. 1,5-8, is a raw material with the wafer 1 of front openings groove; It is characterized in that, then, processing according to the following steps:
1), coating; Evenly be coated with the photoresistance glass 21 that is mixed with sensitizer of emulsion form on wafer 1 surface, guarantee that it infiltrates in the groove 4 on wafer 1; It is as shown in Figure 5,
2), soft roasting; The wafer that is coated with photoresistance glass 21 1 was inserted in the 90-120 ℃ of environment 0.3-0.5 hour, coating is condensed be gelatin;
3), mask; Press groove rule making mask plate 7 on the wafer 1, respective grooves 4 place's printing opacities on the mask plate 7, remainder resistance light; Mask plate 7 is covered on the wafer 1;
4), illumination curing; To the wafer 1 that is coated with mask plate 7 exposure of condensing, the figure transfer on the mask plate 7 to wafer 1 surface, is formed the photoresistance glass 22 that solidifies after the illumination through the coating curing of illumination, the coating that does not receive illumination is still for gelatin; Immediately, removing still is gelatin coating; (principles of chemistry through developer dissolve the partial coating of not sensitization on apparent photographic fixing machine)
5), sinter coating; Adopt a hot-die 8, said hot-die 8 is provided with burr, and groove 4 distribution shapes are identical on said burr contour shape and the said wafer 1, and tubaeform, its top that said burr cross section is inner concave arc surface have wedge grip 81; Then, 8 to 600-800 ℃ of heat hot pressing molds, feeding hot-die 8, the wedge grip 81 of controlling said hot-die 8 does not contact the bottom surface 41 of groove on the said wafer 1, keeps 2 ~ 4 hours, makes cured coating be sintered in wafer 1 surface securely, as schemes shown in Figure 1;
6), scribing: the wafer 1 after the passivation protection is according to the scribing of figure rule;
7), sliver; Press geosutures 3 division wafers 1, make some chips as shown in Figure 2.
The surfaces coated of said hot-die 8 is covered with silica containing solution; Make the surface of product have silicon dioxide protection rete 5.
Claims (3)
1. high pressure resistant passivation protection diode chip for backlight unit; Said chip comprises sheet noumenon and passivation protection layer; The top of said sheet noumenon is provided with a circle chamfering; Be the arc of indent at the hypotenuse of the above chamfering of axial cross section, it is characterized in that the passivation protection layer covers the arcwall face of said body top edge place and chamfering; At the outer surface of said passivation protection layer silicon dioxide protection rete also.
2. the processing method of the said high pressure resistant passivation protection diode chip for backlight unit of claim 1 is a raw material with the wafer of front openings groove; It is characterized in that, then, processing according to the following steps:
1), coating; Evenly be coated with the photoresistance glass that is mixed with sensitizer of emulsion form in wafer surface, guarantee that it infiltrates said groove;
2), soft roasting; The wafer that is coated with photoresistance glass was inserted in the 90-120 ℃ of environment 0.3-0.5 hour, coating is condensed be gelatin;
3), mask; Press groove rule making mask plate on the wafer, respective grooves place printing opacity on the mask plate, remainder resistance light; Mask plate is covered on the wafer;
4), illumination curing; To the wafer that is coated with mask plate advance to condense row exposure, to wafer surface, through the coating curing of illumination, the coating that does not receive illumination still is gelatin with the figure transfer on the mask plate; Immediately, removing still is gelatin coating;
5), sinter coating; Adopt a hot-die, said hot-die is provided with burr, and the groove distribution shape is identical on said burr contour shape and the said wafer, and tubaeform, its top that said burr cross section is inner concave arc surface have wedge grip; Then, the heat hot pressing mold is to 600-800 ℃, the feeding hot-die, and the wedge grip of controlling said hot-die does not contact the bottom surface of groove on the said wafer, keeps 2-4 hour, makes cured coating be sintered in wafer surface securely;
6), scribing: the wafer after the passivation protection is according to the scribing of figure rule;
7), sliver; Make.
3. the processing method of high pressure resistant passivation protection diode chip for backlight unit according to claim 2 is characterized in that, the surfaces coated of said hot-die is covered with silica containing solution.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110308126 CN102315177B (en) | 2011-10-12 | 2011-10-12 | Processing method of high pressure resistant passivation protection diode chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110308126 CN102315177B (en) | 2011-10-12 | 2011-10-12 | Processing method of high pressure resistant passivation protection diode chip |
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| CN102315177A true CN102315177A (en) | 2012-01-11 |
| CN102315177B CN102315177B (en) | 2013-01-30 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102881587A (en) * | 2012-10-17 | 2013-01-16 | 如皋市大昌电子有限公司 | Novel laminated diode manufacturing process and chip sieve tray thereof |
| CN104201102A (en) * | 2014-08-28 | 2014-12-10 | 苏州启澜功率电子有限公司 | Fast recovery diode FRD chip and production process for same |
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| US4375125A (en) * | 1980-03-07 | 1983-03-01 | U.S. Philips Corporation | Method of passivating pn-junction in a semiconductor device |
| CN101578023A (en) * | 2008-05-09 | 2009-11-11 | 富港电子（东莞）有限公司 | Element protection method of electronic product |
| CN201383498Y (en) * | 2009-03-03 | 2010-01-13 | 百圳君耀电子（深圳）有限公司 | Semiconductor diode chip |
| CN101645399A (en) * | 2009-08-21 | 2010-02-10 | 苏州固锝电子股份有限公司 | Voltage stabilizing diode manufacturing process |
| CN201608200U (en) * | 2009-11-06 | 2010-10-13 | 馨意科技股份有限公司 | Adhesive sealed encloser for light emitting diodes (LEDs) |
| CN201708145U (en) * | 2010-05-11 | 2011-01-12 | 扬州杰利半导体有限公司 | Passivation protected diode chip |
-
2011
- 2011-10-12 CN CN 201110308126 patent/CN102315177B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4375125A (en) * | 1980-03-07 | 1983-03-01 | U.S. Philips Corporation | Method of passivating pn-junction in a semiconductor device |
| CN101578023A (en) * | 2008-05-09 | 2009-11-11 | 富港电子（东莞）有限公司 | Element protection method of electronic product |
| CN201383498Y (en) * | 2009-03-03 | 2010-01-13 | 百圳君耀电子（深圳）有限公司 | Semiconductor diode chip |
| CN101645399A (en) * | 2009-08-21 | 2010-02-10 | 苏州固锝电子股份有限公司 | Voltage stabilizing diode manufacturing process |
| CN201608200U (en) * | 2009-11-06 | 2010-10-13 | 馨意科技股份有限公司 | Adhesive sealed encloser for light emitting diodes (LEDs) |
| CN201708145U (en) * | 2010-05-11 | 2011-01-12 | 扬州杰利半导体有限公司 | Passivation protected diode chip |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102881587A (en) * | 2012-10-17 | 2013-01-16 | 如皋市大昌电子有限公司 | Novel laminated diode manufacturing process and chip sieve tray thereof |
| CN102881587B (en) * | 2012-10-17 | 2015-03-25 | 如皋市大昌电子有限公司 | Laminated diode manufacturing process and chip sieve tray thereof |
| CN104201102A (en) * | 2014-08-28 | 2014-12-10 | 苏州启澜功率电子有限公司 | Fast recovery diode FRD chip and production process for same |
| CN104201102B (en) * | 2014-08-28 | 2017-12-12 | 苏州启澜功率电子有限公司 | A kind of fast recovery diode FRD chips and its manufacture craft |
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| CN102315177B (en) | 2013-01-30 |
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