CN104157678B - 具有高开口率的像素结构及电路 - Google Patents

具有高开口率的像素结构及电路 Download PDF

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CN104157678B
CN104157678B CN201410443931.9A CN201410443931A CN104157678B CN 104157678 B CN104157678 B CN 104157678B CN 201410443931 A CN201410443931 A CN 201410443931A CN 104157678 B CN104157678 B CN 104157678B
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electrode
grid
layer
film transistor
drain
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CN104157678A (zh
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李文辉
罗长诚
曾志远
胡宇彤
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2014/086890 priority patent/WO2016033839A1/zh
Priority to US14/426,987 priority patent/US9704937B2/en
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Abstract

本发明提供一种具有高开口率的像素结构及电路。该具有高开口率的像素结构的第一栅极(21)、第一源/漏极(61)与夹在二者之间的蚀刻阻挡层(5)、第一半导体层(41)与栅极绝缘层(3)构成第一薄膜晶体管(TFT1)；第二栅极(22)、第二源/漏极(62)与夹在二者之间的蚀刻阻挡层(5)、第二半导体层(42)与栅极绝缘层(3)构成第二薄膜晶体管(TFT2)；透明电极(8)、像素电极(10)与夹在二者之间的平坦绝缘层(9)构成一透明电容(C)，且所述透明电容(C)构成该像素结构的有效显示部分，能够显著增加像素的有效显示面积，提高开口率，提高显示亮度，降低功耗。

Description

具有高开口率的像素结构及电路
技术领域
本发明涉及显示技术领域，尤其涉及一种具有高开口率的像素结构及电路。
背景技术
平面显示器件具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。现有的平面显示器件主要包括液晶显示器件(Liquid Crystal Display，LCD)及有机发光二极管显示器件(Organic Light Emitting Display，OLED)。
有机发光二极管显示器件由于同时具备自发光，不需背光源、对比度高、厚度薄、视角广、反应速度快、可用于挠曲性面板、使用温度范围广、构造及制程较简单等优异特性，被认为是下一代平面显示器的新兴应用技术。
OLED显示器件按照驱动类型可分为无源OLED(PM-OLED)和有源OLED(AM-OLED)。AM-OLED的显示面板属于主动显示类型，需要在阵列基板上制作呈阵列式分布的像素结构。如图1所示，现有的AM-OLED的每一像素结构一般为两个薄膜晶体管(Thin FilmTransistor，TFT)之间夹着一个存储电容。具体的，第一薄膜晶体管TFT1’由第一栅极210、第一源/漏极610及夹在两者之间的蚀刻阻挡层500、第一半导体层410与栅极绝缘层300构成；第二薄膜晶体管TFT2’由第二栅极220、第二源/漏极620及夹在两者之间的蚀刻阻挡层500、第二半导体层420与栅极绝缘层300构成；存储电容C’由与第一、第二栅极210、220同时形成的第一金属电极230、与第一、第二源/漏极610、620同时形成的第二金属电极630及夹在两者之间的蚀刻阻挡层500与栅极绝缘层300构成。由于金属材质会遮蔽光，阻碍光透过，因此第一、第二薄膜晶体管TFT1’、TFT2’与存储电容C’必然占用一定的像素面积，造成像素有效显示面积下降，即开口率下降，大大限制了光利用率，特别是对于高分辨率、底部发光的AM-OLED，开口率的下降更为严重，容易造成显示亮度不足，功率消耗过大等问题。
图2为图1的等效电路图，第一薄膜晶体管TFT1’作为信号切换晶体管，第二薄膜晶体管TFT2’作为驱动晶体管。具体的，第一薄膜晶体管TFT1’的栅极连接栅极驱动电压信号Vgate，源极连接数据驱动电压信号Vdata，漏极与第二薄膜晶体管TFT2’的栅极连接；第二薄膜晶体管TFT2’的源极连接驱动电压信号Vdd，漏极连接有机发光二级管D的阳极；有机发光二级管D的阴连极接地信号Vss；存储电容C’的一电极连接第二薄膜晶体管TFT2’的栅极，另一电极连接第二薄膜晶体管TFT2’的源极。
该电路的工作原理是，当栅极驱动电压信号Vgate到来时，第一薄膜晶体管TFT1’导通，数据驱动电压信号Vdata输入第二薄膜晶体管TFT2’的栅极，第二薄膜晶体管TFT2’导通，驱动电压信号Vdd经该第二薄膜晶体管TFT2’放大后驱动有机发光二极管D进行显示。而当栅极驱动电压信号Vgate结束后，存储电容C’是维持像素电极电位的主要手段。
发明内容
本发明的目的在于提供一种具有高开口率的像素结构，能够显著增加像素的有效显示面积，提高开口率，提高显示亮度，降低功耗。
本发明的目的还在于提供一种具有高开口率的像素结构的电路，有利于提高开口率，提升显示效果。
为实现上述目的，本发明首先提供一种具有高开口率的像素结构，具有一基板；于该基板一侧设于其上的第一栅极与第二栅极；设于第一、第二栅极及基板上的栅极绝缘层，该栅极绝缘层完全覆盖第一栅极与基板，而暴露出第二栅极的两端；于第一栅极正上方设于栅极绝缘层上的第一半导体层；于第二栅极正上方设于栅极绝缘层上的第二半导体层；设于第一、第二半导体层与栅极绝缘层上的蚀刻阻挡层；设于第一半导体层与蚀刻阻挡层上的第一源/漏极，设于第二半导体层与蚀刻阻挡层上的第二源/漏极，第一源/漏极搭接第一半导体层及第二栅极的一端，第二源/漏极搭接第二半导体层；设于第一、第二源/漏极及蚀刻阻挡层上的保护层；于基板另一侧设于保护层上的透明电极，该透明电极搭接第二栅极的另一端；设于保护层与透明电极上的平坦绝缘层；设于平坦绝缘层上的像素电极，该像素电极搭接第二源/漏极并与透明电极重叠；设于平坦绝缘层与像素电极上的像素定义层，该像素定义层对应于像素电极与透明电极的重叠区域开口；所述第一栅极、第一源/漏极与夹在二者之间的蚀刻阻挡层、第一半导体层与栅极绝缘层构成第一薄膜晶体管；所述第二栅极、第二源/漏极与夹在二者之间的蚀刻阻挡层、第二半导体层与栅极绝缘层构成第二薄膜晶体管；所述透明电极、像素电极与夹在二者之间的平坦绝缘层构成一透明电容。
所述透明电容构成该像素结构的有效显示部分。
所述透明电极为ITO透明电极或IZO透明电极，所述像素电极为ITO像素电极或IZO像素电极。
该具有高开口率的像素结构还具有设于像素定义层上的光阻间隔物。
该具有高开口率的像素结构还具有于第一栅极正上方设于保护层与平坦绝缘层之间的第一顶栅极，及于第二栅极正上方设于保护层与平坦绝缘层之间的第二顶栅极。
所述第一、第二顶栅极与透明电极在同时形成。
所述第一半导体层为IGZO半导体层，所述第二半导体层为IGZO半导体层。
本发明还提供一种具有高开口率的像素结构的电路，包括一第一薄膜晶体管、一第二薄膜晶体管、一透明电容、及一发光二级管，构成所述透明电容的两电极均为透明电极；第一薄膜晶体管的栅极连接栅极驱动电压信号，源极连接数据驱动电压信号，漏极与第二薄膜晶体管的栅极连接；第二薄膜晶体管的源极连接驱动电压信号，漏极连接有机发光二级管的阳极；有机发光二级管的阴连极接地信号；透明电容的一电极连接第二薄膜晶体管的栅极，另一电极连接第二薄膜晶体管的源极或漏极。
该具有高开口率的像素结构的电路，还包括一不透明电容，该不透明电容的一电极连接第二薄膜晶体管的栅极，另一电极连接第二薄膜晶体管的源极或漏极。
所述第一薄膜晶体管的源极、漏极可互换，所述第二薄膜晶体管的源极、漏极也可互换。
本发明的有益效果：本发明提供的一种具有高开口率的像素结构，通过设置由透明电极与像素电极构成的透明电容，并将该透明电容作为有效显示部分，能够显著增加像素的有效显示面积，提高开口率，提高显示亮度，降低功耗。本发明提供的一种具有高开口率的像素结构的电路，通过设置透明电容，能够提高开口率，提升显示效果。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有的像素结构的剖面示意图；
图2为图1中现有的像素结构的等效电路图；
图3为本发明具有高开口率的像素结构的第一实施例的剖面示意图；
图4为本发明具有高开口率的像素结构的第二实施例的剖面示意图；
图5为本发明具有高开口率的像素结构的电路的第一实施例的示意图；
图6为本发明具有高开口率的像素结构的电路的第二实施例的示意图；
图7为本发明具有高开口率的像素结构的电路的第三实施例的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明首先提供一种具有高开口率的像素结构，图3所示为其第一实施例。该具有高开口率的像素结构具有一基板1，该基板1可为玻璃基板或塑料基板；
于该基板1一侧设于其上的第一栅极21与第二栅极22，所述第一栅极21与第二栅极22由同一第一金属膜层经图案化后形成；
设于第一、第二栅极21、22及基板1上的栅极绝缘层3，该栅极绝缘层3完全覆盖第一栅极21与基板1，而暴露出第二栅极22的两端；
于第一栅极21正上方设于栅极绝缘层3上的第一半导体层41；于第二栅极22正上方设于栅极绝缘层3上的第二半导体层42；所述第一半导体层41与第二半导体层42由同一半导体膜层经图案化后形成；
设于第一、第二半导体层41、42与栅极绝缘层3上的蚀刻阻挡层5；
设于第一半导体层41与蚀刻阻挡层5上的第一源/漏极61；设于第二半导体层42与蚀刻阻挡层5上的第二源/漏极62；所述第一源/漏极61与第二源/漏极62由同一第二金属膜层经图案化后形成；第一源/漏极61搭接第一半导体层41及第二栅极22的一端，第二源/漏极62搭接第二半导体层42；
设于第一、第二源/漏极61、62及蚀刻阻挡层5上的保护层7；
于基板1另一侧设于保护层7上的透明电极8，该透明电极8搭接第二栅极22的另一端；
设于保护层7与透明电极8上的平坦绝缘层9；
设于平坦绝缘层9上的像素电极10，该像素电极10搭接第二源/漏极62并与透明电极8重叠；
设于平坦绝缘层9与像素电极10上的像素定义层11，该像素定义层11对应于像素电极10与透明电极8的重叠区域开口；
还具有设于像素定义层11上的光阻间隔物12。
所述第一栅极21、第一源/漏极61与夹在二者之间的蚀刻阻挡层5、第一半导体层41与栅极绝缘层3构成第一薄膜晶体管TFT1；所述第二栅极22、第二源/漏极62与夹在二者之间的蚀刻阻挡层5、第二半导体层42与栅极绝缘层3构成第二薄膜晶体管TFT2；所述透明电极8、像素电极10与夹在二者之间的平坦绝缘层9构成一透明电容C。
具体的，所述第一半导体层41为铟镓锌氧化物(Indium Gallium Zinc Oxide，IGZO)半导体层，所述第二半导体层42为IGZO半导体层。
所述透明电极8为氧化铟锡(Indium Tin Oxide，ITO)透明电极或氧化铟锌(Indium Zinc Oxide，IZO)透明电极，该透明电极8可制作成不同的形状；所述像素电极10为ITO像素电极或IZO像素电极。
由于所述透明电极8、像素电极10均透明，能够供光线穿过，所述透明电容C构成该像素结构的有效显示部分，能够显著增加像素的有效显示面积，提高开口率，提高显示亮度，降低功耗。
值得一提的是，所述透明电容C可完全取代现有技术中由两金属电极构成的不透明电容，也可部分取代不透明电容，均能达到增加像素的有效显示面积，提高开口率的效果。
请参阅图4，为本发明具有高开口率的像素结构的第二实施例。该第二实施例与第一实施例的区别在于，该具有高开口率的像素结构还具有于第一栅极21正上方设于保护层7与平坦绝缘层9之间的第一顶栅极81，及于第二栅极22正上方设于保护层7与平坦绝缘层9之间的第二顶栅极82。相应的，所述第一薄膜晶体管TFT1与第二薄膜晶体管TFT2均为双栅极结构。为充分利用制程，提高生产效率，所述第一、第二顶栅极81、82与透明电极8在一道制程中同时形成，所述第一、第二顶栅极81、82的材质与透明电极8的材质相同，均为ITO或IZO。其它与第一实施例相同，此处不再赘述。
本发明还提供一种具有高开口率的像素结构的电路，图5为该电路的第一实施例，包括一第一薄膜晶体管TFT1、一第二薄膜晶体管TFT2、一透明电容C、及一发光二级管D，构成所述透明电容C的两电极均为透明电极。
第一薄膜晶体管TFT1的栅极连接栅极驱动电压信号Vgate，源极连接数据驱动电压信号Vdata，漏极与第二薄膜晶体管TFT2的栅极连接；第二薄膜晶体管TFT2的源极连接驱动电压信号Vdd，漏极连接有机发光二级管D的阳极；有机发光二级管D的阴连极接地信号Vss；透明电容C的一电极连接第二薄膜晶体管TFT2的栅极，另一电极连接第二薄膜晶体管TFT2的源极。
所述第一薄膜晶体管TFT1作为信号切换晶体管，第二薄膜晶体管TFT2作为驱动晶体管。该电路的工作过程为：当栅极驱动电压信号Vgate到来时，第一薄膜晶体管TFT1导通，数据驱动电压信号Vdata输入第二薄膜晶体管TFT2的栅极，第二薄膜晶体管TFT2导通，驱动电压信号Vdd经该第二薄膜晶体管TFT2放大后驱动有机发光二极管D进行显示。而当栅极驱动电压信号Vgate结束后，透明电容C用来维持像素电极的电位。
由于该电路中设置了透明电极C，能够提高开口率，提升显示效果。
请参阅图6，为本发明具有高开口率的像素结构的电路的第二实施例，其与第一实施例的区别在于，所述透明电容C的一电极连接第二薄膜晶体管TFT2的栅极，另一电极连接第二薄膜晶体管TFT2的漏极。其它与第一实施例相同，此处不再赘述。
请参阅图7，为本发明具有高开口率的像素结构的电路的第三实施例，其与第一实施例的区别在于，所述透明电容C的一电极连接第二薄膜晶体管TFT2的栅极，另一电极连接第二薄膜晶体管TFT2的漏极，并增设了一不透明电容C”，该不透明电容C”的一电极连接第二薄膜晶体管TFT2的栅极，另一电极连接第二薄膜晶体管TFT2的源极。
所述第一薄膜晶体管TFT1的源极、漏极可互换，所述第二薄膜晶体管TFT2的源极、漏极也可互换，因此在该第三实施例中，还可将所述透明电容C的一电极连接第二薄膜晶体管TFT2的栅极，另一电极连接第二薄膜晶体管TFT2的源极，将不透明电容C”的一电极连接第二薄膜晶体管TFT2的栅极，另一电极连接第二薄膜晶体管TFT2的漏极。其它与第一实施例相同，此处不再赘述。
综上所述，本发明的一种具有高开口率的像素结构，通过设置由透明电极与像素电极构成的透明电容，并将该透明电容作为有效显示部分，能够显著增加像素的有效显示面积，提高开口率，提高显示亮度，降低功耗。本发明提供的一种具有高开口率的像素结构的电路，通过设置透明电容，能够提高开口率，提升显示效果。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种具有高开口率的像素结构，其特征在于，具有一基板(1)；于该基板(1)一侧设于其上的第一栅极(21)与第二栅极(22)；设于第一、第二栅极(21、22)及基板(1)上的栅极绝缘层(3)，该栅极绝缘层(3)完全覆盖第一栅极(21)与基板(1)，而暴露出第二栅极(22)的两端；于第一栅极(21)正上方设于栅极绝缘层(3)上的第一半导体层(41)；于第二栅极(22)正上方设于栅极绝缘层(3)上的第二半导体层(42)；设于第一、第二半导体层(41、42)与栅极绝缘层(3)上的蚀刻阻挡层(5)；设于第一半导体层(41)与蚀刻阻挡层(5)上的第一源/漏极(61)，设于第二半导体层(42)与蚀刻阻挡层(5)上的第二源/漏极(62)，第一源/漏极(61)搭接第一半导体层(41)及第二栅极(22)的一端，第二源/漏极(62)搭接第二半导体层(42)；设于第一、第二源/漏极(61、62)及蚀刻阻挡层(5)上的保护层(7)；于基板(1)另一侧设于保护层(7)上的透明电极(8)，该透明电极(8)搭接第二栅极(22)的另一端；设于保护层(7)与透明电极(8)上的平坦绝缘层(9)；设于平坦绝缘层(9)上的像素电极(10)，该像素电极(10)搭接第二源/漏极(62)并与透明电极(8)重叠；设于平坦绝缘层(9)与像素电极(10)上的像素定义层(11)，该像素定义层(11)对应于像素电极(10)与透明电极(8)的重叠区域开口；
所述第一栅极(21)、第一源/漏极(61)与夹在二者之间的蚀刻阻挡层(5)、第一半导体层(41)与栅极绝缘层(3)构成第一薄膜晶体管(TFT1)；所述第二栅极(22)、第二源/漏极(62)与夹在二者之间的蚀刻阻挡层(5)、第二半导体层(42)与栅极绝缘层(3)构成第二薄膜晶体管(TFT2)；所述透明电极(8)、像素电极(10)与夹在二者之间的平坦绝缘层(9)构成一透明电容(C)。
2.如权利要求1所述的具有高开口率的像素结构，其特征在于，所述透明电容(C)构成该像素结构的有效显示部分。
3.如权利要求1所述的具有高开口率的像素结构，其特征在于，所述透明电极(8)为ITO透明电极或IZO透明电极，所述像素电极(10)为ITO像素电极或IZO像素电极。
4.如权利要求1所述的具有高开口率的像素结构，其特征在于，还具有设于像素定义层(11)上的光阻间隔物(12)。
5.如权利要求1所述的具有高开口率的像素结构，其特征在于，还具有于第一栅极(21)正上方设于保护层(7)与平坦绝缘层(9)之间的第一顶栅极(81)，及于第二栅极(22)正上方设于保护层(7)与平坦绝缘层(9)之间的第二顶栅极(82)。
6.如权利要求5所述的具有高开口率的像素结构，其特征在于，所述第一、第二顶栅极(81、82)与透明电极(8)同时形成。
7.如权利要求1所述的具有高开口率的像素结构，其特征在于，所述第一半导体层(41)为IGZO半导体层，所述第二半导体层(42)为IGZO半导体层。
8.一种如权利要求1-7任一项所述的具有高开口率的像素结构的电路，其特征在于，包括一第一薄膜晶体管(TFT1)、一第二薄膜晶体管(TFT2)、一透明电容(C)、及一发光二极管(D)，构成所述透明电容(C)的两电极均为透明电极；第一薄膜晶体管(TFT1)的栅极连接栅极驱动电压信号(Vgate)，源极连接数据驱动电压信号(Vdata)，漏极与第二薄膜晶体管(TFT2)的栅极连接；第二薄膜晶体管(TFT2)的源极连接驱动电压信号(Vdd)，漏极连接有机发光二极管(D)的阳极；有机发光二极管(D)的阴连极接地信号(Vss)；透明电容(C)的一电极连接第二薄膜晶体管(TFT2)的栅极，另一电极连接第二薄膜晶体管(TFT2)的源极或漏极。
9.如权利要求8所述具有高开口率的像素结构的电路，其特征在于，还包括一不透明电容(C”)，该不透明电容(C”)的一电极连接第二薄膜晶体管(TFT2)的栅极，另一电极连接第二薄膜晶体管(TFT2)的源极或漏极。
10.如权利要求9所述的具有高开口率的像素结构的电路，其特征在于，所述第一薄膜晶体管(TFT1)的源极、漏极可互换，所述第二薄膜晶体管(TFT2)的源极、漏极也可互换。
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CN110752247A (zh) 2019-11-19 2020-02-04 合肥京东方卓印科技有限公司 显示面板及其制备方法
CN112103339A (zh) * 2020-09-03 2020-12-18 Oppo广东移动通信有限公司 薄膜晶体管、像素电路、显示屏、电子设备
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