CN104124221B - 薄型功率器件及其制备方法 - Google Patents

薄型功率器件及其制备方法 Download PDF

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CN104124221B
CN104124221B CN201310143571.6A CN201310143571A CN104124221B CN 104124221 B CN104124221 B CN 104124221B CN 201310143571 A CN201310143571 A CN 201310143571A CN 104124221 B CN104124221 B CN 104124221B
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contact pad
substrate
chip
power device
electrically connected
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CN104124221A (zh
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龚玉平
薛彦迅
鲁明朕
黄平
鲁军
哈姆扎·耶尔马兹
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Alpha and Omega Semiconductor Cayman Ltd
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Abstract

本发明一般涉及一种功率器件，尤其是涉及超薄型的功率器件及其制备方法，包括一基板，和贯穿基板厚度的开口，开口对准第二套接触焊盘中的没有与第一套接触焊盘中任何接触焊盘进行电性连接的一个接触焊盘，一个芯片被安装在开口中的，多个导电结构将芯片正面的多个电极分别相对应的电性连接到第一套接触焊盘中的多个接触焊盘上。

Description

薄型功率器件及其制备方法
技术领域
本发明一般涉及一种功率器件，尤其是涉及超薄型的功率器件及其制备方法。
背景技术
传统上，器件里面的互连技术有打线和金属片连接芯片与引线框架，但是这两种互连方式存在焊线高度和焊片高度的要求，因此这两种方式都不能达到更薄器件的要求。例如图1A所示的功率器件10，MOSFET12粘贴在基座11a上，MOSFET12的栅极通过键合引线13电性连接至一个引脚11b上，源极通过多根键合引线13电性连接到引脚11c上，基座11a、引脚11b、11c均具有一定的厚度，而且键合引线13的线弧也比较高，导致功率器件10难以薄型化。在另一些封装形式中，如图1B所示的功率器件20，没有使用键合引线，取而代之的是金属片23a、23b，MOSFET22的源极通过金属片23b电性连接到引脚21b上，栅极通过金属片23a电性连接引脚21c上，除了，较厚的引脚21b、21c及承载芯片的基座21a导致功率器件20难以薄型化，类似的，还有美国专利申请US2007/114352A1所公开的利用台阶状的金属片导出栅极和源极至引脚。这些公开文献在解决器件薄型化和提高晶片散热效益等方面，均有待进一步改善。
正是基于以上问题的考虑，提出了本申请后续的各种实施方式。
发明内容
在一个实施方式中，本发明提供一种薄型功率器件，包括：一基板，及设置在基板正面的第一套接触焊盘和设置在基板背面的第二套接触焊盘，第一套接触焊盘中的多个接触焊盘分别相对应的与第二套接触焊盘中的一部分接触焊盘电性连接；一贯穿基板厚度的开口，所述开口对准第二套接触焊盘中的没有与第一套接触焊盘中任何接触焊盘进行电性连接的一个接触焊盘，并从开口中暴露出该接触焊盘的局部区域；一嵌入在所述开口中的芯片，所述芯片背面的背部金属层粘附在第二套接触焊盘中的暴露于所述开口中的接触焊盘上；多个导电结构，将芯片正面的多个电极分别相对应的电性连接到第一套接触焊盘中的多个接触焊盘上。
上述的薄型功率器件，在所述开口的位于芯片周边外侧的剩余空间中填充有填充材料；以及所述导电结构为气溶胶，任意一电极与第一套接触焊盘中最靠近它的接触焊盘通过气溶胶进行电性连接，气溶胶涂覆在任意一电极与第一套接触焊盘中最靠近它的接触焊盘之间的基板的上表面、填充材料的上表面、芯片正面的钝化层上。上述的薄型功率器件，还包括一包覆在基板正面的塑封层，并将芯片、填充材料、导电结构包覆在内。
上述的薄型功率器件，所述导电结构为金属片或键合引线或带状的导电带。上述的薄型功率器件，还包括一包覆在基板正面的塑封层，将芯片、导电结构包覆在内，并且塑封层的一部分填充在所述开口的位于芯片周边外侧的剩余空间中。
上述的薄型功率器件，第一套接触焊盘中的每个接触焊盘均与第二套接触焊盘中的一个相对应的接触焊盘形成交叠；第一套接触焊盘中任一接触焊盘和第二套接触焊盘中与其交叠的一个接触焊盘之间的基板中形成有通孔或沟槽，并在通孔或沟槽内形成有导电的互连结构，以使第一套接触焊盘中任一接触焊盘和第二套接触焊盘中与之交叠的接触焊盘形成电性连接。
在一个实施方式中，本发明还提供一种薄型功率器件的制备方法，包括以下步骤：步骤S1、提供一基板，在基板的正面和背面分别设置第一套接触焊盘和第二套接触焊盘，利用埋置在基板内的互连结构，将第一套接触焊盘中的多个接触焊盘相对应的与第二套接触焊盘中的一部分接触焊盘进行电性连接；其中，在基板上形成有一贯穿基板厚度的开口，所述开口对准第二套接触焊盘中的没有与第一套接触焊盘中任何接触焊盘进行电性连接的一个接触焊盘，并在开口中暴露出该接触焊盘的局部区域；步骤S2、将一芯片嵌入或安装在所述开口中，将所述芯片背面的背部金属层粘附在第二套接触焊盘中的暴露于所述开口中的接触焊盘上，其正面朝上；步骤S3、利用多个导电结构，将芯片正面的多个电极分别相对应的电性连接到第一套接触焊盘中的多个接触焊盘上。
上述的方法，在步骤S2之后，包括在开口的位于芯片周边外侧的剩余空间中填充有填充材料的步骤；以及在步骤S3中，使任意一电极与第一套接触焊盘中最靠近它的接触焊盘通过气溶胶的导电结构进行电性连接，气溶胶涂覆在任意一电极与第一套接触焊盘中最靠近它的接触焊盘之间的基板的上表面、填充材料的上表面、芯片正面的钝化层上。
上述的方法，所述导电结构为金属片或带状的导电带或键合引线；在步骤S3中，每个导电结构的一端粘附或键合在一个电极上，另一端粘附或键合在第一套接触焊盘中的最靠近该电极的一个相应的接触焊盘上。
上述的方法，第一套接触焊盘中的每个接触焊盘以与第二套接触焊盘中的一个相应的接触焊盘形成交叠的方式布置；第一套接触焊盘中任一接触焊盘和第二套接触焊盘中与其交叠的一个接触焊盘之间的基板中形成有通孔或沟槽，并在通孔或沟槽内形成有导电的互连结构，以使第一套接触焊盘中任一接触焊盘和第二套接触焊盘中的与之交叠的一个接触焊盘形成电性连接。
附图说明
参考所附附图，以更加充分的描述本发明的实施例。然而，所附附图仅用于说明和阐述，并不构成对本发明范围的限制。
图1A～1B是背景技术涉及到的功率器件。
图2A～2B分别是基板的正面、背面俯视图。
图2C是在基板沿图2A中虚线AA的竖截面示意图。
图2D是互连结构容纳在通孔中的一种实施方式。
图3是MOSFET晶片的结构示意图。
图4A～4E是功率器件的制备流程图。
图5A～5B是导电结构为键合引线的实施方式。
图5C是导电结构为金属片的实施方式。
具体实施方式
如图2A～2B，基板100通常是绝缘基板，从图2A中观察，在基板100的正面布置有第一套接触焊盘，如一个接触焊盘101a、数个接触焊盘101b等。从图2B中观察，在基板100的背面布置有第二套接触焊盘，如一个接触焊盘101'a、数个接触焊盘101'b等，第二套接触焊盘还至少包括一个接触焊盘101c。在基板100的较中心位置，开设有一个贯穿基板100的开口110，开口110一般为方形，开口110对准第二套接触焊盘中的接触焊盘101c并从开口110中暴露出该接触焊盘101c的局部区域，为了详细描述基板100的结构，图2C展示了图2A中沿着虚线A～A的剖面图。第一套接触焊盘中的接触焊盘101a、101b分别相对应的与第二套接触焊盘中的一部分数量的接触焊盘101'a、101'b进行电性连接，例如接触焊盘101a通过埋设于基板100内的互连结构（未示出）电性连接到接触焊盘101'a，一个接触焊盘101b通过埋设于基板100内的互连结构105相对应的电性连接到一个接触焊盘101'b，值得注意的是，单独留下接触焊盘101c不与第一套接触焊盘中的任何接触焊盘进行电性连接。较佳的，铜材质的第一、第二套接触焊盘中的每个接触焊盘的表面均镀有Ni/Au，而且基板100的表面往往还覆盖有焊接掩膜（Solder mask），但未覆盖第一、第二套接触焊盘。在一些实施方式中，开口110并非必须设置在基板100的中心位置，例如可以位于其任意一角落处，或者靠近其任意一条边缘并位于该边缘两端的对称中心附近。而且只要开口110能够容纳得下芯片115，其形状也不仅仅限制于方形，例如圆形、椭圆形、三角形或其他任意多边形等。
在一些可选实施方式中，第一套接触焊盘中的每个接触焊盘皆与第二套接触焊盘中的一个相应的接触焊盘形成交叠，譬如，接触焊盘101a与接触焊盘101'a形成交叠，以及一个接触焊盘101b与相应的一个接触焊盘101'b形成交叠，但是无需考虑接触焊盘101c是否与第一套接触焊盘中的任何接触焊盘形成交叠的情况。如图2C，基板100在夹在接触焊盘101b和与该接触焊盘101b形成交叠的接触焊盘101'b之间的部分中形成有沟槽104，互连结构105就位于贯穿基板100的条状沟槽104内。作为优选，通常在沟槽104的侧壁上覆盖有金属材质的衬垫层105a（例如铜等），例如以电镀的方式所形成的，以及在沟槽104内填充有导电材料105b（例如钨、焊锡膏等），互连结构105包括了衬垫层105a和导电材料105b。在另一些可选实施方式中，如图2D，刻意揭去了接触焊盘101b，沟槽104被通孔104'取代，基板100在接触焊盘101b和与接触焊盘101b形成交叠的接触焊盘101'b之间的部分中形成有相互间隔开的多个通孔104'，通孔104'贯穿基板100，并且通孔104'的侧壁上覆盖有衬垫层105'a，以及在通孔104'内填充有导电材料105'b，互连结构105'包括了衬垫层105'a和导电材料105'b。典型的，通孔104'的横截面可以是圆形、椭圆形、三角形或任意多边形等形状。同样，在基板100的夹在接触焊盘101a和与接触焊盘101a形成交叠的接触焊盘101'a之间的部分中亦形成有未示意出的沟槽或通孔，电性连接该接触焊盘101a和与接触焊盘101a形成交叠的接触焊盘101'a的互连结构就位于沟槽或通孔中。
图3是芯片115的结构示意图，为垂直式的功率MOSFET，在其正面设置有栅极电极115a、源极电极115b，其背面覆盖有未示意出的背部金属层（如Ti/Ni/Ag）作为漏极电极，本领域的技术人员都知道，芯片115的正面还往往覆盖有起到物理保护作用的钝化层（未标注），将栅极电极115a、源极电极115b从钝化层中露出但同时将它们进行隔离和绝缘。
如图4A～4B，在接触焊盘101c暴露于开口110的区域上涂覆导电的粘合材料116，如焊锡膏或导电银浆等，将芯片115以嵌入在开口110中的方式安装在接触焊盘101c暴露于开口110的区域上，通常接触焊盘101c的尺寸大于开口110的尺寸，而开口110的尺寸略大于芯片115的尺寸，通常会在芯片115的周边和基板100由于开设开口110而形成的内侧边缘之间留有缝隙。在图4C中，在开口110位于芯片115周边外侧的剩余空间中填充一种非导电的填充材料（Underfill）117，固化前的填充材料117具有良好的流动性，能完全占据开口110的剩余空间。在图4D中，在电极115a和最靠近它的接触焊盘101a之间的基板100的上表面、填充材料117的上表面、芯片115正面的钝化层上涂覆有一条带状的气溶胶（Aerosol Jet）118a作为导电结构，气溶胶118a被从喷嘴喷出的时候略显雾状但立即聚拢并随后固化形成可以导电的胶带状结构，其大致厚度为6～15um，优选10um。同样，电极115b和最靠近它的两个接触焊盘101b之间的基板100的上表面、填充材料117的上表面、芯片115正面的钝化层上分别涂覆有两条带状的气溶胶118b、118c作为导电结构，因为源极电极115b常常有较大值的电流通过，所以源极电极115b被两条宽度较宽（相对较窄的气溶胶118a而言）的气溶胶118b、118c电性连接到两个不同的接触焊盘101b上。在气溶胶118a～118c的涂覆工艺制程中，若是填充材料117不足而导致其上表面向下凹陷，则雾状的气溶胶在自身重力作用下容易发生坍塌，体现在填充材料117与基板100的内侧边缘的交界处或者填充材料117与芯片115的周边的交界处使气溶胶趋向于变薄甚至断开。若是填充材料117的注入量过多，填充材料117的上表面会形成一个拱形顶部，气溶胶容易自该顶部向顶部两侧滑落而使得气溶胶在该处变薄甚至断开。气溶胶的涂覆厚度越薄，这些困境就显得越严重，所以控制好填充材料117的量尤为重要。较佳的，填充材料117的厚度与基板100、芯片115各自的厚度大体相同，以保障它们的上表面大致上是共面的。然后，如图4E，利用环氧树脂类的塑封材料形成一个塑封层150覆盖在基板100的正面，同时将气溶胶118a～118c和芯片115以及填充材料117予以包覆。
图5A是另一种实施方式，导电结构的类型发生了改变，气溶胶118a～118c被若干条键合引线119取代，一些键合引线119将电极115a电性连接到接触焊盘101a（可定义为内部栅极接触焊盘）上，另一些键合引线119将电极115b电性连接到数个接触焊盘101b（可定义为内部源极接触焊盘）上，因为键合引线119的中间段在引线键合工艺中会形成具一定高度的弧线段，所以无需填充材料117的物理支撑作用，这与气溶胶不同，此时填充材料117可有可无，分别如图5A～5B。当有填充材料117时，塑封层150将芯片115和键合引线119、填充材料117予以包覆。当没有填充材料117时，塑封层150除了将键合引线119和芯片115包覆在内之外，塑封层150的一部分还填充在开口110位于芯片115周边外侧的剩余空间中。
图5C与图5A～5B的区别仅仅在于，键合引线119被金属片119a～119c这种类型的导电结构取代。金属片119a～119c为桥式结构，包括一个处于中间位置的主平板部分和主平板部分两侧的两个副平板部分，主平板和副平板之间具有高度落差，前者具有相对较高的位置。通过导电的粘合材料，金属片119a的两个副平板部分分别粘附在电极115a和靠近电极115a的接触焊盘101a上，金属片119b的两个副平板部分分别粘附在电极115b和一个靠近电极115b的接触焊盘101b上，金属片119c的两个副平板部分分别粘附在电极115b和另一个靠近电极115b的接触焊盘101b上。此实施方式中，填充材料117也可有可无，当有填充材料117时，塑封层150还将芯片115、金属片119a～119c和填充材料117予以包覆。当没有填充材料117时，塑封层150除了将金属片119a～119c和芯片115包覆之外，塑封层150的一部分还填充在开口110位于芯片115周边外侧的剩余空间中。
接触焊盘101'a可定义为外部栅极接触焊盘，接触焊盘101'b可定义为外部源极接触焊盘，接触焊盘101c可定义为外部漏极接触焊盘，它们通过焊锡膏类的导电粘合材料可以直接与PCB上的焊盘进行对接焊接。
键合引线119、金属片119a～119c代替气溶胶118a～118c，会使得塑封层150的厚度略有增加，但是基板100的厚度却可以做的很薄，而且芯片115是容纳在开口110中，而不是直接粘贴在基板100的正面，所以相对背景技术图1A～1B而言，器件最终的整体厚度的缩减程度，大致等于芯片115自身厚度值。
对于本领域的技术人员而言，阅读上述说明后，各种变化和修正无疑将显而易见。因此，所附的权利要求书应看作是涵盖本发明的真实意图和范围的全部变化和修正。在权利要求书范围内任何和所有等价的范围与内容，都应认为仍属本发明的意图和范围内。

Claims (10)

1.一种薄型功率器件，其特征在于，包括：
一基板，及设置在基板正面的第一套接触焊盘和设置在基板背面的第二套接触焊盘，第一套接触焊盘中的多个接触焊盘分别相对应的与第二套接触焊盘中的一部分接触焊盘电性连接；
一贯穿基板厚度的开口，所述开口对准第二套接触焊盘中的没有与第一套接触焊盘中任何接触焊盘进行电性连接的一个接触焊盘，并从开口中暴露出该接触焊盘的局部区域，该接触焊盘的尺寸大于所述开口的尺寸；
一嵌入在所述开口中的芯片，所述芯片背面的背部金属层粘附在第二套接触焊盘中的暴露于所述开口中的接触焊盘上；
多个导电结构，将芯片正面的多个电极分别相对应的电性连接到第一套接触焊盘中的多个接触焊盘上。
2.如权利要求1所述的薄型功率器件，其特征在于，在所述开口的位于芯片周边外侧的剩余空间中填充有填充材料；以及
所述导电结构为气溶胶，任意一电极与第一套接触焊盘中最靠近它的接触焊盘通过气溶胶进行电性连接，气溶胶涂覆在任意一电极与第一套接触焊盘中最靠近它的接触焊盘之间的基板的上表面、填充材料的上表面、芯片正面的钝化层上。
3.如权利要求2所述的薄型功率器件，其特征在于，还包括一包覆在基板正面的塑封层，并将芯片、填充材料、导电结构包覆在内。
4.如权利要求1所述的薄型功率器件，其特征在于，所述导电结构为金属片或键合引线或带状的导电带。
5.如权利要求4所述的薄型功率器件，其特征在于，还包括一包覆在基板正面的塑封层，将芯片、导电结构包覆在内，并且塑封层的一部分填充在所述开口的位于芯片周边外侧的剩余空间中。
6.如权利要求1所述的薄型功率器件，其特征在于，第一套接触焊盘中任一接触焊盘和第二套接触焊盘中与其交叠的一个接触焊盘之间的基板中形成有通孔或沟槽，并在通孔或沟槽内形成有导电的互连结构，以使第一套接触焊盘中任一接触焊盘和第二套接触焊盘中与之交叠的接触焊盘形成电性连接。
7.一种薄型功率器件的制备方法，其特征在于，包括以下步骤：
步骤S1、提供一基板，在基板的正面和背面分别设置第一套接触焊盘和第二套接触焊盘，利用埋置在基板内的互连结构，将第一套接触焊盘中的多个接触焊盘相对应的与第二套接触焊盘中的一部分接触焊盘进行电性连接；
其中，在基板上形成有一贯穿基板厚度的开口，所述开口对准第二套接触焊盘中的没有与第一套接触焊盘中任何接触焊盘进行电性连接的一个接触焊盘，并在开口中暴露出该接触焊盘的局部区域；
步骤S2、将一芯片嵌入在所述开口中，将所述芯片背面的背部金属层粘附在第二套接触焊盘中的暴露于所述开口中的接触焊盘上；
步骤S3、利用多个导电结构，将芯片正面的多个电极分别相对应的电性连接到第一套接触焊盘中的多个接触焊盘上。
8.如权利要求7所述的薄型功率器件的制备方法，其特征在于，在步骤S2之后，还包括在所述开口的位于芯片周边外侧的剩余空间中填充有填充材料的步骤；
以及在步骤S3中，使任意一电极与第一套接触焊盘中最靠近它的接触焊盘通过气溶胶的导电结构进行电性连接，气溶胶涂覆在任意一电极与第一套接触焊盘中最靠近它的接触焊盘之间的基板的上表面、填充材料的上表面、芯片正面的钝化层上。
9.如权利要求7所述的薄型功率器件的制备方法，其特征在于，所述导电结构为金属片或带状的导电带或键合引线；
在步骤S3中，每个导电结构的两端分别粘附或键合在一个电极上和第一套接触焊盘中的最靠近该电极的一个相应的接触焊盘上。
10.如权利要求7所述的薄型功率器件的制备方法，其特征在于，第一套接触焊盘中任一接触焊盘和第二套接触焊盘中与其交叠的一个接触焊盘之间的基板中形成有通孔或沟槽，并在通孔或沟槽内形成有导电的互连结构，以使第一套接触焊盘中任一接触焊盘和第二套接触焊盘中的与之交叠的一个接触焊盘形成电性连接。
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