CN103988309A - 用于减小的晶体管漏泄电流的栅极倒圆 - Google Patents

用于减小的晶体管漏泄电流的栅极倒圆 Download PDF

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Publication number
CN103988309A
CN103988309A CN201180075432.3A CN201180075432A CN103988309A CN 103988309 A CN103988309 A CN 103988309A CN 201180075432 A CN201180075432 A CN 201180075432A CN 103988309 A CN103988309 A CN 103988309A
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CN
China
Prior art keywords
gate
tip
region
tips
main
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201180075432.3A
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English (en)
Chinese (zh)
Inventor
蔡燕飞
李骥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
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Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN103988309A publication Critical patent/CN103988309A/zh
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
CN201180075432.3A 2011-12-14 2011-12-14 用于减小的晶体管漏泄电流的栅极倒圆 Pending CN103988309A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2011/083934 WO2013086693A1 (en) 2011-12-14 2011-12-14 Gate rounding for reduced transistor leakage current

Publications (1)

Publication Number Publication Date
CN103988309A true CN103988309A (zh) 2014-08-13

Family

ID=48611805

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180075432.3A Pending CN103988309A (zh) 2011-12-14 2011-12-14 用于减小的晶体管漏泄电流的栅极倒圆

Country Status (7)

Country Link
US (1) US9153659B2 (https=)
EP (1) EP2791974A4 (https=)
JP (1) JP2015505160A (https=)
KR (1) KR101858545B1 (https=)
CN (1) CN103988309A (https=)
IN (1) IN2014CN03984A (https=)
WO (1) WO2013086693A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109768083A (zh) * 2017-11-09 2019-05-17 南亚科技股份有限公司 晶体管元件及半导体布局结构
CN113614903A (zh) * 2019-02-13 2021-11-05 美光科技公司 栅极电极布局

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IN2014CN03984A (https=) 2011-12-14 2015-10-23 Qualcomm Inc
US10417369B2 (en) 2017-05-26 2019-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device, corresponding mask and method for generating layout of same
CN114695532B (zh) * 2020-12-29 2025-10-31 苏州能讯高能半导体有限公司 一种半导体器件及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5874754A (en) * 1993-07-01 1999-02-23 Lsi Logic Corporation Microelectronic cells with bent gates and compressed minimum spacings, and method of patterning interconnections for the gates
US6876042B1 (en) * 2003-09-03 2005-04-05 Advanced Micro Devices, Inc. Additional gate control for a double-gate MOSFET
US20060097294A1 (en) * 2004-11-10 2006-05-11 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
US20060113533A1 (en) * 2004-11-30 2006-06-01 Yasuhiro Tamaki Semiconductor device and layout design method for the same
CN102124548A (zh) * 2008-08-19 2011-07-13 飞思卡尔半导体公司 具有增益变化补偿的晶体管

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US5973376A (en) * 1994-11-02 1999-10-26 Lsi Logic Corporation Architecture having diamond shaped or parallelogram shaped cells
US5742086A (en) * 1994-11-02 1998-04-21 Lsi Logic Corporation Hexagonal DRAM array
US7008832B1 (en) * 2000-07-20 2006-03-07 Advanced Micro Devices, Inc. Damascene process for a T-shaped gate electrode
FR2822293B1 (fr) 2001-03-13 2007-03-23 Nat Inst Of Advanced Ind Scien Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier
US6974998B1 (en) * 2001-09-19 2005-12-13 Altera Corporation Field effect transistor with corner diffusions for reduced leakage
CN1310337C (zh) 2003-01-08 2007-04-11 台湾积体电路制造股份有限公司 隧道偏压金属氧化物半导体晶体管
JP4575274B2 (ja) * 2005-10-31 2010-11-04 富士通セミコンダクター株式会社 パターンレイアウト、レイアウトデータの生成方法及び半導体装置
US7595523B2 (en) * 2007-02-16 2009-09-29 Power Integrations, Inc. Gate pullback at ends of high-voltage vertical transistor structure
JP2011129550A (ja) * 2009-12-15 2011-06-30 Renesas Electronics Corp 半導体集積回路装置
US8283221B2 (en) * 2010-01-25 2012-10-09 Ishiang Shih Configuration and manufacturing method of low-resistance gate structures for semiconductor devices and circuits
CN102184955B (zh) * 2011-04-07 2012-12-19 清华大学 互补隧道穿透场效应晶体管及其形成方法
US9065749B2 (en) 2011-11-21 2015-06-23 Qualcomm Incorporated Hybrid networking path selection and load balancing
IN2014CN03984A (https=) 2011-12-14 2015-10-23 Qualcomm Inc

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5874754A (en) * 1993-07-01 1999-02-23 Lsi Logic Corporation Microelectronic cells with bent gates and compressed minimum spacings, and method of patterning interconnections for the gates
US6876042B1 (en) * 2003-09-03 2005-04-05 Advanced Micro Devices, Inc. Additional gate control for a double-gate MOSFET
US20060097294A1 (en) * 2004-11-10 2006-05-11 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
US20060113533A1 (en) * 2004-11-30 2006-06-01 Yasuhiro Tamaki Semiconductor device and layout design method for the same
CN102124548A (zh) * 2008-08-19 2011-07-13 飞思卡尔半导体公司 具有增益变化补偿的晶体管

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109768083A (zh) * 2017-11-09 2019-05-17 南亚科技股份有限公司 晶体管元件及半导体布局结构
CN109768083B (zh) * 2017-11-09 2022-06-03 南亚科技股份有限公司 晶体管元件及半导体布局结构
CN113614903A (zh) * 2019-02-13 2021-11-05 美光科技公司 栅极电极布局

Also Published As

Publication number Publication date
JP2015505160A (ja) 2015-02-16
EP2791974A4 (en) 2015-08-05
KR101858545B1 (ko) 2018-05-17
US20140346606A1 (en) 2014-11-27
US9153659B2 (en) 2015-10-06
WO2013086693A1 (en) 2013-06-20
KR20140105007A (ko) 2014-08-29
IN2014CN03984A (https=) 2015-10-23
EP2791974A1 (en) 2014-10-22

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