CN103811430B - 层叠封装结构及其形成方法 - Google Patents

层叠封装结构及其形成方法 Download PDF

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CN103811430B
CN103811430B CN201310250366.XA CN201310250366A CN103811430B CN 103811430 B CN103811430 B CN 103811430B CN 201310250366 A CN201310250366 A CN 201310250366A CN 103811430 B CN103811430 B CN 103811430B
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package
group
substrate
die
conducting element
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CN103811430A (zh
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陈孟泽
黄贵伟
蔡再宗
洪艾蒂
郑明达
刘重希
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种半导体器件包括第一封装元件和第二封装元件。第一封装元件具有形成在第一衬底上的第一管芯。第二封装元件具有在形成第二衬底上的第二管芯。热隔离材料附接至第一管芯，其中，热隔离材料使第二管芯与第一管芯热绝缘，并且热隔离材料的热导率在约0.024W/mK至约0.2W/mK的范围内。第一组导电元件将第一封装元件耦合至第二封装元件。本发明还提出了叠封装件及其形成方法。

Description

层叠封装结构及其形成方法
技术领域
本发明一般地涉及半导体技术领域，更具体地，涉及层叠封装件及其形成方法。
背景技术
层叠封装件(POP)由于其允许更高密度的电子器件而成为越来越受欢迎的集成电路封装技术。
传统的层叠封装结构可以包括底部封装元件和顶部封装元件。底部封装元件可以包括附接至底部衬底的底部管芯，而顶部封装元件可以包括附接至顶部衬底的顶部管芯。通常通过诸如焊球的导电元件组将底部封装元件耦合至顶部封装元件。在运行中，两个封装元件都产生热量。然而由底部管芯产生的多余热量会损害顶部管芯，尤其是在底部管芯为器件管芯的情况下。热量也可能导致层叠封装结构中的热应力和翘曲从而导致焊球破裂。即使在层叠封装结构中使用模塑料，也不能完全消除多余热量和翘曲的问题。
发明内容
为了解决现有技术中所存在的缺陷，根据本发明的一方面，提供了一种半导体器件，包括：第一封装元件，具有形成在第一衬底上的第一管芯；第二封装元件，具有形成在第二衬底上的第二管芯；第一组导电元件，将所述第一封装元件耦合至所述第二封装元件；以及热隔离材料，处于所述第一封装元件和所述第二封装元件之间。
该半导体器件还包括：第二组导电元件，将所述第一管芯耦合至所述第一衬底；以及第三组导电元件，将所述第二管芯耦合至所述第二衬底。
在该半导体器件中，所述第三组导电元件包括接合引线。
该半导体器件还包括模塑料，所述模塑料模制在所述第一衬底上并环绕所述第一管芯、所述第一组导电元件和所述第二组导电元件，并且所述模塑料还模制在所述第二衬底上并环绕所述第二管芯和所述第三组导电元件。
在该半导体器件中，所述第一管芯是逻辑芯片。
在该半导体器件中，所述第二管芯是存储芯片。
在该半导体器件中，所述热隔离材料是其中具有空气或真空的密封环。
在该半导体器件中，所述热隔离材料包括选自由蜡、管芯附接膜(DAF)、气凝胶、胶带、热界面材料(TIM)和粘合剂所组成的组的材料。
在该半导体器件中，所述热隔离材料的厚度在约10微米至约100微米的范围内。
在该半导体器件中，所述热隔离材料是具有约0.024W/mK至约0.2W/mK的热导率的材料。
根据本发明的另一方面，提供了一种层叠封装件，包括：底部封装元件，具有形成在底部衬底上的至少一个底部管芯；顶部封装元件，具有形成在顶部衬底上的至少一个顶部管芯；热隔离材料，附接至所述底部管芯，其中，所述热隔离材料的热导率在约0.024W/mK至约0.2W/mK的范围内；以及第一组导电元件，将所述底部衬底耦合至所述顶部衬底。
该层叠封装件还包括：第二组导电元件，将所述至少一个底部管芯耦合至所述底部衬底；以及第三组导电元件，将所述至少一个顶部管芯耦合至所述顶部衬底。
该层叠封装件还包括模塑料，所述模塑料模制在所述底部衬底上并环绕所述底部管芯、所述第一组导电元件和所述第二组导电元件，并且所述模塑料还模制在所述顶部衬底上并环绕所述顶部管芯和所述第三组导电元件。
在该层叠封装件中，所述热隔离材料是其中具有空气或真空的密封环。
在该层叠封装件中，所述热隔离材料包括选自由蜡、管芯附接膜(DAF)、气凝胶、胶带、热界面材料(TIM)和粘合剂所组成的组的材料。
在该层叠封装件中，所述热隔离材料的厚度在约10微米至约100微米的范围内。
该层叠封装件还包括环绕第二组导电元件和第三组导电元件的底部填充物。
根据本发明的又一方面，提供了一种形成封装件的方法，包括提供第一封装元件，所述第一封装元件具有形成在第一衬底上的第一管芯；提供第二封装元件，所述第二封装元件具有形成在第二衬底上的第二管芯；将热隔离材料附接至所述第一管芯，所述热隔离材料基本使所述第二管芯与所述第一管芯热绝缘；以及通过第一组导电元件将所述第一封装元件耦合至所述第二封装元件。
该方法还包括：通过第二组导电元件将所述第一管芯耦合至所述第一衬底；以及通过第三组导电元件将所述第二管芯耦合至所述第二衬底。
该方法还包括：在所述第一封装元件和所述第二封装元件上方形成模塑料。
附图说明
当结合附图进行阅读时，根据下面详细的描述可以更好地理解本发明。应该强调的是，根据工业中的标准实践，各种部件没有按比例绘制。实际上，为了清楚讨论起见，各种部件的尺寸可以被任意增大或缩小。
图1是根据本发明的各个实施例的制造层叠封装结构的方法的流程图。
图2至图6是根据本发明的各个实施例的处于制造层叠封装结构的各个中间阶段的顶部封装件和/或底部封装件的截面图。
具体实施方式
在以下描述中，阐述了许多特定的细节以提供本发明的实施例的完全理解。然而，本领域的普通技术人员应意识到没有这些特定的细节也可实施本发明的实施例。在一些实例中，没有详细描述公知的结构和工艺从而避免了本发明的不必要的模糊的实施例。
整个本说明书中引用“一个实施例”或“某个实施例”意味着本发明的至少一个实施例包括关于所述实施例而描述的特定部件、结构或特征。因此在本说明书的各个位置出现的短语“在一个实施中”或“在某个实施例中”不一定都指同一个实施例。而且，在一个或多个实施例中可以以任何合适的方式组合特定部件、结构或特征。应理解，以下附图没有按比例绘制；而这些附图只是为了阐明。
图1是根据本发明的各个方面制造层叠封装件的方法100的流程图。参考图1，方法包括框110，其中，提供了第一封装元件，该第一封装元件具有形成在第一衬底上的第一管芯。方法100包括框120，其中，提供第二封装元件，该第二封装元件具有形成在第二衬底上的第二管芯。方法100包括框130，其中，热隔离材料附接至第一管芯。该热隔离材料使第二管芯与第一管芯基本上热绝缘。方法100包括框140，其中，第一封装元件通过导电元件组与第二封装元件耦合。
应该理解，可以在图1所示的框110至140之前、期间或之后实施其他工艺以完成层叠封装结构的制造，但是为了简明，本文不详细讨论这些其他工艺。
图2至图6是根据图1的方法100的实施例处于制造层叠封装结构的各个制造阶段的顶部封装件和/或底部封装件的示意性部分截面侧视图。应该理解，为了更好地理解本发明的发明构思已经简化了图2至图6。应该认识到，本文描述的材料、几何形状、尺寸、结构和工艺参数仅仅是示例性的，并不意图和不应该被解释为限制本文要求保护的发明。许多选择和改变对于知晓本发明的本领域的那些技术人员来说是显而易见的。
将参考图2至图6讨论层叠封装结构的实施例。图2示出在层叠封装结构中使用的顶部封装件1。可以利用塑料球栅阵列(PBGA)封装件组装工艺等形成顶部封装件1，该顶部封装件1包括多个堆叠管芯2，该多个堆叠管芯2可以通过接触件16(位于相应的堆叠管芯2上)、接合引线6和接触件12(位于顶部衬底10上)引线接合至顶部衬底10。独立堆叠管芯可以包括存储芯片、逻辑芯片、处理器芯片等。尽管图2示出三个堆叠管芯，但这仅是为了说明。同样地，引线接合的使用仅仅是示例性的，而且电连接堆叠管芯的其他方法在本发明的预期范围内。例如，也可以预期使用焊料凸块、焊球、铜柱、导电凸块、焊料保护件(soldercap)、导电柱、导电球、凸块底部金属化层和/或其他连接元件以将堆叠管芯2连接至顶部衬底10。在一些实施例中，底部填充物(未示出)分配在堆叠管芯2和顶部衬底10之间的间隙中，从而加强层叠封装结构的强度。
顶部衬底10可以是由非导电聚合物层(诸如双马来酰亚胺三嗪(BT))和图案化的(或非图案化的)导电层的交替层所组成的层压电路板。如上所述，顶部衬底10具有位于第一面(为了方便，有时在本文中称为顶面)上的用于电连接至堆叠管芯2的接触件12。顶部衬底10还具有位于第二面(为了方便，有时在本文中称为底面)上的用于电连接至以下将要详述的其他元件的底部接触件24。焊球36附接至衬底10的底部接触件24。焊球36允许顶部封装件1和底部封装件34(在图2中未示出，但在图3和图4中示出)之间的电连接和/或热连接。在所示的实施例中，焊球36为堆叠管芯2提供信号和功率的电传导。此外，可以使用诸如导电凸块、导电球、导电柱等的其他连接元件代替焊球36。
在一些实施例中，对顶部封装件1施加模塑料35从而提供机械刚度和提高层叠封装结构的机械强度。应该相信，该机械刚度防止或至少降低例如由所得到的封装件的元件之间的热膨胀失配而导致的翘曲的严重程度。可以使用例如压塑成型或转印成型在衬底10上模制模塑料35并使模塑料35环绕堆叠管芯2和接合引线6。然后，可以实施固化步骤以使模塑料35凝固。模塑料35可以包括基于聚合物的材料、底部填充物、模制底部填充物(MUF)、环氧树脂等。
如图5所示，顶部封装件1通过焊球36附接至底部封装件34。如图3所示，底部封装件34包括管芯37，管芯37是附接至底部衬底38的倒装芯片，并且管芯37通过连接元件39电连接至底部衬底38。管芯37可以包括逻辑芯片、处理器芯片、存储芯片等。例如，连接元件39可以包括焊料凸块、焊球、铜柱、导电凸块、焊料保护件、导电柱、导电球和凸块底部金属化层。在一些实施例中，底部填充物(未示出)分配在管芯37和底部衬底38之间的间隙中从而加强层叠封装结构的强度。通过与底部衬底38一面上的连接元件39和底部衬底38的另一面上的连接元件42对准的通孔(未示出)来提供管芯37和下面的主板或其他电路(未示出)之间的电连接。同样地，通过焊球36、通孔和连接元件42来提供顶部衬底10和下面的主板或其他电路的电连接。
在运行中，分别包括管芯37和堆叠管芯2的底部封装件34和顶部封装件1都产生热量。管芯37(尤其是在底部管芯是处理器管芯的情况下)产生的热量会损害顶部管芯或堆叠管芯2。热量也可能导致层叠封装结构中的热应力和翘曲从而导致诸如焊球的连接元件破裂。如图3所示，本发明的层叠封装结构的优点是底部封装件34的附接至管芯37之上并使堆叠管芯2与管芯37所产生的热量热绝缘的热隔离材料50。在一个实施例中，因为由于热隔离材料50，顶部封装件1和底部封装件34与热绝缘，所以其他优点是更好地控制层叠封装结构中的翘曲。换句话说，热隔离材料50阻止了作为顶部封装件1和底部封装件34之间的热膨胀系数(CTE)失配的结果可能发生的翘曲。
在一些实施例中，热隔离材料50是热导率为约0.024W/mK至约0.2W/mK的材料。热隔离材料50可以包括多孔膜、蜡膜、管芯附接膜(DAF)、气凝胶、胶带、热界面材料(TIM)或粘合剂。在热隔离材料50是TIM的情况下，TIM可以包括焊膏、粘合剂或热脂。在一些实施例中，热隔离材料50的厚度在约10微米至约100微米的范围内。图5示出层叠封装结构中的热隔离材料50，其中底部封装件34附接至顶部封装件1。
在其他实施例中，如图4和图6所示热隔离材料50是在其中具有空气或真空77的密封环55，该密封环55位于底部封装件34附接至顶部封装件1的层叠封装结构中。空气或真空在正常运行条件下是理想热绝缘体。在其他实施例中，密封环55提供约0W/mK的热导率。密封环50分配在管芯37上，以在以下将要阐述的模制工艺期间提供真空间隙。
在一些实施例中，在对管芯37施加热隔离材料50或密封环55之后，对底部封装件34施加模塑料35，以提供机械刚度和提高层叠封装结构的机械强度。可以使用例如压塑成型或转印成型在衬底38上模制模塑料35并使模塑料35环绕管芯37和连接元件39。然后可以执行固化步骤从而使模塑料35凝固。模塑料35可以包括基于聚合物的材料、底部填充物剂、模制底部填充物(MUF)、环氧树脂等。再参考图4，为了形成空气或真空77，环绕密封环55形成模塑料35从而在其中封装空气或真空77。
图2至图6示出的层叠封装结构仅是为了说明的目的并不用于限制。可以考虑其他的实施例。
本发明的一个或多个实施例的优点可以包括以下优点中的一个或多个。
在一个或多个实施例中，在包括具有顶部管芯的顶部封装件和具有底部管芯的底部封装件的层叠封装结构中，顶部管芯基本上与底部管芯所产生的热量绝缘。
在一个或多个实施例中，由于顶部封装件和底部封装件基本上与热绝缘，所以更好地控制层叠封装结构中的翘曲。
本发明已经描述了各个示例性实施例。根据一个实施例，半导体器件包括第一封装元件和第二封装元件。第一封装元件具有在第一衬底上形成的第一管芯。第二封装元件具有在第二衬底上形成的第二管芯。第一组导电元件将第一封装元件耦合至第二封装元件。热隔离材料被施加在第一管芯上并处于第一封装元件和第二封装元件之间，其中热隔离材料使第二管芯与第一管芯热绝缘。在一些实施例中，热隔离材料包括密封环和气隙。
根据另一个实施例，层叠封装件包括底部封装元件和顶部封装元件。底部封装元件至少具有形成在底部衬底上的底部管芯。顶部封装元件至少具有形成在顶部衬底上的顶部管芯。热隔离材料附接至底部管芯，其中，热隔离材料使顶部管芯与底部管芯热绝缘。热隔离材料的热导率在约0.024W/mK至约0.2W/mK的范围内。第一组导电元件将底部衬底耦合至顶部衬底。在一些实施例中，热隔离材料包括密封环和气隙。
根据又一个实施例，公开了形成封装件的方法。提供了第一封装元件，该第一封装元件具有形成在第一衬底上的第一管芯。提供了第二封装元件，该第二封装元件具有形成在第二衬底上的第二管芯。热隔离材料附接至第一管芯，其中，热隔离材料使第二管芯与第一管芯热绝缘。第一封装元件通过第一组导电元件耦合至第二封装元件。在一些实施例中，热隔离材料包括密封环和气隙。
在以上详细的描述中，已经描述了具体的示例性实施例。然而，对于本领域普通技术人员来说，很明显在不背离本发明的宽泛主旨和范围的情况下，可以对本发明作出各种更改、结构、工艺和改变。因此，说明书和附图是为了说明而不用于限定。据了解本发明的实施例可以使用各种其它组合和环境且可以在权利要求的范围内进行改变或更改。

Claims (15)

1.一种半导体器件，包括：
第一封装元件，具有形成在第一衬底上的第一管芯；
第二封装元件，具有形成在第二衬底上的第二管芯；
第一组导电元件，将所述第一封装元件耦合至所述第二封装元件；以及
热隔离材料，处于所述第一封装元件和所述第二封装元件之间，
其中，所述热隔离材料是其中具有空气或真空的密封环。
2.根据权利要求1所述的半导体器件，还包括：
第二组导电元件，将所述第一管芯耦合至所述第一衬底；以及
第三组导电元件，将所述第二管芯耦合至所述第二衬底。
3.根据权利要求2所述的半导体器件，其中，所述第三组导电元件包括接合引线。
4.根据权利要求2所述的半导体器件，还包括模塑料，所述模塑料模制在所述第一衬底上并环绕所述第一管芯、所述第一组导电元件和所述第二组导电元件，并且所述模塑料还模制在所述第二衬底上并环绕所述第二管芯和所述第三组导电元件。
5.根据权利要求1所述的半导体器件，其中，所述第一管芯是逻辑芯片。
6.根据权利要求1所述的半导体器件，其中，所述第二管芯是存储芯片。
7.根据权利要求1所述的半导体器件，其中，所述热隔离材料的厚度在10微米至100微米的范围内。
8.一种层叠封装件，包括：
底部封装元件，具有形成在底部衬底上的至少一个底部管芯；
顶部封装元件，具有形成在顶部衬底上的至少一个顶部管芯；
热隔离材料，附接至所述底部管芯，其中，所述热隔离材料是其中具有空气或真空的密封环；以及
第一组导电元件，将所述底部衬底耦合至所述顶部衬底。
9.根据权利要求8所述的层叠封装件，还包括：
第二组导电元件，将所述至少一个底部管芯耦合至所述底部衬底；以及
第三组导电元件，将所述至少一个顶部管芯耦合至所述顶部衬底。
10.根据权利要求9所述的层叠封装件，还包括模塑料，所述模塑料模制在所述底部衬底上并环绕所述底部管芯、所述第一组导电元件和所述第二组导电元件，并且所述模塑料还模制在所述顶部衬底上并环绕所述顶部管芯和所述第三组导电元件。
11.根据权利要求8所述的层叠封装件，其中，所述热隔离材料的厚度在10微米至100微米的范围内。
12.根据权利要求8所述的层叠封装件，还包括环绕第二组导电元件和第三组导电元件的底部填充物。
13.一种形成封装件的方法，包括
提供第一封装元件，所述第一封装元件具有形成在第一衬底上的第一管芯；
提供第二封装元件，所述第二封装元件具有形成在第二衬底上的第二管芯；
将热隔离材料附接至所述第一管芯，所述热隔离材料基本使所述第二管芯与所述第一管芯热绝缘，其中，所述热隔离材料是其中具有空气或真空的密封环；以及
通过第一组导电元件将所述第一封装元件耦合至所述第二封装元件，其中，具有空气或真空的所述密封环位于所述第一封装元件与所述第二封装元件之间。
14.根据权利要求13所述的方法，还包括：
通过第二组导电元件将所述第一管芯耦合至所述第一衬底；以及
通过第三组导电元件将所述第二管芯耦合至所述第二衬底。
15.根据权利要求13所述的方法，还包括：
在所述第一封装元件和所述第二封装元件上方形成模塑料。
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