US20230378153A1 - Package-on-Package Structure Including a Thermal Isolation Material - Google Patents
Package-on-Package Structure Including a Thermal Isolation Material Download PDFInfo
- Publication number
- US20230378153A1 US20230378153A1 US18/361,515 US202318361515A US2023378153A1 US 20230378153 A1 US20230378153 A1 US 20230378153A1 US 202318361515 A US202318361515 A US 202318361515A US 2023378153 A1 US2023378153 A1 US 2023378153A1
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- US
- United States
- Prior art keywords
- die
- package component
- package
- seal ring
- thermal isolation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- 239000000463 material Substances 0.000 title claims abstract description 52
- 238000002955 isolation Methods 0.000 title claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims description 39
- 238000000465 moulding Methods 0.000 claims description 19
- 150000001875 compounds Chemical class 0.000 claims description 5
- 239000004964 aerogel Substances 0.000 claims description 2
- 239000008393 encapsulating agent Substances 0.000 claims 7
- 230000009969 flowable effect Effects 0.000 claims 1
- 239000007787 solid Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 229910000679 solder Inorganic materials 0.000 description 16
- ABJSOROVZZKJGI-OCYUSGCXSA-N (1r,2r,4r)-2-(4-bromophenyl)-n-[(4-chlorophenyl)-(2-fluoropyridin-4-yl)methyl]-4-morpholin-4-ylcyclohexane-1-carboxamide Chemical compound C1=NC(F)=CC(C(NC(=O)[C@H]2[C@@H](C[C@@H](CC2)N2CCOCC2)C=2C=CC(Br)=CC=2)C=2C=CC(Cl)=CC=2)=C1 ABJSOROVZZKJGI-OCYUSGCXSA-N 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000005272 metallurgy Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 238000001721 transfer moulding Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 229920001940 conductive polymer Polymers 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
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Definitions
- POP Package-on-package
- a conventional package-on-package structure may include a bottom package component and a top package component.
- the bottom package component may include a bottom die attached to a bottom substrate and the top package component may include a top die attached to a top substrate.
- the bottom package component is coupled to the top package component typically by a set of conductive elements, such as solder balls.
- solder balls In operation, both package components generate heat.
- excessive heat that is generated by the bottom die, especially where the bottom die is a device die may cause damage to the top die.
- the heat can also cause thermal stress and warpage in the package-on-package structure leading to cracks in the solder balls. Even with the use of molding compounds in the package-on-package structure, the problem of excess heat and warpage still cannot be entirely eliminated.
- FIG. 1 is a flowchart of a method of fabricating a package-on-package structure according to various embodiments of the present disclosure.
- FIGS. 2 - 6 are cross-sectional views of a top package and/or a bottom package at various intermediate stages in the manufacture of a package-on-package structure, in accordance with various embodiments of the present disclosure.
- FIG. 1 is a flowchart of a method 100 for fabricating a package-on-package according to various aspects of the present disclosure.
- the method includes block 110 , in which a first package component is provided, the first package component having a first die formed on a first substrate.
- the method 100 includes block 120 , in which a second package component is provided, the second package component having a second die formed on a second substrate.
- the method 100 includes block 130 , in which a thermal isolation material is attached to the first die. The thermal isolation material substantially thermally insulates the second die from the first die.
- the method 100 includes block 140 , in which the first package component is coupled to the second package component with a set of conductive elements.
- FIGS. 2 - 6 are diagrammatic fragmentary cross-sectional side views of a top package and/or a bottom package at various fabrication stages of manufacturing a package-on-package structure according to embodiments of the method 100 of FIG. 1 . It is understood that FIGS. 2 - 6 have been simplified for a better understanding of the inventive concepts of the present disclosure. It should be appreciated that the materials, geometries, dimensions, structures, and process parameters described herein are exemplary only, and are not intended to be, and should not be construed to be, limiting to the invention claimed herein. Many alternatives and modifications will be apparent to those skilled in the art, once informed by the present disclosure.
- FIG. 2 illustrates a top package 1 to be employed in the package-on-package structure.
- Top package 1 which may be formed using a plastic ball grid array (PBGA) package assembly process or the like, includes a plurality of stacked die 2 , which may be wired bonded to top substrate 10 by way of contacts 16 (on respective stacked die 2 ), bond wires 6 , and contacts 12 (on top substrate 10 ).
- Individual stacked die may comprise a memory chip, a logic chip, a processor chip, or the like.
- FIG. 2 illustrates three stacked die, this is for illustration only.
- wire bonding is merely illustrative, and other approaches for electrically connecting the stacked die are within the contemplated scope of the present disclosure.
- solder bumps, solder balls, copper pillars, conductive bumps, solder caps, conductive pillars, conductive balls, under-bump metallurgies, and/or other connector elements may also be contemplated to connect stacked die 2 to top substrate 10 .
- an underfill (not shown) is dispensed into the gap between stacked die 2 and top substrate 10 to reinforce the strength of the package-on-package structure.
- Top substrate 10 may be a laminated circuit board comprised of alternating layers of non-conductive polymers, such as bismaleinide-triazine (BT), and patterned (or non-patterned) conductive layers. As discussed above, top substrate 10 has contacts 12 on a first side (referred to herein sometimes as a top side for convenience) for electrical connection to stacked die 2 . Top substrate 10 further has bottom contacts 24 on a second side (sometimes referred to as a bottom side) for electrical connection to other components as will be detailed further below. Solder balls 36 are attached to bottom contacts 24 to top substrate 10 . Solder balls 36 allow for electrical and/or thermal connection between top package 1 and a bottom package 34 (not shown in FIG. 2 , but illustrated in FIGS. 3 and 4 ).
- BT bismaleinide-triazine
- solder balls 36 provide for electrical conduction of signals and power to stacked die 2 .
- other connection components such as conductive bumps, conductive balls, conductive pillars, and the like, could be employed in lieu of solder balls 36 .
- a molding compound 35 is applied to top package 1 to provide mechanical stiffness and enhance the mechanical strength of the package-on-package structure. It is believed that this mechanical stiffness prevents, or at least reduces, the severity of warpages resulting from, for example, thermal expansion mismatch between the components of the resulting package. Molding compound 35 may be molded on substrate 10 and surrounds stacked die 2 and bond wires 6 using, for example, compressive molding or transfer molding. A curing step may then be performed to solidify the molding compound 35 .
- the molding compound 35 may comprise a polymer-based material, an underfill, a molding underfill (MUF), an epoxy, or the like.
- Top package 1 is attached to a bottom package 34 , as illustrated in FIG. 5 byway of solder balls 36 .
- the bottom package 34 includes die 37 , which is flip chip attached to a bottom substrate 38 , and which is electrically connected thereto by way of connector elements 39 .
- Die 37 may comprise a logic chip, a processor chip, a memory chip, or the like.
- Connector elements 39 may include, for example solder bumps, solder balls, copper pillars, conductive bumps, solder caps, conductive pillars, conductive balls, and under-bump metallurgies.
- an underfill (not shown) is dispensed into the gap between die 37 and bottom substrate 38 to reinforce the strength of the package-on-package structure.
- Electrical connection between die 37 and an underlying mother board or other circuitry is provided by through vias (not shown) aligned with connector elements 39 on one side of bottom substrate 38 and connector elements 42 on the other side of bottom substrate 38 .
- electrical connection between top substrate 10 and an underlying mother board or other circuitry is provided by solder balls 36 , through vias, and connector elements 42 .
- both the bottom package 34 and the top package 1 that include die 37 and stacked die 2 respectively generate heat.
- Heat that is generated by die 37 may cause damage to the top die or stacked die 2 .
- the heat can also cause thermal stress and warpage in the package-on-package structure leading to cracks in the connector elements, such as solder balls.
- An advantageous feature of the package-on-package structure of the present disclosure is a thermal isolation material 50 of the bottom package 34 , as depicted in FIG. 3 , attached above die 37 and thermally insulates stacked die 2 from the heat generated by die 37 .
- thermal isolation material 55 provides resistance to warping that might otherwise occur as a result of thermal coefficient of expansion (CTE) mismatch between top package 1 and bottom packager 34 .
- the thermal isolation material 50 is a material having a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK.
- the thermal isolation material 50 may comprise a porous film, a wax film, a die attach film (DAF), an aerogel, a tape, a thermal interface material (TIM), or an adhesive.
- the thermal isolation material 50 is a TIM
- the TIM may comprise a solder paste, an adhesive, or thermal grease.
- the thermal isolation material 50 has a thickness ranging from about 10 microns to about 100 microns.
- FIG. 5 shows the thermal isolation material 50 in the package-on-package structure where the bottom package 34 is attached to the top package 1 .
- the thermal isolation material 50 is a seal ring 55 having air or vacuum 77 therein, as shown in FIG. 4 and as shown in FIG. 6 .
- the seal ring 55 is formed in the package-on-package structure where the bottom package 34 is attached to top package 1 . Air or vacuum is an ideal thermal insulator under normal operation conditions.
- the seal ring 55 provides a thermal conductivity of about 0 W/mK. Seal ring 55 is dispensed on die 37 to provide a vacuum gap during a molding process that will be explained below.
- a molding compound 35 is applied to bottom package 34 to provide mechanical stiffness and enhance the mechanical strength of the package-on-package structure.
- Molding compound 35 may be molded on substrate 38 and surround die 37 and connector elements 39 using, for example, compressive molding or transfer molding.
- a curing step may then be performed to solidify the molding compound 35 .
- the molding compound 35 may comprise a polymer-based material, an underfill, a molding underfill (MUF), an epoxy, or the like.
- UMF molding underfill
- the molding compound 35 is formed around the seal ring 55 , thereby encapsulating the air or vacuum 77 therein.
- FIGS. 2 - 6 The package-on-package structures shown in FIGS. 2 - 6 are only for illustrative purpose and are not limiting. Additional embodiments can be conceived.
- the top die in a package-on-package structure having a top package with a top die and a bottom package with a bottom die, the top die is substantially insulated from the heat generated by the bottom die.
- warpage in a package-on-package structure is better to control because the top package and the bottom package are substantially insulated from heat.
- a semiconductor device includes a first package component and a second package component.
- the first package component has a first die formed on a first substrate.
- the second package component has a second die formed on a second substrate.
- a first set of conductive elements couples the first package component to the second package component.
- a thermal isolation material is applied on the first die and interjacent the first package component and the second package component, wherein the thermal isolation material thermally insulates the second die from the first die.
- the thermal isolation material includes a seal ring and an air gap.
- a package-on-package includes a bottom package component and a top package component.
- the bottom package component has at least a bottom die formed on a bottom substrate.
- the top package component has at least a top die formed on a top substrate.
- a thermal isolation material is attached to the bottom die, wherein the thermal isolation material thermally insulates the top die from the bottom die.
- the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK.
- a first set of conductive elements couples the bottom substrate to the top substrate.
- the thermal isolation material includes a seal ring and an air gap.
- a method of forming a package is disclosed.
- a first package component is provided, and the first package component has a first die formed on a first substrate.
- a second package component is provided, and the second package component has a second die formed on a second substrate.
- a thermal isolation material is attached to the first die, wherein the thermal isolation material thermally insulates the second die from the first die.
- the first package component is coupled to the second package component with a first set of conductive elements.
- the thermal isolation material includes a seal ring and an air gap.
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Abstract
A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
Description
- This application is a continuation of U.S. patent application Ser. No. 16/580,617, entitled “Package-on-Package Structure Including a Thermal Isolation Material,” filed on Sep. 24, 2019, which is a continuation of U.S. patent application Ser. No. 15/228,098, entitled, “Package-on-Package Structure Including a Thermal Isolation Material and Method of Forming the Same,” filed on Aug. 4, 2016, now U.S. Pat. No. 10,490,539 issued Nov. 26, 2019, which is a continuation of U.S. patent application Ser. No. 13/671,665, entitled “Package-on-Package Structure Including a Thermal Isolation Material and Method of Forming the Same,” filed on Nov. 8, 2012, now U.S. Pat. No. 9,418,971 issued Aug. 16, 2016, which applications are incorporated herein by reference.
- Package-on-package (POP) is becoming an increasingly popular integrated circuit packaging technique because it allows for higher density electronics.
- A conventional package-on-package structure may include a bottom package component and a top package component. The bottom package component may include a bottom die attached to a bottom substrate and the top package component may include a top die attached to a top substrate. The bottom package component is coupled to the top package component typically by a set of conductive elements, such as solder balls. In operation, both package components generate heat. However, excessive heat that is generated by the bottom die, especially where the bottom die is a device die, may cause damage to the top die. The heat can also cause thermal stress and warpage in the package-on-package structure leading to cracks in the solder balls. Even with the use of molding compounds in the package-on-package structure, the problem of excess heat and warpage still cannot be entirely eliminated.
- Embodiments of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is emphasized that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
-
FIG. 1 is a flowchart of a method of fabricating a package-on-package structure according to various embodiments of the present disclosure. -
FIGS. 2-6 are cross-sectional views of a top package and/or a bottom package at various intermediate stages in the manufacture of a package-on-package structure, in accordance with various embodiments of the present disclosure. - In the following description, specific details are set forth to provide a thorough understanding of embodiments of the present disclosure. However, one having an ordinary skill in the art will recognize that embodiments of the disclosure can be practiced without these specific details. In some instances, well-known structures and processes are not described in detail to avoid unnecessarily obscuring embodiments of the present disclosure.
- Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be appreciated that the following figures are not drawn to scale; rather, these figures are intended for illustration.
-
FIG. 1 is a flowchart of amethod 100 for fabricating a package-on-package according to various aspects of the present disclosure. Referring toFIG. 1 , the method includesblock 110, in which a first package component is provided, the first package component having a first die formed on a first substrate. Themethod 100 includesblock 120, in which a second package component is provided, the second package component having a second die formed on a second substrate. Themethod 100 includesblock 130, in which a thermal isolation material is attached to the first die. The thermal isolation material substantially thermally insulates the second die from the first die. Themethod 100 includesblock 140, in which the first package component is coupled to the second package component with a set of conductive elements. - It is understood that additional processes may be performed before, during, or after the blocks 110-140 shown in
FIG. 1 to complete the fabrication of the package-on-package structure, but these additional processes are not discussed herein in detail for the sake of simplicity. -
FIGS. 2-6 are diagrammatic fragmentary cross-sectional side views of a top package and/or a bottom package at various fabrication stages of manufacturing a package-on-package structure according to embodiments of themethod 100 ofFIG. 1 . It is understood thatFIGS. 2-6 have been simplified for a better understanding of the inventive concepts of the present disclosure. It should be appreciated that the materials, geometries, dimensions, structures, and process parameters described herein are exemplary only, and are not intended to be, and should not be construed to be, limiting to the invention claimed herein. Many alternatives and modifications will be apparent to those skilled in the art, once informed by the present disclosure. - An embodiment package-on-package structure will be discussed with reference to
FIGS. 2-6 .FIG. 2 illustrates atop package 1 to be employed in the package-on-package structure.Top package 1, which may be formed using a plastic ball grid array (PBGA) package assembly process or the like, includes a plurality of stackeddie 2, which may be wired bonded totop substrate 10 by way of contacts 16 (on respective stacked die 2),bond wires 6, and contacts 12 (on top substrate 10). Individual stacked die may comprise a memory chip, a logic chip, a processor chip, or the like. AlthoughFIG. 2 illustrates three stacked die, this is for illustration only. Likewise, the use of wire bonding is merely illustrative, and other approaches for electrically connecting the stacked die are within the contemplated scope of the present disclosure. For example, solder bumps, solder balls, copper pillars, conductive bumps, solder caps, conductive pillars, conductive balls, under-bump metallurgies, and/or other connector elements may also be contemplated to connect stacked die 2 totop substrate 10. In some embodiments, an underfill (not shown) is dispensed into the gap between stacked die 2 andtop substrate 10 to reinforce the strength of the package-on-package structure. -
Top substrate 10 may be a laminated circuit board comprised of alternating layers of non-conductive polymers, such as bismaleinide-triazine (BT), and patterned (or non-patterned) conductive layers. As discussed above,top substrate 10 hascontacts 12 on a first side (referred to herein sometimes as a top side for convenience) for electrical connection to stacked die 2.Top substrate 10 further hasbottom contacts 24 on a second side (sometimes referred to as a bottom side) for electrical connection to other components as will be detailed further below.Solder balls 36 are attached tobottom contacts 24 totop substrate 10.Solder balls 36 allow for electrical and/or thermal connection betweentop package 1 and a bottom package 34 (not shown inFIG. 2 , but illustrated inFIGS. 3 and 4 ). In the illustrated embodiment,solder balls 36 provide for electrical conduction of signals and power to stacked die 2. Again, other connection components, such as conductive bumps, conductive balls, conductive pillars, and the like, could be employed in lieu ofsolder balls 36. - In some embodiments, a
molding compound 35 is applied totop package 1 to provide mechanical stiffness and enhance the mechanical strength of the package-on-package structure. It is believed that this mechanical stiffness prevents, or at least reduces, the severity of warpages resulting from, for example, thermal expansion mismatch between the components of the resulting package. Moldingcompound 35 may be molded onsubstrate 10 and surrounds stacked die 2 andbond wires 6 using, for example, compressive molding or transfer molding. A curing step may then be performed to solidify themolding compound 35. Themolding compound 35 may comprise a polymer-based material, an underfill, a molding underfill (MUF), an epoxy, or the like. -
Top package 1 is attached to abottom package 34, as illustrated inFIG. 5 byway ofsolder balls 36. As depicted inFIG. 3 , thebottom package 34 includes die 37, which is flip chip attached to abottom substrate 38, and which is electrically connected thereto by way ofconnector elements 39. Die 37 may comprise a logic chip, a processor chip, a memory chip, or the like.Connector elements 39 may include, for example solder bumps, solder balls, copper pillars, conductive bumps, solder caps, conductive pillars, conductive balls, and under-bump metallurgies. In some embodiments, an underfill (not shown) is dispensed into the gap betweendie 37 andbottom substrate 38 to reinforce the strength of the package-on-package structure. Electrical connection betweendie 37 and an underlying mother board or other circuitry (not shown) is provided by through vias (not shown) aligned withconnector elements 39 on one side ofbottom substrate 38 andconnector elements 42 on the other side ofbottom substrate 38. Likewise, electrical connection betweentop substrate 10 and an underlying mother board or other circuitry is provided bysolder balls 36, through vias, andconnector elements 42. - In operation, both the
bottom package 34 and thetop package 1 that include die 37 and stackeddie 2, respectively generate heat. Heat that is generated bydie 37, especially where the bottom die is a processor die, may cause damage to the top die or stackeddie 2. The heat can also cause thermal stress and warpage in the package-on-package structure leading to cracks in the connector elements, such as solder balls. An advantageous feature of the package-on-package structure of the present disclosure is athermal isolation material 50 of thebottom package 34, as depicted inFIG. 3 , attached above die 37 and thermally insulatesstacked die 2 from the heat generated bydie 37. In one embodiment, as an additional benefit because thetop package 1 andbottom package 34 are insulated from heat thanks to thethermal isolation material 55, warpage in the package-on-package structure is better controlled. In other words,thermal isolation material 55 provides resistance to warping that might otherwise occur as a result of thermal coefficient of expansion (CTE) mismatch betweentop package 1 andbottom packager 34. - In some embodiments, the
thermal isolation material 50 is a material having a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. Thethermal isolation material 50 may comprise a porous film, a wax film, a die attach film (DAF), an aerogel, a tape, a thermal interface material (TIM), or an adhesive. Where thethermal isolation material 50 is a TIM, the TIM may comprise a solder paste, an adhesive, or thermal grease. In some embodiments, thethermal isolation material 50 has a thickness ranging from about 10 microns to about 100 microns. -
FIG. 5 shows thethermal isolation material 50 in the package-on-package structure where thebottom package 34 is attached to thetop package 1. - In other embodiments, the
thermal isolation material 50 is aseal ring 55 having air orvacuum 77 therein, as shown inFIG. 4 and as shown inFIG. 6 . Theseal ring 55 is formed in the package-on-package structure where thebottom package 34 is attached totop package 1. Air or vacuum is an ideal thermal insulator under normal operation conditions. In other embodiments, theseal ring 55 provides a thermal conductivity of about 0 W/mK.Seal ring 55 is dispensed on die 37 to provide a vacuum gap during a molding process that will be explained below. - After either the
thermal isolation material 50 or theseal ring 55 has been applied to die 37, in some embodiments, amolding compound 35 is applied tobottom package 34 to provide mechanical stiffness and enhance the mechanical strength of the package-on-package structure.Molding compound 35 may be molded onsubstrate 38 and surround die 37 andconnector elements 39 using, for example, compressive molding or transfer molding. A curing step may then be performed to solidify themolding compound 35. Themolding compound 35 may comprise a polymer-based material, an underfill, a molding underfill (MUF), an epoxy, or the like. Referring back toFIG. 4 , to form the air orvacuum 77, themolding compound 35 is formed around theseal ring 55, thereby encapsulating the air orvacuum 77 therein. - The package-on-package structures shown in
FIGS. 2-6 are only for illustrative purpose and are not limiting. Additional embodiments can be conceived. - Advantages of one or more embodiments of the present disclosure may include one or more of the following.
- In one or more embodiments, in a package-on-package structure having a top package with a top die and a bottom package with a bottom die, the top die is substantially insulated from the heat generated by the bottom die.
- In one or more embodiments, warpage in a package-on-package structure is better to control because the top package and the bottom package are substantially insulated from heat.
- The present disclosure has described various exemplary embodiments. According to one embodiment, a semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. The second package component has a second die formed on a second substrate. A first set of conductive elements couples the first package component to the second package component. A thermal isolation material is applied on the first die and interjacent the first package component and the second package component, wherein the thermal isolation material thermally insulates the second die from the first die. In some embodiments, the thermal isolation material includes a seal ring and an air gap.
- According to another embodiment, a package-on-package includes a bottom package component and a top package component. The bottom package component has at least a bottom die formed on a bottom substrate. The top package component has at least a top die formed on a top substrate. A thermal isolation material is attached to the bottom die, wherein the thermal isolation material thermally insulates the top die from the bottom die. The thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the bottom substrate to the top substrate. In some embodiments, the thermal isolation material includes a seal ring and an air gap.
- According to yet another embodiment, a method of forming a package is disclosed. A first package component is provided, and the first package component has a first die formed on a first substrate. A second package component is provided, and the second package component has a second die formed on a second substrate. A thermal isolation material is attached to the first die, wherein the thermal isolation material thermally insulates the second die from the first die. The first package component is coupled to the second package component with a first set of conductive elements. In some embodiments, the thermal isolation material includes a seal ring and an air gap.
- In the preceding detailed description, specific exemplary embodiments have been described. It will, however, be apparent to a person of ordinary skill in the art that various modifications, structures, processes, and changes may be made thereto without departing from the broader spirit and scope of the present disclosure. The specification and drawings are, accordingly, to be regarded as illustrative and not restrictive. It is understood that embodiments of the present disclosure are capable of using various other combinations and environments and are capable of changes or modifications within the scope of the claims.
Claims (20)
1. A method comprising:
disposing a thermal isolation material on a top surface of a die, wherein the die is comprised in a lower package component, and wherein at a time the thermal isolation material is disposed, outer edges of the thermal isolation material are aligned to corresponding edges of the die;
bonding an upper package component to the lower package component, wherein the thermal isolation material is between, and is in contact with, both of the die and the upper package component; and
after the upper package component is bonded to the lower package component, disposing a molding compound between the upper package component and the lower package component.
2. The method of claim 1 , wherein the thermal isolation material is a solid plate that continuously extends from a first edge of the die to an opposing second edge of the die.
3. The method of claim 1 , wherein the thermal isolation material comprises a porous film.
4. The method of claim 1 , wherein the thermal isolation material comprises an aerogel.
5. The method of claim 1 , wherein the thermal isolation material has a thermal conductivity value in a range between about 0.024 W/mK and about 0.2 W/mK.
6. The method of claim 1 , wherein the molding compound is dispensed in a flowable form, and the method further comprises curing to solidify the molding compound.
7. The method of claim 1 , wherein the thermal isolation material is in a form of a seal ring encircling a space therein, and wherein after the upper package component is bonded to the lower package component, an air gap or vacuum is enclosed by the seal ring, the upper package component, and the die.
8. The method of claim 7 , wherein the molding compound is in contact with the outer edges of the seal ring, with the outer edges of the seal ring being the outer edges of the thermal isolation material, and wherein inner edges of the seal ring are exposed to air or vacuum.
9. The method of claim 8 , wherein the seal ring encircles air therein.
10. The method of claim 7 , wherein the seal ring encircles a vacuumed space therein.
11. A method comprising:
forming a lower package comprising a device die;
bonding an upper package over the lower package; and
forming a filling region between the lower package and the upper package, wherein the filling region encircles a space that is between the upper package and the device die, and the space comprises an air space or a vacuumed space.
12. The method of claim 11 , wherein the filling region comprises:
attaching a first material in a region directly over the device die; and
dispensing a second material vertically offset from the device die, wherein the second material is different from the first material.
13. The method of claim 12 , wherein the first material and the second material have interfaces that are vertically aligned to outer edges of the device die.
14. The method of claim 12 , wherein the first material and the second material are attached to the device die through different processes.
15. A method comprising:
forming a lower package component comprising bonding a die to a substrate;
forming a seal ring on a first top surface of the die;
bonding a upper package component to the lower package component, wherein a space is defined by the upper package component, the die, and the seal ring; and
dispensing an encapsulant between, and contacting both of, the upper package component and the lower package component, so that the space and the seal ring are encircled by the encapsulant, wherein the encapsulant and the seal ring form interfaces that extend from a bottom surface to a second top surface of the seal ring, and the interfaces are vertically aligned to corresponding edges of the die.
16. The method of claim 15 further comprising curing the encapsulant.
17. The method of claim 15 , wherein at a time after the encapsulant is dispensed, the space is an air gap.
18. The method of claim 15 , wherein at a time after the encapsulant is dispensed, the space is a vacuumed space.
19. The method of claim 15 , wherein the seal ring comprises inner edges that face the space, and the inner edges are vertical and straight edges.
20. The method of claim 15 , wherein the encapsulant is dispensed after the seal ring is formed.
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US18/361,515 US20230378153A1 (en) | 2012-11-08 | 2023-07-28 | Package-on-Package Structure Including a Thermal Isolation Material |
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US8482111B2 (en) | 2010-07-19 | 2013-07-09 | Tessera, Inc. | Stackable molded microelectronic packages |
KR101128063B1 (en) | 2011-05-03 | 2012-04-23 | 테세라, 인코포레이티드 | Package-on-package assembly with wire bonds to encapsulation surface |
US8404520B1 (en) | 2011-10-17 | 2013-03-26 | Invensas Corporation | Package-on-package assembly with wire bond vias |
US8946757B2 (en) | 2012-02-17 | 2015-02-03 | Invensas Corporation | Heat spreading substrate with embedded interconnects |
US8835228B2 (en) | 2012-05-22 | 2014-09-16 | Invensas Corporation | Substrate-less stackable package with wire-bond interconnect |
US9502390B2 (en) | 2012-08-03 | 2016-11-22 | Invensas Corporation | BVA interposer |
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KR20140059696A (en) | 2014-05-16 |
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