CN103329273A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN103329273A
CN103329273A CN2011800648983A CN201180064898A CN103329273A CN 103329273 A CN103329273 A CN 103329273A CN 2011800648983 A CN2011800648983 A CN 2011800648983A CN 201180064898 A CN201180064898 A CN 201180064898A CN 103329273 A CN103329273 A CN 103329273A
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semiconductor layer
semiconductor device
film
schottky
layer
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CN103329273B (zh
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美浓浦优一
冈本直哉
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Fujitsu Ltd
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Abstract

本发明涉及半导体装置及其制造方法。在半导体装置中设置有半导体层（1）、和与半导体层（1）肖特基接合的肖特基电极（2）。在肖特基电极（2）中包含有：金属部（2a），其包含与半导体层（1）肖特基接合的金属；和氮化物部（2b），其形成于金属部（2a）的周围，包含上述金属的氮化物，并与半导体层（1）肖特基接合。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体装置及其制造方法。
背景技术
作为带隙较宽的化合物半导体的GaN因其材料特性有望作为高耐压且可高速动作的器件的材料，特别期待应用于如进行高耐压并且大电流动作的电源器件。另外，肖特基势垒二极管（SBD）与pn二极管相比在高速响应性以及低损耗这一点上更为优良。因此，期待使用了GaN的SBD（GaN基SBD）作为下一代的低消耗电源器件。
为了减少GaN基SBD的损耗，降低SBD的导通电压很重要。另外，为了降低导通电压，在阳极电极上使用功函数小的金属有效。这是因为金属与化合物半导体的界面的肖特基势垒高度降低，正向的阈值电压降低。另一方面，若使用功函数小的金属，则在施加反向偏压时产生的耗尽层变薄，所以难以得到足够的截止耐压。这样，难以兼得低的导通电压以及高的截止耐压。
关于低导通电压以及高截止耐压的兼得，提出了组合了肖特基势垒高度较低的金属、和在其周围形成的肖特基势垒高度较高的金属的阳极电极的构造。然而，为了形成这样的构造的阳极电极，需要在形成了一方的金属之后，进行另一方的金属的成膜以及刻画图案。因此，化合物半导体的表面的清洁化所使用的药液等受限，难以充分地进行金属和化合物半导体的界面的清洁化。因此，导致肖特基特性降低，或者器件的成品率降低。
专利文献1:日本特开2004－31896号公报
发明内容
本发明的目的在于提供能够兼得低导通电压以及高截止耐压的半导体装置及其制造方法。
在半导体装置的一个方式中设置有半导体层、和与上述半导体层肖特基接合的肖特基电极。在上述肖特基电极包含有：金属部，其包含与上述半导体层肖特基接合的金属；和氮化物部，其形成于上述金属部的周围，包含上述金属的氮化物，并与上述半导体层肖特基接合。
在电源装置的一个方式中设置有半导体装置。在上述半导体装置中，设置有半导体层、和与上述半导体层肖特基接合的肖特基电极。在上述肖特基电极包含有：金属部，其包含与上述半导体层肖特基接合的金属；和氮化物部，其形成于上述金属部的周围，包含上述金属的氮化物，并与上述半导体层肖特基接合。
在半导体装置的制造方法的一个方式中，形成与半导体层肖特基接合的金属膜，并将上述金属膜的周边部氮化，由上述金属膜形成与上述半导体层肖特基接合的金属部；和位于上述金属部的周围，并与上述半导体层肖特基接合的氮化物部。
根据上述的半导体装置等，能够通过肖特基电极所包含的金属部来降低导通电压，并能够通过氮化物部来提高截止耐压。
附图说明
图1A是表示第一实施方式的半导体装置的构造的俯视图。
图1B是沿着图1A中的I－I线的剖视图。
图2A是表示金属膜以及半导体层的导带的关系的图。
图2B是表示氮化物膜以及半导体层的导带的关系的图。
图3A是表示第二实施方式的半导体装置的构造的剖视图。
图3B是表示氮化物膜以及半导体层的导带的关系的图。
图4是表示第三实施方式的半导体装置的构造的剖视图。
图5A是表示制造第三实施方式的半导体装置的方法的剖视图。
图5B是表示接着图5A制造半导体装置的方法的剖视图。
图5C是表示接着图5B制造半导体装置的方法的剖视图。
图5D是表示接着图5C制造半导体装置的方法的剖视图。
图5E是表示接着图5D制造半导体装置的方法的剖视图。
图5F是表示接着图5E制造半导体装置的方法的剖视图。
图6A是表示制造第四实施方式的半导体装置的方法的剖视图。
图6B是表示接着图6A制造半导体装置的方法的剖视图。
图6C是表示接着图6B制造半导体装置的方法的剖视图。
图7A是表示制造第五实施方式的半导体装置的方法的剖视图。
图7B是表示接着图7A制造半导体装置的方法的剖视图。
图7C是表示接着图7B制造半导体装置的方法的剖视图。
图7D是表示接着图7C制造半导体装置的方法的剖视图。
图7E是表示接着图7D制造半导体装置的方法的剖视图。
图7F是表示接着图7E制造半导体装置的方法的剖视图。
图7G是表示接着图7F制造半导体装置的方法的剖视图。
图7H是表示接着图7G制造半导体装置的方法的剖视图。
图7I是表示接着图7H制造半导体装置的方法的剖视图。
图7J是表示接着图7I制造半导体装置的方法的剖视图。
图7K是表示接着图7J制造半导体装置的方法的剖视图。
图7L是表示接着图7K制造半导体装置的方法的剖视图。
图8A是表示电极的布局的图。
图8B是表示布线的布局的图。
图9是表示布局的变形例的图。
图10是表示包含GaN基SBD的SBD组件的图。
图11是表示包含图10所示的SBD组件的PFC电路的图。
图12是表示包含图11所示的PFC电路的服务器电源的图。
具体实施方式
以下，参照附图对实施方式进行具体地说明。
（第一实施方式）
首先，对第一实施方式进行说明。图1A是表示第一实施方式的半导体装置（肖特基势垒二极管）的构造的俯视图，图1B是沿着图1A中的I－I线的剖视图。
在第一实施方式中，如图1A以及图1B所示，在半导体层1上形成有肖特基电极2。另外，在半导体层1的背面形成有欧姆电极3。在肖特基电极2中包含有金属膜2a，其包含与半导体层1肖特基接合的金属；以及氮化物膜2b，其形成于金属膜2a的周围，与半导体层1肖特基接合。在氮化物膜2b中包含有金属膜2a所包含的金属的氮化物。即、在氮化物膜2b中包含有与金属膜2a所包含的物质相比功函数低的物质。
在像这样构成的第一实施方式中，在金属膜2a以及氮化物膜2b之间存在功函数的不同，所以如图2A以及图2B所示，氮化物膜2b与半导体层1之间的肖特基势垒高度比金属膜2a与半导体层1之间的肖特基势垒高度高。因此，若施加正向偏压，则在金属膜2a与半导体层1之间，比在氮化物膜2b与半导体层1之间先流过电流。因此，金属膜2a的功函数越低，正向的阈值电压越低而导通电压越低。另外，若施加反向偏压，则耗尽层从氮化物膜2b向半导体层1大幅扩散，产生夹断。因此，即使在金属膜2a的功函数较低的情况下，也能够得到足够的截止耐压。即、根据第一实施方式，能够兼得低的导通电压以及高的截止耐压。另外，氮化物膜2b能够通过例如与金属膜2a相同的材料的氮化而形成，所以能够避免像组合两种金属的情况下的清洁性的降低。因此，也能够确保较高的可靠性。
此外，肖特基电极2中的金属膜2a以及氮化物膜2b的各比例并不特别限定，但优选在俯视时金属膜2a的面积比氮化物膜2b的面积大。
（第二实施方式）
接下来，对第二实施方式进行说明。图3A是表示第二实施方式的半导体装置（肖特基势垒二极管）的构造的剖视图，示出沿着图1A中的I－I线的剖面。
在第二实施方式中，如图2A所示，在半导体层1的与氮化物膜2b接合的部分形成有高阻区域4。高阻区域4的电阻比半导体层1的与金属膜2a接合的部分的电阻高。其他的构成与第一实施方式相同。
在这样构成的第二实施方式中，存在高阻区域4，所以在施加了反向偏压的情况下的耗尽层的扩散更大。因此，如图3B所示，即使肖特基势垒高度与第一实施方式是相同程度，高阻区域4以及半导体层1中的导带的变化比第一实施方式的半导体层1中的导带的变化（图3B中的虚线）缓慢，而能够得到更高的截止耐压。
（第三实施方式）
接下来，对第三实施方式进行说明。图4是表示第三实施方式的半导体装置（肖特基势垒二极管）的构造的剖视图。
在第三实施方式中，如图4所示，在n型的GaN基板11a上形成有n型的GaN层11b。在GaN基板11a中例如作为n型杂质掺杂5×1017cm-3的Si。在GaN层11b中例如作为n型杂质掺杂1×1016cm-3的Si。GaN层11b的厚度例如是1μm左右。GaN基板11a以及GaN层11b包含在半导体层11内。
在GaN层11b上形成有钝化膜15。在钝化膜15上形成有阳极电极用的开口部15a。作为钝化膜15例如形成有厚度为400nm左右的氮化硅膜。
在开口部15a内形成有阳极电极12（肖特基电极）。在阳极电极12中包含有与GaN层11b肖特基接合的Ti膜12a，以及形成于Ti膜12a的周围，并与GaN层11b肖特基接合的TiN膜12b。TiN膜12b的功函数比Ti膜12a的功函数低。Ti膜12a以及TiN膜12b的厚度是1μm左右。TiN膜12b的端部搭在钝化膜15上。
另外，在GaN基板11a的背面形成有阴极电极13（欧姆电极）。作为阴极电极13例如形成有厚度为10nm左右的Ti膜以及厚度为300nm左右的Al膜的层叠膜。
并且，在GaN层11b的与TiN膜12b接合的部分形成有高阻区域14。高阻区域14的电阻比GaN层11b的与Ti膜12a接合的部分的电阻高。
在这样构成的第三实施方式中，TiN膜12b与半导体层11之间的肖特基势垒高度比Ti膜12a与半导体层11之间的肖特基势垒高度高。因此，若施加正向偏压，则在Ti膜12a与半导体层11之间，比在TiN膜12b与半导体层11之间先流过电流。因此，能够降低导通电压。另外，若施加反向偏压，则由于与高阻区域14的协同效应，耗尽层从TiN膜12b向半导体层11非常大地扩散。因此，能够得到足够的截止耐压。即、根据第三实施方式，能够兼得低的导通电压以及高的截止耐压。
接下来，对制造第三实施方式的半导体装置的方法进行说明。图5A～图5F是按照工序顺序表示制造第三实施方式的半导体装置的方法的剖视图。
首先，如图5A所示，在n型的GaN基板11a上形成n型的GaN层11b。例如利用有机金属气相生长（MOCVD：metal-organic chemicalvapor deposition）法，外延生长GaN层11b。
接下来，如图5B所示，在GaN基板11a的背面形成阴极电极13。在阴极电极13的形成中，例如利用蒸镀法，在GaN基板11a的背面上形成Ti膜，在Ti膜上形成Al膜，并进行700℃左右的RTA（rapidthermal annealing：快速热退火）。通过该RTA来确立欧姆接触。
之后，如图5C所示，在GaN层11b上形成钝化膜15，并在钝化膜15上形成阳极电极用的开口部15a。作为钝化膜15，例如利用CVD法形成氮化硅膜。在开口部15a的形成中，例如进行使用了氟系气体的干式蚀刻。
接着，如图5D所示，在开口部15a内形成边缘部搭在钝化膜15上的Ti膜10。Ti膜10例如能够利用剥离法来形成。即，形成使形成Ti膜10的区域开口的抗蚀掩模，并进行Ti膜的蒸镀，若将抗蚀掩模与其上的Ti膜一起除去，则能够在所希望的区域上得到Ti膜10。
接下来，如图5E所示，形成使形成TiN膜12b的预定的区域以及形成高阻区域14的预定的区域例如Ti膜10的周边部开口的掩模101。作为掩模101例如形成光致抗蚀剂的掩模。之后，将氮气离子注入至Ti膜10以及GaN层11b。作为该离子注入的条件优选采用注入深度的峰值出现在Ti膜10与GaN层11b的界面或者比该界面稍深的位置上。另外，也可以进行注入深度的峰值出现在Ti膜10中的离子注入、以及注入深度的峰值出现在GaN层11b中的离子注入的两次离子注入。这样的离子注入的条件例如能够通过调整加速能量来变更。
如图5F所示，通过这样的氮气的离子注入，Ti膜10的被注入了氮气离子的部分成为TiN膜12b，其内侧的部分作为Ti膜12a而残存。另外，GaN层11b的被注入了氮气离子的部分的电阻上升，此处形成高阻区域14。而且，若除去掩模101，则得到图4所示的构造。
在该制造方法中，通过Ti膜10的氮化来形成TiN膜12b，并将Ti膜10的剩余部分作为Ti膜12a。因此，在Ti膜10的形成之后无需形成金属膜，若在Ti膜10的形成前进行清洁化处理，则能够得到充分的清洁性。因此，也能够确保较高的可靠性。
此外，在Ti膜10的氮化以及高阻区域14的形成时，也可以代替离子注入而进行等离子体处理。即、也可以进行将从掩模101的开口部露出的部分曝露在N2等离子体下的处理。
另外，也可以代替Ti膜以及TiN膜而使用Ta膜以及TaN膜。另外，GaN基板11a以及GaN层11b的载流子浓度，还有GaN层11b的厚度等也可以根据肖特基势垒二极管所需要的截止耐压以及导通电阻等特性来适当地变更。作为GaN层11b也可以使用层叠有多个GaN基半导体（例如GaN以及AlGaN）膜的层。
（第四实施方式）
接下来，对第四实施方式进行说明。在第四实施方式中，以并联的方式连接多个SBD。图6A～图6C是按照工序的顺序表示制造第四实施方式的半导体装置的方法的剖视图。
首先，如图6A所示，与第三实施方式相同，在n型的GaN基板21a上形成n型的GaN层21b。GaN基板21a以及GaN层21b包含于半导体层21中。接下来，与第三实施方式相同，在GaN基板21a的背面形成阴极电极23。之后，与第三实施方式相同，在GaN层21b上形成钝化膜25，在钝化膜25上形成多个阳极电极用的开口部25a。接着，与第三实施方式相同，在各开口部25a内形成边缘部搭在钝化膜25上的Ti膜，并进行使用了掩模的氮气的离子注入。其结果，形成具备与GaN层21b肖特基接合的Ti膜22a，以及形成在Ti膜22a的周围，并与GaN层21b肖特基接合的TiN膜22b的阳极电极22。另外，在GaN层21b的与TiN膜22b接合的部分上形成比GaN层21b的与Ti膜22a接合的部分电阻高的高阻区域24。
接下来，如图6B所示，露出Ti膜22a以及TiN膜22b，形成覆盖钝化膜25的聚酰亚胺膜26。
之后，如图6C所示，在聚酰亚胺膜26上形成共同连接各阳极电极22的阳极布线27。作为阳极布线27例如形成厚度为2μm左右的Al膜。
在这样的SBD（半导体装置）的安装中，例如，利用Ag糊剂等将阴极电极23芯片（die）黏着到导线框架上，经由Al线等将阳极布线27与导线框架连接即可。在第三实施方式中，若形成与阳极电极12连接的阳极布线，也能够进行相同的安装。
（第五实施方式）
接下来，对第五实施方式进行说明。在第五实施方式中，将GaN基SBD以及GaN基高电子迁移率晶体管（HEMT：high electronmobility transistor）形成在相同的基板上。图7A～图7L是按照工序的顺序表示制造第五实施方式的半导体装置的方法的剖视图。
首先，如图7A所示，例如利用MOCVD法等在基板41上形成缓冲层42、非掺杂的i－GaN层43、以及n型的n－AlGaN层31。作为基板41能够使用例如半绝缘性的SiC基板、半绝缘性Si基板、蓝宝石基板等。作为缓冲层42例如形成厚度为100nm左右的GaN层或者AlGaN层。例如，i－GaN层43的厚度为2μm左右，n－AlGaN层31的厚度为20nm左右。
接下来，如图7B所示，形成划分形成GaN基HEMT的预定的区域51以及形成GaN基SBD的预定的区域52的元件分离区域44。在元件分离区域44的形成中，例如比i－GaN层43与n－AlGaN层31的异质结界面深地注入Ar离子即可。通过这样的离子注入来断开存在于i－GaN层43的表层部的二维电子气（2DEG）。
之后，如图7C所示，在n－AlGaN层31上形成钝化膜35，在钝化膜35上形成阳极电极用的多个开口部35a、阴极电极用的多个开口部35c、栅电极用的多个开口部35g、源电极用的多个开口部35s、以及漏电极用的多个开口部35d。作为钝化膜35例如利用CVD法形成厚度为400nm左右的氮化硅膜。在开口部35a、35c、35g、35s、以及35d的形成中，进行例如使用氟系气体的干式蚀刻。
接着，如图7D所示，在开口部35c内形成阴极电极33，在开口部35s内形成源电极45s，在开口部35d内形成漏电极45d。阴极电极33、源电极45s、以及漏电极45d例如能够利用剥离法来形成。即，形成使形成阴极电极33、源电极45s、以及漏电极45d的区域开口的抗蚀掩模，进行例如厚度为10nm左右的Ti膜以及厚度为300nm左右的Al膜的蒸镀，并与其上的Ti膜以及Al膜一起除去抗蚀掩模。而且，进行700℃左右的RTA。通过该RTA来确立阴极电极33、源电极45s、以及漏电极45d的欧姆接触。
接着，如图7E所示，在开口部35g内形成栅电极45g。栅电极45g例如能够通过剥离法来形成。即形成使形成栅电极45g的区域开口的抗蚀掩模，进行例如厚度为10nm左右的Ni膜以及厚度为200nm左右的Au膜的蒸镀，与其上的Ni膜以及Au膜一起除去抗蚀掩模。
接下来，如图7F所示，在开口部35a内形成边缘部搭在钝化膜35上的Ti膜40。Ti膜40例如能够通过剥离法来形成。即，若形成使形成Ti膜40的区域开口的抗蚀掩模，进行Ti膜的蒸镀，与其上的Ti膜一起除去抗蚀掩模，则能够在所希望的区域得到Ti膜40。
之后，如图7G所示，形成使Ti膜40的周边部附近开口的掩模111。作为掩模111例如形成光致抗蚀剂的掩模。接着，与第三实施方式相同，向Ti膜40以及n－AlGaN层31注入氮气离子。
通过这样的氮气的离子注入，如图7H所示，Ti膜40的被注入了氮气离子的部分成为TiN膜32b，其内侧的部分作为Ti膜32a而残存。Ti膜32a以及TiN膜32b包含于阳极电极32。另外，n－AlGaN层31的被注入了氮气离子的部分的电阻上升，此处形成高阻区域34。
接下来，如图7I所示，通过溅射法在整个面上形成Au种子层46。接着，在Au种子层46上形成掩模（例如抗蚀掩模）112，该掩模112形成有露出阳极电极32、阴极电极33、栅电极45g、源电极45s、以及漏电极45d上的部分的规定的开口部。接下来，通过电镀法来形成厚度为10μm左右的Au膜47。
之后，如图7J所示，除去掩模112，利用离子铣削法等除去从Au膜47露出的Au种子层46。其结果，得到与阳极电极32连接的中继布线层48a、共同连接各阴极电极33的阴极布线48c、共同连接各栅电极45g的栅极布线48g、与源电极45s连接的中继布线层48s、以及共同连接各漏电极45d的漏极布线48d。
接着，如图7K所示，露出中继布线层48a以及中继布线层48s，在钝化膜35上形成覆盖阴极布线48c、栅极布线48g、以及漏极布线48d的感光性聚酰亚胺膜36。
接下来，如图7L所示，形成共同连接各中继布线层48a的阳极布线37a、以及共同连接各中继布线层48s的源极布线37s。在阳极布线37a以及源极布线37s的形成中，例如利用溅射法在整个面上形成Au种子层，形成露出形成阳极布线37a以及源极布线37s的预定的区域的掩模，例如抗蚀掩模，利用电镀法形成厚度为10μm左右的Au膜。而且，除去掩模，利用离子铣削法等除去从Au膜露出的Au种子层。
这样，能够得到GaN基SBD以及GaN基HEMT形成在相同的基板上的半导体装置。在该GaN基HEMT中，i－GaN层43作为电子传输层发挥作用，n－AlGaN层31作为电子供给层发挥作用。
在图8A中，表示阳极电极32、阴极电极33、栅电极45g、源电极45s、以及漏电极45d的布局的一个例子，在图8B中，表示阳极布线37a、阴极布线48c、栅极布线48g、源极布线37s、以及漏极布线48d的布局的一个例子。
此外，如图9所示，GaN基SBD的阳极布线37a以及阳极电极32、和阴极布线48c以及阴极电极33也可以布局为梳状。
另外，GaN基HEMT的各电极也可以像图8A中的GaN基SBD的各电极那样二维地排列。另外，也可以在基板上形成贯通孔，经由该贯通孔将GaN基HEMT的漏极布线引回到基板的背面。同样，也可以将GaN基SBD的阴极布线引回到背面。并且，作为布线的材料，也可以使用与Au相比廉价的Al。
另外，在第一实施方式～第四实施方式中，也可以像第五实施方式那样将阴极电极设置在基板的表面侧。
（第六实施方式）
接下来，对第六实施方式进行说明。第六实施方式是具备GaN基SBD的服务器电源等装置。图10是表示包含GaN基SBD的SBD组件的图。图11是表示包含图10所示的SBD组件的PFC（power factorcorrection：功率因数校正）电路的图。图12是表示包含图11所示的PFC电路的服务器电源的图。
如图10所示，在包含GaN基SBD70的SBD组件80中，GaN基SBD70的阴极电极使用焊锡等安装材料82固定在组件电极台81上。组件电极台81连接有导线81a。另外，GaN基SBD70的阳极电极通过使用了Al线84的焊接，来与其他的导线83连接。而且，利用铸膜树脂85将它们密封。
如图11所示，在包含SBD组件80的PFC电路90中，在与GaN基SBD70的阳极电极连接的导线83上连接有扼流圈93的一个端子以及开关元件94的一个端子，在与阴极电极连接的导线81a上连接电容器95的一个端子。在扼流圈93的另一个端子上连接电容器92。而且，电容器92的另一个端子、开关元件94的另一个端子、以及电容器95的另一个端子接地。另外，电容器92经由二极管电桥91与交流电源（AC）连接。另外，在电容器95的两端子间取出直流电源（DC）。
而且，如图12所示，PFC电路90被设置在服务器电源100等上而被使用。
与这样的服务器电源100相同，也能够构建信赖度更高的电源装置，例如DC－DC转换器、AC－DC转换器等。
另外，在这些实施方式中，代替肖特基势垒二极管的GaN层的全体或者一部分也可以使用AlGaN层等其他的氮化物半导体层。
工业上的利用可能性
根据这些半导体装置等，利用肖特基电极所包含的金属部能够降低导通电压，利用氮化物部能够提高截止耐压。

Claims (20)

1.一种半导体装置，其特征在于，具有：
半导体层；和
与所述半导体层肖特基接合的肖特基电极，
所述肖特基电极具有：
金属部，其包含与所述半导体层肖特基接合的金属；和
氮化物部，其形成于所述金属部的周围，包含所述金属的氮化物，并与所述半导体层肖特基接合。
2.根据权利要求1所述的半导体装置，其特征在于，
所述半导体层的所述氮化物部所接合的部分的电阻比所述半导体层的所述金属部所接合的部分的电阻高。
3.根据权利要求1所述的半导体装置，其特征在于，
所述金属部所包含的金属是Ti或者Ta。
4.根据权利要求1所述的半导体装置，其特征在于，
所述半导体层包含氮化物半导体。
5.根据权利要求1所述的半导体装置，其特征在于，
所述半导体层具有：
电子传输层，和
形成于所述电子传输层上方的电子供给层。
6.根据权利要求1所述的半导体装置，其特征在于，
在基板上方设置有多个所述肖特基电极，
具有连接多个所述肖特基电极的布线。
7.一种电源装置，其特征在于，
具有半导体装置，
所述半导体装置具有：
半导体层；和
与所述半导体层肖特基接合的肖特基电极，
所述肖特基电极具有：
金属部，其包含与所述半导体层肖特基接合的金属；和
氮化物部，其形成于所述金属部的周围，包含所述金属的氮化物，并与所述半导体层肖特基接合。
8.根据权利要求7所述的电源装置，其特征在于，
所述半导体层的所述氮化物部所接合的部分的电阻比所述半导体层的所述金属部所接合的部分的电阻高。
9.根据权利要求7所述的电源装置，其特征在于，
所述金属部所包含的金属是Ti或者Ta。
10.根据权利要求7所述的电源装置，其特征在于，
所述半导体层包含氮化物半导体。
11.根据权利要求7所述的电源装置，其特征在于，
所述半导体层具有：
电子传输层；和
形成于所述电子传输层上方的电子供给层。
12.根据权利要求7所述的电源装置，其特征在于，
在基板上方设置有多个所述肖特基电极，
具有连接多个所述肖特基电极的布线。
13.一种半导体装置的制造方法，其特征在于，具有：
形成与半导体层肖特基接合的金属膜的工序；和
将所述金属膜的周边部氮化，由所述金属膜形成与所述半导体层肖特基接合的金属部和位于所述金属部的周围且与所述半导体层肖特基接合的氮化物部的工序。
14.根据权利要求13所述的半导体装置的制造方法，其特征在于，
形成所述金属部和所述氮化物部的工序具有进行针对所述金属膜的周边部的氮气的离子注入的工序或者将所述金属膜的周边部曝露在氮气等离子体下的工序。
15.根据权利要求13所述的半导体装置的制造方法，其特征在于，
具有将所述半导体层的所述氮化物部所接合的部分的电阻提高到比所述半导体层的金属部所接合的部分的电阻高的工序。
16.根据权利要求15所述的半导体装置的制造方法，其特征在于，
将提高所述半导体层的所述氮化物部所接合的部分的电阻的工序与形成所述金属部和所述氮化物部的工序并行进行。
17.根据权利要求13所述的半导体装置的制造方法，其特征在于，
所述金属膜包含Ti或者Ta。
18.根据权利要求13所述的半导体装置的制造方法，其特征在于，
所述半导体层包含氮化物半导体。
19.根据权利要求13所述的半导体装置的制造方法，其特征在于，
所述半导体层具有电子传输层、和形成于所述电子传输层上方的电子供给层。
20.根据权利要求13所述的半导体装置的制造方法，其特征在于，
在形成所述金属膜的工序中，在基板上方形成多个金属膜，
具有形成连接由所述多个金属膜形成的多个所述金属部以及氮化物部的布线的工序。
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