CN103295989A - 倒装芯片封装 - Google Patents

倒装芯片封装 Download PDF

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Publication number
CN103295989A
CN103295989A CN2013100079432A CN201310007943A CN103295989A CN 103295989 A CN103295989 A CN 103295989A CN 2013100079432 A CN2013100079432 A CN 2013100079432A CN 201310007943 A CN201310007943 A CN 201310007943A CN 103295989 A CN103295989 A CN 103295989A
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pad
chip
copper row
carrier
hole
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CN103295989B (zh
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童耿直
林子闳
周哲雅
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MediaTek Inc
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MediaTek Inc
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Abstract

本发明提供一种倒装芯片封装。该倒装芯片封装包括载体及裸芯片。其中，该载体包括：至少一个通孔，用于将该载体的表面耦接至该载体中的导电线；至少一个捕获焊盘，电连接到该通孔，该捕获焊盘位于该通孔上。该裸芯片耦接至该载体，包括：至少一个形成在该裸芯片表面上的接合焊盘；以及至少一个铜列，形成在该接合焊盘上而用来将该裸芯片耦接至在该载体上的该捕获焊盘，其中该铜列仅位于该捕获焊盘相对于该通孔的开口的一侧上。本发明提出的倒装芯片封装，可以在裸芯片和载体之间具有良好的接合接触。

Description

倒装芯片封装
技术领域
本发明是有关于倒装芯片封装结构，特别是有关于一种通孔是未填充的倒装芯片封装结构。
背景技术
倒装芯片（flip chip）技术是一种用来将晶片或裸芯片(die)耦接到载体、基板或电路板的一种技术，其中的裸芯片会电连接到载体上，而无需使用接合线。裸芯片表面上的焊料凸点（solder bumps）置于接合焊盘（bond pads）上并以此作为接合方式。在此接合方式中，裸芯片被“翻转（flipped）”使得裸芯片表面上的焊料凸点朝下面向载体。焊料凸点经由捕获焊盘（capture pad）以及通孔，而能够电耦接到载体中的导电线。此结构通过包覆环氧树脂“填胶”（underfills）以吸收应力。这种技术允许更短的互连长度以及更多可用于路由（routing）的区域。
在现有的技术中，通孔（其耦接到载体中的导电线）中会用导电材料来填充。所得到的结构通常并不完全平坦，使其通孔开口处的导电材料的表面上形成微坑（dimple）。然后，载体的顶部被电镀以形成关于每个通孔的捕获焊盘。其中每个捕获焊盘的直径被设计为与裸芯片上焊料凸点的直径大致相同。此电镀会采用已填入（filled-in）导电材料的通孔的轮廓，使得捕获焊盘也会有凹入的表面，而使得焊料凸点位于微坑中。
较新的技术则将接触捕获焊盘的一端具有小焊料凸点的铜柱/列取代了焊料凸点。请参阅图1A，图1A为现有的使用焊料凸点73耦接到通孔41的倒装芯片封装100的示意图，图1B为现有的使用铜列81耦接到通孔41的倒装芯片封装150的示意图。在这两个图中，相同的标号被用于表示相同的部件。
图1A为倒装芯片封装100，包含裸芯片112，裸芯片112具有位于其表面上的多个接合焊盘28，每个接合焊盘28具有形成在其上的焊料凸点73。如图所示，裸芯片112被翻转而经由焊料凸点73耦接到载体114。载体114具有位于其表面上的多个捕获焊盘34，每个捕获焊盘34形成在通孔41上。通孔41耦接到载体114中的导电线（图未示）。通孔41中填充有导电材料，其以斜线表示之。
图1B为倒装芯片封装150，包括有裸芯片112，裸芯片112被翻转而耦接至载体114。接合焊盘28具有形成在其上的铜列81，而不是焊料凸点，用于将裸芯片112耦接到载体114。如图1B中所示，铜列81具有比图1A中的焊料凸点73更小的直径。此外，每个铜列81具有形成在其末端部的焊料凸点93，焊料凸点93的直径与铜列81的直径大致相同。与图1A描述相同，通孔41中填充有导电材料。在图1B中的捕获焊盘54的直径小于图1A中的捕获焊盘34的直径，以对应于铜列81的较小直径。
如两图所示，捕获焊盘34与捕获焊盘54的直径与其分别连接的焊料凸点73和焊料凸点93的直径大致相同。当利用铜列81时，与现有的焊料凸点73相比，铜列81具有较小的直径，意味着与铜列81对应的焊料凸点93也具有较小的直径，因此捕获焊盘54的使用可以释出接合面积。然而，具体来说，由于微坑的存在，较小直径的焊料凸点93具有与捕获焊盘54接合不良的缺点。增加铜列81的直径可以改善凸点与微坑的接触，但是这涉及增加帽盖（cap）的大小，并且否定了减少接合面积的优点，这是不合适的。
发明内容
有鉴于此，本发明提出一种倒装芯片封装。
依据本发明一实施方式，提供一种倒装芯片封装。该倒装芯片封装包括载体以及裸芯片。该载体包括至少一个通孔，用于将载体的表面耦接至载体中的导电线，以及至少一个捕获焊盘，电连接到该通孔，其中该捕获焊盘位于该通孔上。该裸芯片，耦接至该载体，包括至少一个接合焊盘，形成在该裸芯片表面上；以及至少一个铜列，形成在该接合焊盘上而用来将该裸芯片耦接至该载体上的该捕获焊盘，其中该铜列仅位于该捕获焊盘相对于该通孔的开口的一侧上。
本发明所提出的倒装芯片封装，可以在裸芯片和载体之间具有良好的接合接触。
附图说明
图1A为现有的使用焊料凸点耦接到通孔的倒装芯片封装的示意图。
图1B为现有的使用铜列耦接到通孔的倒装芯片封装的示意图。
图2为根据本发明实施方式的倒装芯片封装的横截面图。
图3A为本发明第一实施方式的焊料凸点处的水平面的剖面图。
图3B为本发明第二实施方式的焊料凸点处的水平面的剖面图。
图3C为本发明第三实施方式的焊料凸点处的水平面的剖面图。
具体实施方式
本发明提供了一种新颖的倒装芯片封装结构，利用铜列来将裸芯片连接到载体，其中在裸芯片和载体之间有良好的接合接触，以及此接合结构具有更大的灵活性。
在下文中，图式及其相应描述涉及本发明较优的实施方式。然而，本领域技术人员在阅读如下所揭露的描述后其执行的采用本发明概念的任意适应性修改，都应属本发明的涵盖范围。
请参阅图2，其为根据本发明实施方式的倒装芯片封装200的剖面图，而图3A、图3B和图3C，则为对应于图2中倒装芯片封装200各自不同实施方式的上视图。在图2、图3A、图3B和图3C中，与图1A和图1B中具有相同的结构和功能的元件使用相同的标号。
所提出的倒装芯片封装200，由以倒装芯片方式耦接到载体114的裸芯片112所组成，并透过铜列230的方式来耦接。每个铜列230在其端部上具有较小的焊料凸点232，用于接触形成在载体114表面上的捕获焊盘251。载体114也具有数个通孔41，用于将捕获焊盘251耦接到位于载体114中的导电线（图未示）。
在图2、图3A、图3B和图3C中所示的倒装芯片封装200，通孔41相对于现有的技术，并未填料。换言之，通孔41和捕获焊盘251之间的电连接是通过通孔41的侧壁而发生，而不是通过导电材料而产生。
由于通孔41是中空的，所以将铜列230（以及铜列230端部上的焊料凸点232）置于捕获焊盘251上并使得铜列230的任何部分都不在通孔41开口的上方是合适的。这样就可以保证最佳的电连接性和最佳的机械稳定性。此等特征导致铜列230仅位于其对应的捕获焊盘251的一侧，如图3A、图3B和图3C所示。
为了确保电连接性，在此揭示三个不同实施方式，其分别于图3A、图3B和图3C中举例说明。如图3A、图3B和图3C中焊料凸点处的水平面的剖面图所示，铜列230和捕获焊盘251的水平面的剖面图彼此不同。请参考附图，以下将详细介绍各实施方式的差异。
请参考图3A，其为本发明第一实施方式的焊料凸点处的水平面的剖面图，依据第一实施方式，通孔41的开口和焊料凸点232形成于载体114之上。其中捕获焊盘251包括形成在围绕通孔41的开口一侧的矩形部分，而铜列230位于矩形部分上。正如本实施方式中所揭露，除了延伸到捕获焊盘251一侧的矩形部分以外，捕获焊盘251关于通孔41的开口对称。铜列230和焊料凸点232则完全位于此矩形部分之上。
请参考图3B，其为本发明第二实施方式的焊料凸点处的水平面的剖面图，依据第二实施方式，通孔41的开口和焊料凸点232形成于载体114之上。正如在本实施方式中所示，捕获焊盘251关于通孔41的开口不对称，而铜列230和焊料凸点232则位于捕获焊盘251具有较大的面积的一侧上。举例来说，捕获焊盘251对于贯穿通孔41的开口中心的至少一个轴是不对称的，并且铜列230位于捕获焊盘251具有较大的表面积的一侧上。根据本发明的设计变化，铜列230相对于垂直平面是弯曲的，使得铜列230具有至少一个不对称轴。
请参考图3C，其为本发明第三实施方式的焊料凸点处的水平面的剖面图，依据第三实施方式，通孔41的开口和焊料凸点232形成于载体114之上。正如在本实施方式中所示，捕获焊盘251关于通孔41的开口不对称。如同前述的实施方式，铜列230和焊料凸点232位于捕获焊盘251具有较大的面积的一侧上。第二个实施方式和第三个实施方式之间的区别是，第三个实施方式中铜列230的形状是根据捕获焊盘251的形状而定。如图3C所示，捕获焊盘251为蛋形，焊料凸点232具有肾形（kidney-shaped）或称为C形的横截面面积（并且因此铜列230具有肾形（kidney-shaped）或称为C形的横截面）。
如图3A、图3B和图3C中所描绘与文中所详述，铜列230只会接触对应于通孔41的开口的捕获焊盘251的一侧。此种结构允许铜列230最大利用捕获焊盘251的导电性而不需要铜列230的任何部分与通孔41的开口重叠。这也保证了铜列230会具有良好的接合接触。
在上述的例子中，捕获焊盘251和铜列230的特殊形状意味着，在捕获焊盘251上可以放置不只一个铜列230。例如，在需要较多的功率时，就可以如此操作。举例来说，其中超过一个以上的铜列230完全形成在捕获焊盘251上，而所有的铜列230相对于垂直平面弯曲，使得每个该铜列具有至少一个不对称轴。在这种情况下，较佳地可以在两个方向上延伸捕获焊盘251，使得捕获焊盘251的形状成为椭圆形，于是铜列230可以放在通孔41的开口的任意一侧上。放置在单一捕获焊盘251上铜列230的数量仅受限于捕获焊盘251的尺寸和形状，要获得最佳的接触和最大的润湿能力，铜列230必须保持在捕获焊盘251位于通孔41的开口外的部分之中。再者，虽然此设计变化可导致多个铜列230非常接近地放置在一起，铜列230之间的空间会填充介电材料来填胶倒装芯片封装200，其充当使得铜列230间彼此绝缘的媒介。
捕获焊盘251的形状也并不限于上面列举的蛋形和椭圆形的例子。在一般情况下，不需要添加大量额外的材料的捕获焊盘251的形状较为合适。作为典型的倒装芯片封装，会有多个通孔位于其上（并且因此捕获焊盘也位于其上），因此希望捕获焊盘251的形状允许尽可能多的捕获焊盘位于载体表面之上，以允许较大的焊接可能性。捕获焊盘的特定数目和特定形状可以根据设计者的要求而定。
本发明的揭示不对称的捕获焊盘和采用捕获焊盘的形状的铜列的第三实施方式除可释放接合面积外，还具有减轻在超低介电（Extra Low K,ELK）层中应力的额外好处，其中超低介电层设置于裸芯片中（图未示）。由于铜列的形状不对称，铜柱-捕获焊盘的接合比起现有技术中铜列和捕获焊盘之间的接合会更加稳定。在图3C所示的例子中，肾形或C形的铜列230比起现有的铜列81对于中央点运动具有较低的潜在可能，所以与现有方法相比ELK层发生破裂的潜在可能较低。因此，所提出的结构不仅改善了倒装芯片封装的电连接性，也改善了其机械上的稳定性。
当铜列尽可能地保持接近通孔，但实际上又不悬垂在通孔上方时，可以保证最大的接触，同时又将需要用于捕获焊盘材料的量减到最少。如果捕获焊盘的直径保持低于特定值时，载体上更多的空间就可以用来作为接合之用。
本领域的技术人员可以理解的是，铜列的形状和捕获焊盘相应的形状不限于前述所揭示的这些实施方式。任何遵循用于焊接目的的捕获焊盘的替代（非现有的）形状的铜列，其中通孔没有填入导电材料，而铜列设置于捕获焊盘的一侧上的封装，均落入本发明的范围。此外，本设计不限于一个捕获焊盘上只有单一的铜列。放在单一捕获焊盘上铜列的形状和数目，只依其特定的形状和捕获焊盘的直径，以及设计的要求而定。单一捕获焊盘上各别铜列的形状也可是彼此不同的。
总而言之，本发明详述倒装芯片封装的细节，其中铜列用于连接捕获焊盘，捕获焊盘反过来又与载体中的通孔耦接，并再耦接到载体内的导电线。通孔是未填充的，并且捕获焊盘可能关于各自通孔的中心不对称。铜柱完全位于捕获焊盘上，使得不会有任何部分位于未填充的通孔的开口上。放置在单一捕获焊盘上的铜列的数目不限于一个。在一个实施方式中，铜列的形状依据捕获焊盘的边界而定。这种结构不仅释放出晶片表面上可用的接合空间，而且由于置于ELK层中的较少应力导致较大稳定性，从而导致在结构中具有高的电连接性和机械稳定性。
虽然本发明以较佳实施方式揭露如上，然而此较佳实施方式并非用以限定本发明，本领域技术人员不脱离本发明的精神和范围内，凡依本发明申请专利范围所做的均等变化与修饰，都应属本发明的涵盖范围。

Claims (8)

1.一种倒装芯片封装，其特征在于，包括：
载体，包括：
至少一个通孔，用于将该载体的表面耦接至该载体中的导电线；
至少一个捕获焊盘，电连接到该通孔，其中该捕获焊盘位于该通孔上；以及
裸芯片，耦接至该载体，包括：
至少一个接合焊盘，形成在该裸芯片表面上；以及
至少一个铜列，形成在该接合焊盘上而用来将该裸芯片耦接至该载体上的该捕获焊盘，其中该铜列仅位于该捕获焊盘相对于该通孔的开口的一侧上。
2.根据权利要求1所述的倒装芯片封装，其特征在于，该捕获焊盘相对于贯穿该通孔的开口中心的至少一个轴是不对称的，并且该铜列位于该捕获焊盘具有较大表面积的一侧上。
3.根据权利要求2所述的倒装芯片封装，其特征在于，该捕获焊盘包括形成在该通孔的开口一侧的矩形部分，而该铜列位于该矩形部分上。
4.根据权利要求2所述的倒装芯片封装，其特征在于，该铜列相对于垂直平面是弯曲的，使得该铜列具有至少一个不对称轴。
5.根据权利要求4所述的倒装芯片封装，其特征在于，该铜列的形状是对应于该捕获焊盘的形状。
6.根据权利要求4所述的倒装芯片封装，其特征在于，该捕获焊盘为蛋形，而该铜列的横截面是C形的。
7.根据权利要求1或4所述的倒装芯片封装，其特征在于，超过一个以上的该铜列完全形成在该捕获焊盘上。
8.根据权利要求7所述的倒装芯片封装，其特征在于，每个单独的该铜列分别具有彼此不同的形状。
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